For the Students of Diploma in IT as well as CM Scheme: G Semester:4th Subject:Microprocessor & Programming. Subject.Code: 17431 Chapter.No: 1 Title: Basics of Micro-Processor Question.No.1: Draw & Explain the Pin-Diagram of 8085 Micro-Processor.

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Q.1) Draw & Explain the Pin-Diagram of 8085 Microprocessor?
Ans:
The 8080 Microprocessor is an 8-bit general-purpose microprocessor having 40 pins which is capable of
addressing 64 kb of Memory .It works on +5v of single power-supply & can operate at the maximum
frequency of 5 MHz These 40 logic pin-out of 8085 Microprocessor are divided into 6 main groups.
1) Serial I/O Ports.
2) Interrupts & Externally-Initiated Signals.
3) Data-Bus.
4) Control Signals.
5) Status Signals.
6) Address Bus.
1) X1 & X2:
a) These are the 2 clock-input pins which are connected across a crystal RCLC Circuit of 6MHz
Frequency.
b) Whenever the microprocessor requires a clock-frequency of 3MHz, these 2 clock-input pins
divides the crystal-frequency into 2 parts in the internal circuitry & supplies the 1st 3MHz of
frequency to the microprocessor, while the 2nd 3MHz of Frequency is used as an operating
frequency to synchronize the operations of 8085 Microprocessor.
2) RESET OUT:
a) This is an active high output signal which is synchronized to the processor clock of
Microprocessor.
b) Whenever the microprocessor gets the reset-acknowledgement-signal R͞E͞S͞E͞T-I͞N, it sends the
output signal RESET-OUT to reset the microprocessor which resets all the connected devices &
indicates that the CPU has been Resetted.

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3) SOD (Serial Output Data) pin:
a) It is an active high serial output line used for serial data communication.
b) It provides the data serially given by Microprocessor & delivers its output to the 7th bit of the
Accumulator when (Set Interrupt Mask) SIM instruction is executed.
4) SID (Serial Input Data) pin:
a) It is an active high Serial input data line used for serial data communication.
b) It accepts the serial-data & loads it into the 7th bit of the Accumulator whenever a (Read
Interrupt Mask) RIM instruction is executed.
5) TRAP:
a) This is an active, high-level, edge-triggered, non-maskable & highest priority interrupt.
b) It cannot be enabled or disabled using a program.
c) Whenever TRAP gets active, the program-counter of microprocessor automatically jumps to the
address 0024 respectively.
6) RST 7.5, RST 6.5, & RST 5.5:
These 3 pins are actively -high vectored maskable hardware restart interrupts.
They insert an internal restart function automatically which transfer the program-control to the
specific memory locations. It can be enabled or disabled using a program.
a) According to the priority, after the TRAP pin, the secondmost high-level pin is RST 7.5. This pin is
actively –high, vectored, edge-triggered, maskable hardware restart interrupts. When RST 7.5 is
active, the program counter jumps automatically at address 003C respectively.
b) After RST 7.5, the thirdmost high-level pin is RST 6.5. This pin is actively–high, vectored; level-
triggered, maskable hardware restart interrupts. When RST 6.5 is active, the program counter
jumps automatically at address 0034 respectively.
c) After RST 6.5, the forthmost high-level pin is RST 5.5. This pin is actively–high, vectored; level-
triggered, maskable hardware restart interrupts. When RST 6.5 is active, the program counter
jumps automatically at address 002C respectively.
7) INTR:
a) INTR is an active high, level-triggered, maskable, non-vectored, general-purpose hardware
interrupt pin.
b) It is a level-sensitive interrupt pin which has the lowest priority among the interrupts.
c) It can be enabled or disabled using a program.
d) If INTR is active, the Program Counter (PC) will be restricted from incrementing and it will
generate an interrupt acknowledge signal I͞N͞T͞A.
8) I͞N͞T͞A:
a) It is an active low, general-purpose interrupt acknowledgement signal.
b) Whenever the microprocessor receives interrupt signal, it is acknowledged by I͞N͞T͞A. So,
whenever the interrupt signal is received, I͞N͞T͞A goes high.
9) AD0-AD7:
a) These are the 8-bit bi-directional multiplexed, tri-state input pins which contains 2 sets of
signals 1) Address & 2) Data.
b) These set of lines used to carry the lower order 8-bit address as well as 8-bit data bus.
c) Here, the lower 8 bit of 16 bit address is multiplexed/time shared with data bus , because , at
one-time , 8-bit lower-address of memory is available on these lines & at another time the next
8-bit data is available.

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10) VSS:
It is an interference pin which is connected to ground for avoiding ground-interference.
11) A8-A15:
These are the 8-bit uni-directional non-multiplexed, tri-state output pins used to carry higher order
address-signals of 16-bit Address.
12) S0 & S1:
These are status signals which provides different status and functions depending on their status.
IO/M̅ S0 S1 OPERATION
0 1 1 Opcode Fetch
0 0 1 Memory Read
0 1 0 Memory Write
1 0 1 I/O Read
1 1 0 I/O Write
1 0 1 Interrupt Acknowledge
Z 1 0 Halt
Z x x Hold
Z x x Reset
13) ALE:
a) ALE i.e Address Latch Enable is an output signal used to give information of AD0-AD7 Contents &
separate Address-Signals (A0-A7)& Data-Signals (D0-D7)fromAD0-AD7 pin.
b) It is a positive going pulse generated, when a new operation is started by Microprocessor.
c) When ALE is low, it indicates that the content on AD0-AD7 lines is the 8-bit data.
d) When ALE goes high, it indicates that the content on AD0-AD7 lines is in lower-order 8-bit
address of 16-bit address.
14) W͞͞R:
a) This is an active-low, output-control-signal pin used to write the data to the Memory or an I/O
Device.
b) Here, to write a data into a device/memory, microprocessor selects a device & then it transfers
the data & data-lines by generating W͞͞R signal from W͞͞R pin.
c) Thus, when the generated W͞͞R signal is low, then the data is readed from the I/O Device &
When the generated W͞͞R signal is high, then the data is readed from the Memory.
15) R͞D:
a) This is an active-low, output-control-signal pin used to read the data from the Memory or an I/O
Device.
b) Here, to read a data from a device/memory, microprocessor selects a device & then it transfers
the data & data-lines by generating R͞D signal from R͞D pin.
c) Thus, when the generated R͞D signal is low, then the data is readed from the I/O Device & When
the generated R͞D signal is high, then the data is readed from the Memory.
16) IO/M̅ :
a) It is a Status-Signal pin which distinguishes wheather the address is for Memory or to the I/O
Devices.
b) If IO/M͞ signal is low, then the Memory is Selected & If IO/M͞ signal is high, and then the I/O
Devices is selected.

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17) READY :
a) It is an active-high, input-control signal pin used by the microprocessor to check wheather the
peripheral-devices is ready to transfer the data or not.
b) This signal is also used to synchronize slower peripheral-devices with the faster peripheral-
devices.
c) When READY Signal from READY pin is high, then the microprocessor completes the operation
& proceeds for next operation.
d) When READY Signal from READY pin is low, then the microprocessor will wait untill it goes high.
18) R͞E͞S͞E͞T-I͞N:
a) It is an active-low input reset-acknowledgement-signal used to reset the microprocessor & pass
an acknowledgement to RESET OUT signal which indicates that the CPU has been Resetted.
b) When this signal is received by the microprocessor, the address-lines, data-lines & control-lines
gets tri-stated & the memory-location of program-counter i.e 0000 is cleared along with the
flag-register & temporary-registers.
c) After this process, the program-counter is resetted where it starts executing from the Starting
memory-location 0000H onwards.
19) CLK:
a) It is output clock-signal which is used as a system-clock.
b) An Internally Operating 3MHz Frequency obtained from the crystally-connected clock-input pins
X1& X2 is stored in this pin which is used to operate other peripheral devices in the systemwith
the same speed.
20) HLDA:
It is an output-signal which indicates an acknowledgement to HOLD that the HOLD-Request has
been received.
21) HOLD:
a) HOLD is an active-high, input signal used by the DMA (Direct Memory Access) Controller to
transfer the data.
b) When a Peripheral Device wants to transfer the data, it requests DMA controller.
c) Here, in response with it , the DMA Controller ask for Buses to the 8085 Microprocessor by
making it’s HOLD output High which is connected to the Input of HOLD of Microprocessor.
d) Whenever the Microprocessor receives that high-output signal from HOLD’s input, then it sends
this high-output signal to HLDA to hold the acknowledgement that the HOLD-Request has been
received by the DMA Controller by indicating that it has turned the control over buses for other
master in the system.
e) When data-transfer is completed, then it returns the control of buses back to the 8085
Microprocessor by sending back a low HOLD Signal.
22) Vcc:
It is the main power-source pin which requires a single +5v of DC supply to run the 8085
Microprocessor.