Introduction of FPGA , types &manufacture, structure, types of switch block, Programmable connection, Logic block, Design methodology, commercial tools, Why replace FPGA by ASIC, Design Flow Comparison, ASIC Design Flow, FPGA vs ASIC

1. ASIC VS FPGA
Presented by:
Shalini Kamade

2. Field Programmable Gate Array (FPGA)
 FPGA is a general-purpose integrated circuit that is “programmed” by the
designer rather than the device manufacturer. Unlike an ASIC.
 FPGA can be reprogrammed, even after it has been deployed into a system.
 FPGA programmed by HDL (VHDL or VERILOG)
 Array of logic resources with programmable interconnection.
• Logic resources (Combinational, Flip flops)
• Combinational: LUT, Multiplexers, Gates
• Programmable interconnections: SRAM, Flash, Anti-fuse
• Special Resources: PLL/DLL, RAMs, FIFOs,
• Memory Controllers, Network Interfaces, Processors

3. FPGA Types and Manufacturers
Two Major Manufacturers (Xilinx and Altera)
 Altera FPGA Families
 Cyclone
 Arria
 Stratix
 Xilinx FPGA Families
 Spartan
 Virtex
 Kintex
 Artix
 Zynq (Soc with ARM Processor)

4. SPARTAN VERTEX

5. Structure of an FPGA
• FPGA do not contain AND or OR planes
• Three major elements:
- Logic blocks
- I/O blocks
- Interconnection wires and switches
• All elements are programmable

6. Switch block
 Unbuffered switch
 Unidirectional switch
 Bidirectional buffered switch
Fig 1: Different switch block style

7. Types of switch block
Fig 2: Different types of switch block

8. FPGA
 I/O Blocks (Tri-state output / Input, Synchronizing Flip-flops)
 Array of Configurable Logic Blocks
 Horizontal and Vertical wires with programmable switches in between
 Single length, Double length, Quad, Hex and Long lines
 Resources available to user
 Resources for configuring programmable switches in the
interconnect structures and Logic blocks

9. Detailed view of an FPGA

10. Programmable Connections
 SRAM (Pass Transistor)
 Flash
 Antifuse
Name Volatile Re-programm-
able
Delay Area
Flash No In-circuit Large Medium
SRAM Yes In-circuit Large Large
Anti-fuse No No Small Small
Table 1: FPGA programmable connections

11. Logic Block size
 Coarse grain
– Owing to SRAM interconnection area (6 transistors) theLogic Blocks
are made large in SRAM based FPGA
– Utilization is made high with configurability within the logicblock
 Fine Grain
– Since the antifuse occupies less area and has less time delay,antifuse
based FPGA’s employs smaller size logic blocks

12. Design Methodology

13. Commercial Tools
 Simulators
ModelSim (Mentor Graphics)
Active HDL (Aldec)
 Synthesis Tools
Synplify Pro (Synopsys)
Precision Synthesis (Mentor Graphics)
 Vendor Tools
Xilinx ISE (Synthesis, Simulation, PAR, Programming, …)
Xilinx Vivado (Synthesis, Simulation, PAR, Programming, …)
Altera Quartus II (Synthesis, Simulation, PAR, Programming, …)
Cadence Suite
Synopsis Suite
Mentor Graphics Suite

14. Why replace FPGA by ASIC
 Significant cost reduction.
 Significant power saving.
 Board cost reduction
 No need for Flash/EPROM chip
 Reduce size in a multi – FPGA case
 Eliminates power-up reconfiguration time.

15. Design Flow Comparison

16. ASIC Design Flow

17. FPGA VS ASIC
FPGA ASIC
Faster time to market – No layout,
mask, & manufacturing steps needed
Need longer design times to take
care of all manufacturing steps
Field re-programmability – Design
changes can be absorbed even in field
& FPGA reprogrammed
Once manufactured, need to spin
again a new chip in case of bugs
More power consumption & may not
be high performance because of
programmable design & low clock
speed
Custom design for an application
helps in designing for
power/performance efficiency
Good for prototyping and low volume
design as cost would be less
For larger volume of production,
cost per unit will be much less
Generally not possible to have analog
and mixed signal designs and limited
to what vendor supports
Can support analog and mixed
signal designs