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Fundamentals of FPGA

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Fundamentals of FPGA

  2. 2. INTRODUCTION  In the world of digital electronic systems, there are three basic kinds of devices  Memory, microprocessor, logic devices  Memory devices store random information such as the contents of a spreadsheet or database.  Microprocessors execute software instructions to perform a wide variety of tasks such as running a word processing Program or video game.  Logic devices provide specific functions, including device-to- device interfacing, data communication, signal processing, data display, timing and control operations, and almost every other function a system must perform.
  3. 3. Logic devices > A logic device is one which can perform any logic function  Logic devices are broadly classified in to two Categories . They are , Fixed and programmable.  As the name suggests, the circuits in a fixed logic device are permanent, they perform one function or set of functions - once manufactured, they cannot be changed.  On the other hand, programmable devices are standard and offers a wide range of logic features and voltage characteristics - and these devices can be changed at any time to perform various logic functions.
  4. 4. Programmable  With programmable logic devices, designers use inexpensive software tools to quickly develop, simulate, and test their designs. Then, a design can be quickly programmed into a device, and immediately tested in a live circuit. The PLD that is used for this prototyping is the exact same PLD that will be used in the final production of a piece of end equipment, such as a network router, a DSL modem, a DVD player, or an automotive navigation system. There are no NRE costs and the final design is completed much faster than that of a custom, fixed logic device.
  5. 5. Programmable logic devices A programmable logic device is an integrated circuit with internal logic gates and interconnects. These gates can be connected to obtain the required logic Configuration. The term Programmable means changing either hardware or software configuration of an internal logic and interconnects. Of course the configuration of the internal logic is done by the user. PROM,EPROM,PAL,GAL etc.. Are few examples of programmable logic devices.
  6. 6.  A PLD is a general purpose chip for implementing logic circuitry. It contains a collection of logic circuit elements that can be customized in different ways. A PLD can be viewed as a black box that contains logic gates and programmable switches .  These devices allow the end user to specify the logical operation of the device through a process called “programming”
  7. 7. Types of PLDs • Among the several types of commercial PLDs available, there are two important types.  PLA (Programmable logic array)  PAL (Programmable array logic)
  8. 8. Programmable logic array(PLA) The PLA was developed in the middle 1970s as the first nonmemory programmable logic device. It is used as programmable AND array as well as programmable OR array i.e, both AND and OR planes are programmable. Logic functions can be realized using SOP .
  9. 9. Advantages of PLAs  The architecture of PLA is more flexible.  Frequently used in state machine design. Disadvantages  Although the PLA is more flexible it has not been widely accepted by engineers.  Due to programmable AND and OR planes more number of programmable switches are required, which reduce the speed performance of the circuits implemented in PLAs.
  10. 10. Programmable Array logic (PAL)  The drawbacks in PLA has led to the development of similar device in which the AND plane is programmable, but OR plane is fixed. Such a chip is known as a programmable array logic (PAL).
  11. 11. Advantages  Frequently used in practical applications.  Less expensive and offer better performance than PLA. Disadvantages  ROM guaranteed to implement any M functions of N inputs. PAL may have too few inputs to the OR gates.
  12. 12. CPLDs & FPGAs To retain the advantages and to overcome the disadvantages of PLAS and PALS the newly introduced devices are known as CPLDs and FPGAs What do they do? These are reprogrammable logic devices . Designers use software to develop any digital circuit they like and the program the chip to perform the function. They are very fast – much faster than a microcontroller
  13. 13. Complex programmable logic devices (CPLDs) Introduction Instead of relying on a programming unit to configure a chip , it is advantageous to be able to perform the programming while the chip is still attached to its circuit board. This method of programming is known as “In-System programming (ISP). It is not usually provided for PLAs (or) PALs , but it is available for the more sophisticated chips known as “Complex programmable logic device”
  14. 14. “A Complex programmable logic device is a device that contain multiple combination of PLAs and PALs”. A simple architecture of CPLD is shown below. 
  15. 15. Field programmable logic devices (FPGAs) Introduction By modern standards, a logic circuit with 20,000 gates is not large. To implement larger circuits, it is convenient to use a different type of chip that has larger logic capacity.
  16. 16. HISTORY  Field programmable gate arrays(FPGAs)arrived in 1984 as an alternative to programmable logic devices(PLDs) and ASCIs.  As their name implies ,FPGAs offer the significant benefit of being readily programmable.  FPGAs fill a gap between discrete logic and the smaller PLDs on the low end of the complexity scale and costly custom ASICs on the high end.
  17. 17.  Just a few years ago, the largest FPGA was measured in tens of thousands of system gates and operated at 40MHz. Older FPGAs often cost more than $150 for the most advanced parts at the time.  Today, however, FPGAs offer millions of gates of logic capacity, operate at 300MHz, can cost less than $10, and offer integrated functions like processors and memory  FPGAs offer all of the features needed to implement most complex designs.
  18. 18.  “A Field programmable gate array (FPGA) is a programmable logic device that supports implementation of relatively large logic circuits.”  As the name suggests ,Field Programmable Gate Arrays the standard logic elements are available for the designer and he has only to interconnect these elements to achieve the desired functional performance.
  19. 19. Architecture of FPGA  The architecture of FPGA is very simple than other programmable devices Elements of FPGA The basic elements of an Field Programmable Gate Array are:  Configurable logic blocks(CLBs)  Configurable input output blocks(IOBs)  Two layer metal network of vertical and horizontal lines for interconnecting the CLBS and FPGAs (programmable interconnect)
  20. 20.  A simple modern architecture of FPGA is shown below:
  21. 21.  Just about all FPGAs include a regular, programmable, and flexible architecture of logic blocks surrounded by input/output blocks on the perimeter. These functional blocks are linked together by a hierarchy of highly versatile programmable interconnects.
  22. 22. Configurable logic blocks (CLBs)  The configurable logic block which is RAM based or PLD based is the basic logic cell. It consists of registers (memory), muxes and combinatorial functional unit.  An array of CLBS are embedded within a set of vertical and horizantal channels that contain routing which can be personalized to interconnect CLBs.
  23. 23.  The following figure represents the architecture of a single CLB.
  24. 24. Configurable Input / Output logic locks (IOBs):  CLBs and routing channels are surrounded by a set of programmable I/Os which is an arrangement of transistors for configurable I/O drivers.
  25. 25. Programmable interconnects  These are unprogrammed interconnection resources on the chip which have channeled routing with fuse links.  Programmable highly interconnect matrix is available. In this case the design is that of the interconnections and communications only.
  26. 26. The following figure represents the Row-Column architecture of programmable interconnect.
  27. 27. Advantages  Design cycle Is significantly reduced. A user can program an FPGA design in a few minutes or seconds rather than weeks or months required for mask programmed parts.  High gate density i.e, it offers large gate counts. Compared with PLDs they are less dense.  No custom masks tooling is required saving thousands of dollars(Low cost).
  28. 28.  Low risk and highly flexible.  Reprogrammability for some FPGAs(design can be altered easily).  Can replace currently used SSI and MSI chips.  Suitable for prototyping.
  29. 29. Limitations  Speed is comparatively less.  The circuit delay depends on the performance of the design implementation tools.  The mapping of the logic design into FPGA architecture requires sophisticated design implementation (CAD)tools than PLDs.
  30. 30. Comparison between CPLDs and FPGAs
  31. 31. Different FPGA Vendors Though there are various FPGA vendors in the world market only two or three manufacturers are well known in the industry. For example : 1. Xilinx : Founded by Ross Freeman, original inventor of FPGAs in 1984. Sparten II,IIE,Sparten III,Virtex … 2. Altera: Altera cyclone II FPGA and associated design, software Quartus II 3. Actel :
  32. 32. FPGAs with different packages
  33. 33. Applications 1. Low-cost customizable digital circuitry • cost customizable digital circuitry Can be used to make any type of digital circuit. • Rapid with product development with design software. • Upgradable.
  34. 34. 2. High-performance computing performance • Complex algorithms are off-loaded to an FPGA co- processor. • Application-specific hardware. • FPGAs are inherently parallel and can have very efficient hardware. • algorithms: typical speed increase is x10 - x100.
  35. 35. 3. Evolvable hardware Evolvable hardware • Hardware can change its own circuitry. • Neural Networks. 4. Digital Signal Processing • Reconfigurable DSP hardware.
  36. 36. FPGA DESIGN TOOLS • There are two important design tools available in the market • verilog  VHDL (Very high speed integrated circuit hardware descriptive language)
  37. 37. Verilog Verilog HDL originated in 1983 at Gateway design automation. Today, Verilog HDL is an accepted IEEE standard.In 1995,the original standard IEEE 1364-1995 was approved. IEEE 1364-2001 is the latest verilog HDL standard that made significant improvements to the original standard.
  38. 38. VHDL VHDL is a language for describing digital electronic systems. It arose out of the United states government’s very high speed integrated circuits (VHSIC) program initiated in 1980
  39. 39. • As it became clear very soon that there was a need for a standard language for describing the structure and function of integrated circuits, this VHDL language was developed and subsequently adopted as a standard by the Institute of Electrical and Electronics Engineers (IEEE).
  40. 40. Design units VHDL provide five different types of primary constructs called design units. They are:  Entity declaration  Architecture body  Configuration declaration  Package declaration  Package body
  41. 41. 1.Entity declaration: The entity declaration specifies the name of the entity being modeled and lists the set of interface ports. Example: entity HALF-ADDER is port (A,B :in BIT; SUM,CARRY :out BIT); end HALF-ADDER;
  42. 42. 2.Architecture body: The internal details of an entity are specified by an architecture body using any of the following modeling styles. • Structural style modeling • Mixed style of modeling • Dataflow style of modeling • Behavioral style of modeling
  43. 43. • Structural style of modeling: In the structural style of modeling, an entity is described as a set of interconnect components. Example: architecture HA-STRUCTURE OF HALF-ADDER is component XOR2 port (x,y: in BIT;Z: out BIT); end component; component AND2 Port (L,M: in BIT;N: out BIT); end component;
  44. 44. • Dataflow style modeling: In this modeling style, the flow of data through the entity is expressed primarily using concurrent signal assignment statements. The structure of the entity is not explicitly specified in this modeling style, but it can be implicitly deduced. Example: architecture HA-CONCURRENT of HALF-ADDER is Begin Sum<= A or B ; Carry<=A and B; End HA-CONCURRENT;
  45. 45. • Behavioral style of modeling: The behavioral style of modeling specifies the behavior of an entity as a set of statements that are executed sequentially in the specified order. Example: architecture behavioral of DECODER is begin Process (A,B,ENABLE) begin Statements--; end process end behavioral;
  46. 46. 3.Configuration declaration: A configuration declaration is used to select one of the possibly many architecture bodies that an entity may have, and to bind components, used to represent structure in that architecture body. Example: Configuration HA-BINDING of HALF-ADDER IS statements--; End HA-BINDING;
  47. 47. 4.Package declaration: A package declaration is used to store a set of common declarations, such as components, types, procedures and functions. Example: Package MUX is Constant A:= 120ns: Function (x, y :integer) return BIT-VECTOR; END MUX;
  48. 48. 5.Package body: A package body is used to store the definitions of functions and procedures that were declared in the corresponding package declaration. Example: Package body EX_PACK is Function (INT-VALUE:INTEGER) Statements--; End EX_PACK;
  49. 49. Now let us discuss a simple FPGA design using VHDL Design of Half-Adder Library IEEE; Use IEEE.STD-LOGIC-1164.all; Entity Half-adder is Port( a,b: in std-logic; sum: out std_logic; Cout: out std_logic); Architecture behavioral of Half-adder is begin sum<= a xor b; Cout<=a and b; end behavioral;
  50. 50. • The simulation is done by using Modelsim simulator and the results are shown in the next slide