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Comp archch scsi bus

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Comp archch11l16scsi bus

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Comp archch scsi bus

  1. 1. Lesson 16: Standard I/O bus─ SCSI Chapter 11: Input/Output Organisation
  2. 2. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 2 Objective • Familiar with a standard I/O interface─ parallel bus called SCSI • Learn that SCSI data bus has data bus plus parity check bit, has 8- or in recent extensions 16- or 32-bits communicate data as well as address and 10 or in recent extensions more control signals • Learn that SCSI Communicate with the hard disk with bandwidth of 5 MB/s, in recent extensions 160 or 320 MB/s bandwidth
  3. 3. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 3 SCSI (Small Computer System Interface) Bus
  4. 4. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 4 SCSI bus • SCSI bus controller Communicate 8- or in recent extensions 16- or 32-bits communicate data as well as address and 10 or in recent extensions more control signals • Communicate with the hard disk with bandwidth of 5 MB/s • In recent extensions 160 or 320 MB/s bandwidth
  5. 5. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 5 Bus protocols • Allow any device on the bus to request the use of the bus • Have a policy for deciding which device gets to use the bus if more than one device wants to access it at the same time
  6. 6. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 6 SCSI Data bus • Data bus has data bus plus parity check bit • Enables single bit-error detection in a data transfer
  7. 7. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 7 SCSI bus signals
  8. 8. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 8 SCSI ten Control Signals • 1. RST—the reset signal activates to bring all devices with SCSI controller to start up state. • 2. SEL—when bus is used for selecting an SCSI target (It differs from Poll count, instead of poll count, the controller activates, SEL, the SCSI controller examines SCSI ID and always select the highest ID device • Each SCSI device has a distinct bus request line BRqi
  9. 9. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 9 SCSI ten Control Signals 3. BSY (for Busy)—when SCSI bus is not available to other device (controller) 4. ATN—activates when a device draws attention before sending a message to a target
  10. 10. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 10 SCSI ten Control Signals 5. REQ—like DRQ in sequence 1 Section 11.13 requests a data transfer by a device with the SCSI controller 6. ACK—acknowledgement from the SCSI controller that data transfer completes, like DACK 7. MSG—when a message or information is being transferred through the SCSI bus
  11. 11. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 11 SCSI ten Control Signals 8. C/D—1 or 0 when a control (command or status) or data word is being transferred, respectively 9. I/O—1 or 0 when a data is input to SCSI controller or output from the controller, respectively 10. Parity
  12. 12. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 12 High-speed SCSI versions • Use double edge detection of the signals
  13. 13. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 13 SCSI bus signal sequences
  14. 14. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 14 Sequences of SCSI Signals 1. Sequence 0: Arbitration when Busy is not active 2. Sequence 1: Selection using SEL—the selection of signals is done
  15. 15. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 15 Sequences of SCSI Signals 3. Sequence 2: Command or status or data transfer 4. Sequence 3: Reselection
  16. 16. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 16 SCSI bus Arbitration policy
  17. 17. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 17 SCSI controller arbitration policy • Access to highest priority device first • Advantage that it is easy to decide which device gets access to the bus
  18. 18. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 18 SCSI controller arbitration policy Disadvantage • Starvation • Starvation when a device with a high SCSI ID can prevent a device with a lower ID from ever getting a chance to use the bus by making repeated requests for the bus • Can occur any time an arbitration policy always gives one device priority over another
  19. 19. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 19 Starvation problem • Can occur any time an arbitration policy always gives one device priority over another • Some arbitration policies prevent starvation by giving more priority to the devices that have been waiting for the bus longest
  20. 20. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 20 Summary
  21. 21. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 21 We learnt • Data bus has data bus plus parity check bit • SCSI has 8- or in recent extensions 16- or 32- bits communicate data as well as address and 10 or in recent extensions more control signals • Communicate with the hard disk with bandwidth of 5 MB/s, in recent extensions 160 or 320 MB/s bandwidth • Access to highest priority device first arbitration policy
  22. 22. Schaum’s Outline of Theory and Problems of Computer Architecture Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 22 End of Lesson 16 on Standard I/O bus─ SCSI

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