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Block diagram of a PCI bus system          Processor/Main Memory System Copro-                                       Main ...
Latest Generation of PCI Chipsets
The PCI read transfer burst
The PCI write transfer burst.
The PCI Express Bus• Point to point protocol  – x1, x2, x4, x8, x12, x16 or x32 point-to-point    Link• Differential Signa...
PCI Express Topology
ISA BUS         In 1982 when ISA BUS appeared on the firstPC the 8-bit ISA bus ran at a modest 4.77 MHZ – thesame speed as...
ISA BUS            8-bit ISA BUS                            16-bit ISA BUSBus width         8 - bitCompatible with   8 bit...
ISA BUSVESA connectors   Additional           Original 8 bit ISA                  connections            connectors       ...
Describing the Read operation of the ISA                •           CPU sends out a                    high on the ALE sig...
ISA BUS            A0 to A31                      Memory             Address bus(32 bit)• Intel            D0 to D31      ...
Elimination of ISA Bus        The ISA bus is limited to 24 bits of address.2^24 = 16 MBytes. It means that an ISA card tha...
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PCI & ISA bus

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PCI & ISA bus

  1. 1. Submitted by
  2. 2. Block diagram of a PCI bus system Processor/Main Memory System Copro- Main CPU Cache cessor Memory PCI Motion Audio Bridge Video PCI BusSCSI host Interface to LAN Graphics I/O adapter Expansion Bus adapter adapter Expansin Bus (ISA/EISA) Bus Slot Bus Slot Bus Slot Bus Slot
  3. 3. Latest Generation of PCI Chipsets
  4. 4. The PCI read transfer burst
  5. 5. The PCI write transfer burst.
  6. 6. The PCI Express Bus• Point to point protocol – x1, x2, x4, x8, x12, x16 or x32 point-to-point Link• Differential Signaling
  7. 7. PCI Express Topology
  8. 8. ISA BUS In 1982 when ISA BUS appeared on the firstPC the 8-bit ISA bus ran at a modest 4.77 MHZ – thesame speed as Intel 8088. ISA BUS is extremely slow bytodays standards and not suited to the use of agraphical operating system like Windows. In 1984 the IBM AT was introduced using theIntel 80286; at this time the bus was doubled to 16 bits(the 80286s data bus width) and increased to 8 MHz(the maximum speed of the original AT, which came in6 MHz and 8 MHz versions and 24 address lines).
  9. 9. ISA BUS 8-bit ISA BUS 16-bit ISA BUSBus width 8 - bitCompatible with 8 bit ISA Bus width 16 - bitPins 62 Compatible with 16 bit ISAPower +5 V, -5 V, +12 V, -12 V Pins 98Clock 4.7727266 MHz Power +5 V, -5 V, +12 V, -12 V Clock 8.333333 MHz
  10. 10. ISA BUSVESA connectors Additional Original 8 bit ISA connections connectors converts to 16 bit ISA
  11. 11. Describing the Read operation of the ISA • CPU sends out a high on the ALE signal, then sends out the A0-A19 lines. On the address of the target port to be read will be latched. Then the BUS takes the -IOR signal to a low level. So that the addressed device will take a data byte to the D0-D7 data bus. The microprocessor will read then the data bus and take the - IOR signal to a high again.
  12. 12. ISA BUS A0 to A31 Memory Address bus(32 bit)• Intel D0 to D31 I/O• 80386DX bus Data bus (32 bit)• CPU (16 RD WR IO/M bit data) Control bus
  13. 13. Elimination of ISA Bus The ISA bus is limited to 24 bits of address.2^24 = 16 MBytes. It means that an ISA card that usesDMA cannot physically access memory beyond 16MBytes of RAM. This is a limitation of the ISA bus. Motherboard gets 32-bit data from ISA BUSat two times. Meanwhile at this time ISA BUS declares“wait state” to the motherboard. Therefore ISA BUSmay reduce System Performance.

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