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BITS Pilani
Pilani Campus
Data Storage Technologies
& Networks
Dr. Virendra Singh Shekhawat
Department of Computer Science and Information Systems
BITS Pilani, Pilani Campus
Topics
• SCSI Bus Protocol
– Bus components
– SCSI Devices
– SCSI commands
– SCSI r/w operation
2
BITS Pilani, Pilani Campus
SCSI: I/O Path from CPU to
Storage
• Stands for Small Computer System Interface
– Asynchronous, parallel bus
– Allows multiple bus masters
– Commonly used for high-end Storage devices
• Several standards
– Earliest Standard
• No. of wires (50)
• 8 data lines
• data transfer rate (5MB/s)
• wire length(25m)
3
BITS Pilani, Pilani Campus
SCSI Bus Standard
• Fast SCSI
– Doubled clock rate, data transfer up to 10MB/s
• Wide SCSI
– 16 data lines
– Fast Wide SCSI – 20 MB/s
• Ultra SCSI
– 8 data lines – data transfer rate 20MB/s
– Ultra Wide SCSI – 16 data lines – data transfer 40
MB/s
– Ultra320 - 16 data lines – data transfer 320 MB/s
• Serial Attached SCSI (SAS) and iSCSI (IP over SCSI)
4
BITS Pilani, Pilani Campus
SCSI – Components Model
• All devices are connected to a bus through a
SCSI controller
– e.g. a host adaptor on the processor side
– e.g. a disk controller for a hard disk device
• 2 types of devices
– Initiators or Targets
• Initiator has the ability to select a target and send
commands specifying operations
• Target has the ability to execute the operations based on
the commands received
• Data transfers are controlled by the targets
5
BITS Pilani, Pilani Campus
SCSI Devices
• Devices are identified through controllers
• Device Identification
– Identifiers: Narrow SCSI (8 devices)
• 0-7 in increasing order of priority
– Identifiers: Wide SCSI (16 devices)
• 8-15, 0-7 in increasing order of priority
– Identifier assignment is
• physical (through jumpers or switches), or
• programmatic (through BIOS firmware in adapter)
• Logical devices
– Each Drive/Disk is assigned a Logical Unit Number (LUN) for
addressing
– A Single physical device may be divided into logical devices
each with a LUN (Logical Unit Number)
6
BITS Pilani, Pilani Campus
SCSI Command Protocol
• Communication between initiator and target
– Command sent in a Command Descriptor Block
• 1 byte of opcode followed by
• 5+ bytes of command-specific parameters
– Target (eventually) sends a status code byte
• Success, or busy, or Check Condition (i.e. error)
7
BITS Pilani, Pilani Campus
SCSI Command Protocol
• Command Types
– Non-data, Write, Read, Bidirectional
– e.g.
• Test Unit Ready
• Inquiry
• Start/Stop Unit
• Request Sense (for error)
• Read Capacity
• Format Unit
• Read (4 variants)
• Write (4 variants)
8
BITS Pilani, Pilani Campus
Command Descriptor Block
(CDB)
• Opcode
• LUN (3 bits)
• e.g. for Read
– Read (6): 21 bits LBA, 1 byte transfer length
– Read(10): 32 bit LBA, 2 byte transfer length
– Read(12): 32 bit LBA, 4 byte transfer length
– Read Long for ECC-Compliant data
9
BITS Pilani, Pilani Campus
SCSI – State Transition – Bus
Phases
• Bus Free Phase
– Bus is not being used by anyone
• Arbitration Phase
– One or more initiators request use of the bus and
• the one with the highest priority (SCSI ID order) is allowed to proceed
• Selection / Reselection phase
– Initiator asserts BUS BUSY signal and
• places target’s address on the bus thus establishing a connection/session
– Re-selection applies for a target resuming an interrupted operation:
• target asserts BUS BUSY signal and places initiator’s address on the bus.
• Message
– Exchange of control messages between initiator and target
• Command
– Initiator sends command to target
• Data
– Data exchange (as part of a read/write operation)
• Status
– Status of a command.
10
BITS Pilani, Pilani Campus
SCSI – State Transition – Bus
Phase Sequence [1]
• For a read operation:
1. When bus is free, initiator enters into arbitration (with other possible
initiators)
2. On arbitration, initiator selects the bus and places target address on
bus
3. Target acknowledges selection by a message
4. Initiator sends command
5. Target acknowledges command by a message
6. Target devices places (read) data on bus
7. Initiator acknowledges data by a message
8. Target sends status
• Assumption:
– Target holds the bus while it is reading – this acceptable only for simple
devices and small read delays.
• Exercise: Modify the above sequence for a write operation.
11
BITS Pilani, Pilani Campus
SCSI – State Transition – Bus
Phase Sequence [2]
• For a read operation:
1. When bus is free, initiator enters into arbitration (with other possible
initiators)
2. On arbitration, initiator selects the bus and places target address on bus
3. Target acknowledges selection by a message
4. Initiator sends command
5. Target acknowledges command by a message
6. Target sends “Disconnect” message to initiator
7. Bus is released
8. When target is ready with (read) data, target reselects bus and places
initiator address on bus
9. Initiator acknowledges selection by a message
10. Target sends data.
11. Initiator acknowledges data by a message
12. Target sends status
• Question: Modify the above sequence for a write operation.
12
BITS Pilani, Pilani Campus
SCSI – State Transition – Bus
Phase Sequence [3]
• For a sequence of read-write operations:
– Commands can be chained – i.e. a sequence of I/O operations
initiated by a single initiator on the same target.
– In this case, one arbitration step and one selection phase are enough.
• For large data transfers:
– Target could “disconnect” multiple times i.e. data transfer may be
interrupted more than once.
• If the target decides to disconnect, target sends a “save data pointer”
message to the initiator before the “disconnect” message
• A corresponding “restore data pointer” message is required after bus has
been reselected (i.e. data transfer is about to resume).
• SCSI controllers permit at most two sequences (i.e.
connections/sessions) to be interleaved.
13
BITS Pilani, Pilani Campus
SCSI – Command Queuing
• SCSI enables target devices to accept multiple
requests before finishing any of them
– Target devices must maintain queue outstanding
requests
– Also referred to as Tagged Command Queuing
– In SATA this is referred to as Native Command
Queuing
• SCSI-3 permits queue lengths up to 64
– In practice, most SCSI controllers (based on traditional
parallel SCSI) support a queue length of 256
• ATA/SATA permits queue lengths up to 32.
14
BITS Pilani, Pilani Campus
SCSI – Command Queuing
• Command Queuing is useful
– For initiator to offload I/O operations instead of
sequencing them itself.
– For amortizing seek and rotation times over multiple
accesses thereby reducing the average access time:
• Controller must have support for ordering the accesses so
that seek time is minimized or rotation time is minimized
or both.
15
BITS Pilani, Pilani Campus
Error Correction -In channel
• SCSI supports read/write operations with error
correction code (ECC)
– ECC uses redundant bits for error correction
– Most modern disks have “out-of-band” ECC per disk
sector
• This is used internally by the controller to verify whether
any bit errors have occurred during storage.
16
BITS Pilani, Pilani Campus
Thank You!
17

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M2 242-scsi-bus rl-2.4.2

  • 1. BITS Pilani Pilani Campus Data Storage Technologies & Networks Dr. Virendra Singh Shekhawat Department of Computer Science and Information Systems
  • 2. BITS Pilani, Pilani Campus Topics • SCSI Bus Protocol – Bus components – SCSI Devices – SCSI commands – SCSI r/w operation 2
  • 3. BITS Pilani, Pilani Campus SCSI: I/O Path from CPU to Storage • Stands for Small Computer System Interface – Asynchronous, parallel bus – Allows multiple bus masters – Commonly used for high-end Storage devices • Several standards – Earliest Standard • No. of wires (50) • 8 data lines • data transfer rate (5MB/s) • wire length(25m) 3
  • 4. BITS Pilani, Pilani Campus SCSI Bus Standard • Fast SCSI – Doubled clock rate, data transfer up to 10MB/s • Wide SCSI – 16 data lines – Fast Wide SCSI – 20 MB/s • Ultra SCSI – 8 data lines – data transfer rate 20MB/s – Ultra Wide SCSI – 16 data lines – data transfer 40 MB/s – Ultra320 - 16 data lines – data transfer 320 MB/s • Serial Attached SCSI (SAS) and iSCSI (IP over SCSI) 4
  • 5. BITS Pilani, Pilani Campus SCSI – Components Model • All devices are connected to a bus through a SCSI controller – e.g. a host adaptor on the processor side – e.g. a disk controller for a hard disk device • 2 types of devices – Initiators or Targets • Initiator has the ability to select a target and send commands specifying operations • Target has the ability to execute the operations based on the commands received • Data transfers are controlled by the targets 5
  • 6. BITS Pilani, Pilani Campus SCSI Devices • Devices are identified through controllers • Device Identification – Identifiers: Narrow SCSI (8 devices) • 0-7 in increasing order of priority – Identifiers: Wide SCSI (16 devices) • 8-15, 0-7 in increasing order of priority – Identifier assignment is • physical (through jumpers or switches), or • programmatic (through BIOS firmware in adapter) • Logical devices – Each Drive/Disk is assigned a Logical Unit Number (LUN) for addressing – A Single physical device may be divided into logical devices each with a LUN (Logical Unit Number) 6
  • 7. BITS Pilani, Pilani Campus SCSI Command Protocol • Communication between initiator and target – Command sent in a Command Descriptor Block • 1 byte of opcode followed by • 5+ bytes of command-specific parameters – Target (eventually) sends a status code byte • Success, or busy, or Check Condition (i.e. error) 7
  • 8. BITS Pilani, Pilani Campus SCSI Command Protocol • Command Types – Non-data, Write, Read, Bidirectional – e.g. • Test Unit Ready • Inquiry • Start/Stop Unit • Request Sense (for error) • Read Capacity • Format Unit • Read (4 variants) • Write (4 variants) 8
  • 9. BITS Pilani, Pilani Campus Command Descriptor Block (CDB) • Opcode • LUN (3 bits) • e.g. for Read – Read (6): 21 bits LBA, 1 byte transfer length – Read(10): 32 bit LBA, 2 byte transfer length – Read(12): 32 bit LBA, 4 byte transfer length – Read Long for ECC-Compliant data 9
  • 10. BITS Pilani, Pilani Campus SCSI – State Transition – Bus Phases • Bus Free Phase – Bus is not being used by anyone • Arbitration Phase – One or more initiators request use of the bus and • the one with the highest priority (SCSI ID order) is allowed to proceed • Selection / Reselection phase – Initiator asserts BUS BUSY signal and • places target’s address on the bus thus establishing a connection/session – Re-selection applies for a target resuming an interrupted operation: • target asserts BUS BUSY signal and places initiator’s address on the bus. • Message – Exchange of control messages between initiator and target • Command – Initiator sends command to target • Data – Data exchange (as part of a read/write operation) • Status – Status of a command. 10
  • 11. BITS Pilani, Pilani Campus SCSI – State Transition – Bus Phase Sequence [1] • For a read operation: 1. When bus is free, initiator enters into arbitration (with other possible initiators) 2. On arbitration, initiator selects the bus and places target address on bus 3. Target acknowledges selection by a message 4. Initiator sends command 5. Target acknowledges command by a message 6. Target devices places (read) data on bus 7. Initiator acknowledges data by a message 8. Target sends status • Assumption: – Target holds the bus while it is reading – this acceptable only for simple devices and small read delays. • Exercise: Modify the above sequence for a write operation. 11
  • 12. BITS Pilani, Pilani Campus SCSI – State Transition – Bus Phase Sequence [2] • For a read operation: 1. When bus is free, initiator enters into arbitration (with other possible initiators) 2. On arbitration, initiator selects the bus and places target address on bus 3. Target acknowledges selection by a message 4. Initiator sends command 5. Target acknowledges command by a message 6. Target sends “Disconnect” message to initiator 7. Bus is released 8. When target is ready with (read) data, target reselects bus and places initiator address on bus 9. Initiator acknowledges selection by a message 10. Target sends data. 11. Initiator acknowledges data by a message 12. Target sends status • Question: Modify the above sequence for a write operation. 12
  • 13. BITS Pilani, Pilani Campus SCSI – State Transition – Bus Phase Sequence [3] • For a sequence of read-write operations: – Commands can be chained – i.e. a sequence of I/O operations initiated by a single initiator on the same target. – In this case, one arbitration step and one selection phase are enough. • For large data transfers: – Target could “disconnect” multiple times i.e. data transfer may be interrupted more than once. • If the target decides to disconnect, target sends a “save data pointer” message to the initiator before the “disconnect” message • A corresponding “restore data pointer” message is required after bus has been reselected (i.e. data transfer is about to resume). • SCSI controllers permit at most two sequences (i.e. connections/sessions) to be interleaved. 13
  • 14. BITS Pilani, Pilani Campus SCSI – Command Queuing • SCSI enables target devices to accept multiple requests before finishing any of them – Target devices must maintain queue outstanding requests – Also referred to as Tagged Command Queuing – In SATA this is referred to as Native Command Queuing • SCSI-3 permits queue lengths up to 64 – In practice, most SCSI controllers (based on traditional parallel SCSI) support a queue length of 256 • ATA/SATA permits queue lengths up to 32. 14
  • 15. BITS Pilani, Pilani Campus SCSI – Command Queuing • Command Queuing is useful – For initiator to offload I/O operations instead of sequencing them itself. – For amortizing seek and rotation times over multiple accesses thereby reducing the average access time: • Controller must have support for ordering the accesses so that seek time is minimized or rotation time is minimized or both. 15
  • 16. BITS Pilani, Pilani Campus Error Correction -In channel • SCSI supports read/write operations with error correction code (ECC) – ECC uses redundant bits for error correction – Most modern disks have “out-of-band” ECC per disk sector • This is used internally by the controller to verify whether any bit errors have occurred during storage. 16
  • 17. BITS Pilani, Pilani Campus Thank You! 17