As technology scales down toward deep submicron, large numbers of IP blocks are being integrated on the same Silicon die, thereby enabling large amount of parallel computations, such as those required for multimedia workloads. Network-on-chip (NOC) serves as an important agent to eliminate the communication bottleneck of future multicore systems. Arbiter, a prime component has a great impact on the feasibility of router. In this paper, we concentrate our ideas on the basic arbitration techniques with their features and found some problems with their roles in improving the performance of the routers and finally extending our range to a novel notion of overcoming extensive problems of starvation, HOL, congestion, etc. in a novel and feasible manners with a combination of the existing arbitration techniques in a more compact and sequential form.

1. Prepared by: Sandeep Kumar Singh
M.Tech, 3rd Sem.
MTMC/13/02
Guide: Abir J. Mondal, Asst. Prof. ,ECE Department

2. Contents
 Introduction
 Why Network-on-Chip is needed?
 Routing Algorithm
 Problems
 Future Works
 References

3. Introduction
 The process of incorporating numerous components
onto a single chip has led to the reduction in size
of many portable devices and an increase in the
computational capabilities.
 The NoC design methodology connects different IP
blocks by a packet based on chip network.
PE
Router

4. Why Network-on-Chip is needed?
 As VLSI technology is progressing towards deep
submicron era, more and more blocks of processing
elements are integrated on a single chip resulting in
system-on-chip.
 The bus based interconnections are not a suitable
choice for MPSoC because of power and latency
issue.

5. ROUTING ALGORITHM
 XY Routing
 S-XY Routing
 Turn Models
 West-First Routing
 North-Last Routing
 Negative-First Routing

6. Problems
Deadlock:-
 Deadlock is a situation in a network where a number
of messages wait for each others and none of them can
proceed.
 It is a result from a cyclic dependency between the
packets.
 Deadlocks can be handled in two ways: to prevent
them from happening (deadlock avoidance) or cope
with the situation when a deadlock appears (deadlock
recovery).

7. Cont…
Livelock:-
 Livelock occurs when the routing of a packet never
leads it to its destination.
 Livelock is possible only when routing is adaptive (not
along a predetermined path) and non-minimal.
Starvation:-
 Starvation is similar to deadlock, but occurs when a
packet waits for an event that can happen but never
does.

8. Algorithms…..
 XY Routing : XY routing is a dimension
order routing which routes packets first
in x- direction to the correct row and
then in y- direction to the receiver.
 S-XY Routing :

9. Turn Models
 A unique feature of the model is that it is not based
adding physical or virtual channels to direct networks.
 Instead, the model is based on analyzing the
directions in which packets can turn in a network and
the cycles that the turns can form.
 Prohibiting just enough turns to break all of the cycles
produces routing algorithms that are deadlock free,
livelock free, minimal or non-minimal, and highly
adaptive.

10. Turn Models
 West-First Routing
• North-Last Routing
 Negative-First Routing

11. Future Work
 Working towards a fault tolerant routing algorithm
to eliminate all the problems……….
 hardware realization of an Routing Algorithm on
Spartan 3E –Xilinx kit using Verilog.
 Hardware realization of Router Micro-architecture.

12. Reference
 C. J Glass and L.M Ni, “ The turn model for adaptive
routing,” Journal of ACM, vol. 41, no. 5, pp. 874-902, Sep.
1994.
 M.Pirretti et al, “ Fault tolerant algorithm for networks on
chip interconnect,” in IEEE Computer Society Annual
Symposium on VLSI, Lafayette, LA, Feb. 2004, pp. 46-51.
 G M. Chiu. The odd-even turn model for adaptive
routing Parallel and Distributed Systems, IEEE
Transactions on, vol. 11,no. 7, pp. 729-738, 2000.
 L Benini, G. De Micheli, “Networks on Chips: A new
SoC Paradigm”, Computer, Volume: 35 Issue: 1 Jan,
2002, pp: 70-78.

13. Thank
You…