HARDNESS, FRACTURE TOUGHNESS AND STRENGTH OF CERAMICS
Fundamentals of EMI-EMC and its industrial growth in commercial market
1. Fundamentals of EMI & EMC and its Industrial
Growth in Commercial Market
Dr.R .Lenin Raja M.E., Ph.D.,
EMC Specialist – Delhi NCR
General Manager – BTH Group of Labs
Member – EMC Experts
Contact : 91-8870082081
7/31/2017 PSNA -BEMT Guest Lecture 1
4. Electromagnetic Compatibility [EMC]
Electromagnetic Emissions
Your System Cannot Interfere With Other Systems or Subsystems in the
Vehicle
(e.g., FM Radio).
Electromagnetic Susceptibility
Your System Must Continue to Operate Correctly in the Presence of
Interference From Others or Transient Disturbances.
7/31/2017 PSNA -BEMT Guest Lecture 4
5. ELECTROMAGNETIC INTERFERENCE [EMI]
Conducted Interference
Enters/Exits on Wires for Power or Control
Radiated Interference
Enters/Exits Through the Air
Emissions Must be Controlled to Protect:
AM & FM Radio Stations
Aircraft Communications & Navigation
Emergency Services Land Communications
7/31/2017 PSNA -BEMT Guest Lecture 5
21. The Evolution of EM Noise
Radio and TV: Before 1984 three TV programs were broadcasted in Germany. With the
advent of cable and satellite TV the number of programs
(not their quality) exploded. New territories in the EM spectrum were occupied.
Why has EMC more and more become an issue
in the past decades? It is interesting to look at the
evolution of randomly selected EM subjects:
Telecommunication: This telephone inside the DESY
tunnel must be from the 1960s when only Big Bosses
had “mobile” phones installed in their cars.
Today we have the atmosphere filled with EM smog
from cell phones, WLAN etc. But imagine the ionizing
radiation hardness of this black thing
22. Contd.,
Automotive: My 1977 beetle had the following electric parts: battery, generator,
ignition system, lamps, horn, rear window heating, radio. Nowadays almost
everything is operated electrically and there are many intelligent assistant systems:
A modern Fiat Panda has more computing power embedded than the DESY
computing center of 1977 (IBM 370/168). Cars are among the toughest EMI
places.
Power supply: For a long time the majority of loads in the power grid was linear,
i.e. composed of R, C, L. Today’s switched power supplies are energy-efficient but
leave a lot of noise in the mains due to their pulsed current consumption.
7/31/2017 PSNA -BEMT Guest Lecture 22
23. EMC Environment: Susceptibility
Power Transients
Inductive Load Switching
Voltage Sag
“Load Dump”
RF Immunity
On-Board Transmitters
Radio Stations
Airport Radar Systems
Sensors are Most Vulnerable
Electrostatic Discharge (ESD)
Up to 15kV
7/31/2017 PSNA -BEMT Guest Lecture 23
25. The design process
System architecture the structure and details – EMC
-How many layers in PCBs?
-Are reactive circuits located
away from I/O ports?
-Are I/O ports isolated/shielded?
-Are IC families appropriate for
speeds needed?
-Will housing provide shielding?
7/31/2017 PSNA -BEMT Guest Lecture 25
26. Design for compliance
Initial Design must consider the following:
design goals
Components
PCB architecture
PCB layout and I/O
Cables
enclosures and shielding
software/firmware
7/31/2017 PSNA -BEMT Guest Lecture 26
27. The design process
Design rulesthe circuit and layout constraints –EMC
- Are RF signal traces short and/ or embedded?
- Are bypass caps located and sized optimally?
- Are ground planes low-Z, and earth bypass provided?
- Have sensitive designs been modeled?
-Consider use of Signal Integrity and Quiet expert, EMC Flo
simulation tools
7/31/2017 PSNA -BEMT Guest Lecture 27
28. Design for compliance:
software and firmware
Design for robustness:
- checkpoint routines and watchdog timers.
- checksums, error detection/correction codes.
- “sanity checks” of measured values.
- poll status of ports, sensors, actuators.
- read/write to digital ports to validate.
7/31/2017 PSNA -BEMT Guest Lecture 28
29. The design process
To increase the EMC success rate, the design process
must have following checks:
-Be sure the regulatory specifications are correct and current.
-Take into account the impact of equipment architecture
on EMC. Assure that purchased modules also comply.
- Consider EMC design rules, manual and/or automatic.
- Include places for EMC compliance modifications.
- Perform pre-compliance testing where possible.
7/31/2017 PSNA -BEMT Guest Lecture 29
30. The design process
Regulatory evaluation is it legal? If not modify – EMC
- Were places provided for optional
filtering/bypassing?
- Are ferrites cost-effective?
- Can spring fingers be added to
the enclosure?
- Will a shielded cable help?
- Board re-spin?
7/31/2017 PSNA -BEMT Guest Lecture 30
31. Design for compliance: logic families
EMI increases with power consumption
EMI increases with slew rate/clock speed
EMI increases with ground bounce
EMI increases with output loading
Differential drive can reduce EMI (LVDS)
7/31/2017 PSNA -BEMT Guest Lecture 31
32. Design for compliance:
PCB architecture
Adjacent ground and power planes act as very good
decoupling capacitors.
ground and power planes can shield high-speed or
low-level signal traces between.
separate ground and chassis planes can reduce
noise.
16-planes (layers) design is common for back
planes
7/31/2017 PSNA -BEMT Guest Lecture 32
33. Design for compliance :
reduce emissions
• Short straight current elements radiate fields that are:
– Proportional to the current they carry (l)
– Proportional to their (electrical) length (L)
– Increasing with frequency (f)
• Small current loops radiate fields that are:
– Proportional to the current
– Proportional to the square of the loop radius -- and the square of frequency
(E,H) ~ (f, L, l)
(E,H) ~ (f2, a2, l)
L
I
a
I
7/31/2017 PSNA -BEMT Guest Lecture 33
34. Design for compliance
Clock
Clock
Buffer
I/O Driver
EdgeConnector
• Locate I/O drivers away from sources of high frequency and near the
connectors they serve.
7/31/2017 PSNA -BEMT Guest Lecture 34
35. Common Mode and Differential Signals
• Differential Signals:
• Convey the desired information
• Don’t cause interference: The fields generated by differential currents oppose
each other and nearly cancel.
• Common Mode Signals:
• Are the major source of cable radiation
• Have no useful purpose
• Cause the cabling to act as a monopole antenna
Vcm
7/31/2017 PSNA -BEMT Guest Lecture 35
41. To pre-test for RF immunity:
use licensed transmitters for radiated fields.
use coupling networks and transformers for
conducted disturbances.
To mitigate RF immunity problems:
try ferrites and spring fingers above 50 MHz
try filters below 50 MHz, bypassing anywhere.
Pre-compliance tools
7/31/2017 PSNA -BEMT Guest Lecture 41
42. Pre-compliance EMI sites
1 m site
minimizes factory ambient.
good for small EUT, frequencies > 100 MHz.
Screened Room
inexpensive, OK for regulatory conducted emissions and
conducted immunity tests.
can be used for radiated emissions, with precautions.
7/31/2017 PSNA -BEMT Guest Lecture 42
46. Pre-compliance testing:
EMI probes
50 cable
to analyzer
39 pF capacitor on
center conductor
contact probe
Contact probes are useful in finding:
- reactive component pins
- reactive PC board traces and planes
- reactive I/O and connector pins
- driven areas of enclosures
7/31/2017 PSNA -BEMT Guest Lecture 46
47. Pre-compliance testing:
EMI probes
proximity probe50 cable
to analyzer
center conductor looped
back to shield and soldered
Proximity probes are useful in localizing:
- reactive PC board areas and components
- reactive signal, I/O and power cables
- reactive enclosure gaps and openings
- by pumping signal in, as immunity probe
7/31/2017 PSNA -BEMT Guest Lecture 47
58. Dr.R .Lenin Raja M.E., Ph.D (RF & Antenna)
EMC Specialist – Delhi NCR
General Manager – BTH Group of Labs
Member – EMC Experts
Contact : 91-8870082081
leninaucbe@gmail.com
emclab@bharattesthouse.com
My profile
7/31/2017 PSNA -BEMT Guest Lecture 58
Editor's Notes
We generally think of signals propagating through our
circuits in one of three modes, single-ended, differential mode,
or common mode.
Single ended mode is the mode we are most familiar with.
It involves a single wire or trace between a driver and a receiver.
The signal propagates down the trace and returns
through the ground system.
Differential mode involves a pair of traces (wires) between
the driver and receiver. We typically say that one trace
carries the positive signal and the other carries a negative signal
that is both equal to, and the opposite polarity from, the
first. Since the signals are equal and opposite, there is no return
signal through ground; what travels down one trace
comes back on the other.
Common mode signals are typically more difficult to understand.
They may involve either single-ended traces or two
(or perhaps even more) differential traces. The SAME signal
travels along both the trace and its return path (ground) or
along both traces in a differential pair. Most of us tend to be
unfamiliar with common mode signals because we tend never
to intentionally generate them ourselves. They are usually the
result of noise being coupled into the circuit from some other
(nearby or external) source. Generally, their consequences are
neutral, at best, or damaging at worst. Common mode signals
can generate noise that interrupts the operation of our circuits,
and are a common source of EMI problems.
Advantages: Differential signals have one obvious disadvantage
over single-ended signals. They require two traces
instead of one, or twice as much board area. But there are several
advantages to them.
If there is no return signal through ground, then the continuity
of the ground path becomes relatively unimportant. So if
we have, for example, an analog signal going to a digital device
through a differential pair, we don’t have to worry about
crossing power boundaries, plane discontinuities, etc. Separation
of power systems can be made easier with differential
devices.
Differential circuits can be very helpful in low signal
level applications. If the signals are VERY low level, or if the
signal/noise ratio is a problem, then differential signals effectively
double the signal level (+v – (-v) = 2v). Differential
signals and differential amplifiers are commonly used at the
input stages of very low signal level systems.
Differential receivers tend to be sensitive to the difference
in the signal levels at their inputs, but they are usually designed
to be insensitive to common-mode shifts at the inputs.
Therefore, differential circuits tend to perform better than single-
ended ones in high noise environments.
Switching timing can be more precisely set
with differential signals (referenced to each other)
than with single-ended signals (referenced to a less
precise reference signal subject to noise at some
other point on the board.) The crossover point for a
differential pair is very precisely defined (Figure
1). The crossover point of a single ended signal
between a logical one and a logical zero (for example)
is subject to noise, noise threshold, and threshold
detection problems, etc.
Key Assumption: There is one very important
aspect to differential signals that is frequently overlooked,
and sometimes misunderstood, by engineers
and designers. Let’s start with the two well-known
laws that (a) current flows in a closed loop and (b)
current is a constant everywhere within that loop.
Consider the “positive” trace of a differential
pair. Current flows down the trace and must flow in
a loop, normally returning through ground. The
negative signal on the other trace must also flow in
a loop and would also normally return though
ground. This is easy to see if we temporarily imagine
a differential pair with the signal on one trace
held constant. The signal on the other trace would
have to return somewhere, and it seems intuitively
clear that the return path would be where the single ended
trace return would be (ground). We say that,
with a differential pair, there is no return through
ground NOT because it can’t happen, BUT because, the returns that do exist are equal and opposite and
therefore (sum to zero and) cancel each other out.
This is a VERY important point. If the return
from one signal (+i) is exactly equal to, and the opposite
sign from, the other signal (-i), then their SUM (+i
–i) is zero, and there is no current flowing anywhere
else (and in particular, though ground). Now assume
the signals are not exactly equal and opposite. Let one
signal be +i1 and the other be –i2 where i1 and i2 are
similar, but not equal, in magnitude. The sum of their
return currents is (i1 – i2). Since this is NOT zero,
then this incremental current must be returning somewhere
else, presumably ground.
So what, you say? Well let’s assume the sending
circuit sends a differential pair of signals that are exactly
equal and opposite. Then we assume they will
still be so at the receiving end of the path. But what if
the path lengths are different? If one path (of the differential
pair) is longer than the other path, then the
signals are no longer equal and opposite during their
transition phase at the receiver (Figure 2). If the signals
are no longer equal and opposite during their transition
from one state to another, then it is no longer
true that there is no return signal through ground. If
there is a return signal through ground, then power
system integrity DOES become an issue, and EMI
may become a problem.
Design Rule 1: This brings us to our first design
guideline when dealing with differential signals: The
traces should be of equal length.
There are some people who argue passionately
against this rule. Generally, the basis for their argument
involves signal timing. They point out in great
detail that many differential circuits can tolerate significant
differences in the timing between the two
halves of a differential signal pair and still switch reliably.
Depending on the logic family used, trace
length difference of 500 mils can be tolerated.