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Computer Architecture
Roll No: 07
Submitted to:
Prof. Sohaib
 AC
 Load to AC
 Store AC
 BUN
 BSA
Topics
 AC stands for “Accumulator”.
 It is a register for short term and intermediate storage
of arithmetic and logic data in computer’s CPU(central
processing unit).
 In a modern computers, any register can function as an
accumulator.
 The operation is performed with memory operand and
content of AC.
AC:
 This instruction transfers the memory word specified by
effective address to AC.
D2T4: DR M[AR]
D2T5: AC DR
 The adder and logic circuit receive information from DR
and transferred to AC.
Load to AC:
 This instruction stores the content of AC into memory
word specified by the effective address.
 Output of AC is applied to bus and data input of memory
is connected to bus, we can execute this instruction with
one micro operation.
D3T4: M[AR] AC
Store AC
 This instruction transfers the program to the instruction
specified by effective address.
 BUN instruction allows the programmer to specify an
instruction out of sequence and we say that the program
branches unconditionally.
 This instruction is:
D4T4: PC AR
(effective address from AR is transferred through common
bus to PC)
BUN (branch unconditionally):
 Stands for “branch and save return address”.
 This instruction is useful for branching to a portion of a
program called subroutine. When executed, BSA
instruction stores the address of next instruction in a
sequence into the memory location.
M[AR] PC, PC AR+ 1
BSA
Computer architecture

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Computer architecture

  • 1. Computer Architecture Roll No: 07 Submitted to: Prof. Sohaib
  • 2.  AC  Load to AC  Store AC  BUN  BSA Topics
  • 3.  AC stands for “Accumulator”.  It is a register for short term and intermediate storage of arithmetic and logic data in computer’s CPU(central processing unit).  In a modern computers, any register can function as an accumulator.  The operation is performed with memory operand and content of AC. AC:
  • 4.  This instruction transfers the memory word specified by effective address to AC. D2T4: DR M[AR] D2T5: AC DR  The adder and logic circuit receive information from DR and transferred to AC. Load to AC:
  • 5.  This instruction stores the content of AC into memory word specified by the effective address.  Output of AC is applied to bus and data input of memory is connected to bus, we can execute this instruction with one micro operation. D3T4: M[AR] AC Store AC
  • 6.  This instruction transfers the program to the instruction specified by effective address.  BUN instruction allows the programmer to specify an instruction out of sequence and we say that the program branches unconditionally.  This instruction is: D4T4: PC AR (effective address from AR is transferred through common bus to PC) BUN (branch unconditionally):
  • 7.  Stands for “branch and save return address”.  This instruction is useful for branching to a portion of a program called subroutine. When executed, BSA instruction stores the address of next instruction in a sequence into the memory location. M[AR] PC, PC AR+ 1 BSA