ParaForming - Patterns and Refactoring for Parallel Programming
Abstract chameleon chip
1. Invitation
SEMINAR ON CHAMELEON CHIP
ABSTRACT
No one denies that computers are speedy critters. For some chores,
though, faster is always better. So computer scientists are hatching a
novel concept that would increase number-crunching power—and trim
costs as well. Call it the Chameleon chip.
Today’s microprocessor sports a general-purpose design, which is
both good and bad. Good: One chip can run a range of programs. That’s
why you don’t need separate computers for different jobs, such as
crunching spread sheet or editing digital photo Bad: For any one
application, much of the chip's circuitry isn't needed, and the presence
of those "wasted" circuits slows things down. One set of chips, little
bigger than a credit card, could do almost anything, even changing into
a wireless phone.
Chameleon chips would be an extension of what can already be
done with Field Programmable gate arrays (FPGAS). An FPGA is
covered with a grid of wires. At each crossover, there's a switch that can
be semi permanently opened or closed by sending it a special signal.
Usually the chip must first be inserted in a little box that sends the
programming signals.
Here we shall look in what is a Reconfigurable Processor chip how
it is implemented what is its general architecture. Its comparison with
other available technology. How a ch ip can be reconfigured by a user
with the algorithm provided.
Presentation by Anugrah George James
S7- EC
On 18/07/2011 at seminar Hall
Time: 1:00 pm to 4:00 pm.