nmos design and simulation using synopsys TCAD

1. Presented By
Rajesh Yadav (12ECP01P)
M.Tech.(VLSI)- II Sem
Itm University
Under the Supervision of
Dr. B. K DAS
Ms. VANDANA KHANNA

2. •Topics
 Introduction
 TCAD Tool Overview
 Fabrication of NMOS Transistor
 Simulation of NMOS Transistor
 Analytical result
 Future work

3. •Introduction
 MOS (Metal Oxide Semiconductor) transistor
 Most promising active component for silicon VLSI
circuits.
 Main reasons for choosing MOS Transistor
 Self isolating
 Less processing steps
 Can be made in bulksilicon

4. • Tool Overview
 Comercial TCAD began with formation of TMA in 1979.
 Technology CAD is
 Numeric simulation of Semiconductor Process and Device
 Basic subprogram used
i. Sentaurus Structure Editor
ii. Sentaurus Process
iii. Sentaurus Device
iv. Sentaurus Workbench
v. Tecplot
vi. Inspect
.

5. Continues…
• structures are generated or edited interactively
using the GUI
Sentaurus
Structure
Editor
• A simulation process which is designing the
Semiconductor Technology
Sentaurus
Process
• Work as a device simulator
• Finds the characteristics for each semiconductor
device
Sentaurus
Device

6. Continues…
• A common platform to run various tools together.
• Can add or remove various tools
• Required file can be imported
Sentaurus
Workbench:
• Basically used to view the structure of the device.
• Also can plot the electrical or optical
characteristic curve.
Tecplot:
• Used to view the different typed of
electrical/optical behavior of the device.
• Can not draw the structure of the device.Inspect:

7. • Fabrication of NMOS Transistor
To generate a command
file of each prossing
Steps
Simulate the command line
file in Sprocess to generate
structure of device
Simulate the device for
its electrical
characteristics(Sdevice)
View the Results using
Tecplot and Inspect

8.  Creating a “filename_fps.cmd” file
 Using command line directly.
 Write command of each processing steps. (ample of writing
command instructions for each process are available in Sentaurus
user mannual)
 Using SSE
 Do On the journal to record command of each step is being done
in structure editor
 Generated Journal file (.jrl) can be renamed with extension
“_fps.cmd”
Continues…

9.  A simple example to write the command for processing
steps
# step SD Implant
implant phosphorus dose=1e+15 energy=15
// Source Drain Implantation with Phosphorus having
concentration = 1×1015 atoms/cm3 and energy = 15KeV.
Continues…

10.  NMOS design involves following process flow.
 Declare initial grid
 Gate oxidation
 Extract tox
 Polysilicon deposition
 Masking polysilicon
 Etching polysilicon
 LDD implantation
 Spacer formation
 SD implantation
 SD Annealing
 Making SD contacts
 Reflect
 Save final structure
Continues…

11. Continues…
filename_fps.cmd SProcess filename_fps.tdr
Tecplot
SSE

12. Continues…
 Final Structure of NMOS:

13. • Simulation of NMOS Transistor
filename_des.cmd Sdevice Filename.plt
Inspect

14. Continues…
 Drain Current Vs Gate Voltage Curve:

15. • Analytical Results
 I have done following variations in the device and
observed the results .
1. Change in Silicon Oxide layer thickness
2. Change in Substrate doping
3. Change in channel length
4. Change in Source-Drain doping concentration (dose)
5. Change in Source-Drain doping energy

16. Continues…
 Change in Silicon Oxide layer thickness.
Oxidation time Temperature(0C) Oxide layer
thickness (tox) in
μm
Threshold Voltage
(Vth) in Volt
5s 950 0.0066 0.53
10s 950 0.0101 0.58
15s 950 0.0130 0.59
20s 950 0.0154 0.56
25s 950 0.0176 0.62
30s 950 0.0196 0.63

17. Continues…
 Change Substrate dopping.
Substrate doping
Concentration (with
Boron) /cm3
Depth of S-D diffusion
in μm
Threshold Voltage
(Vth) in Volt
1×1016 0.24 0.1
1×1017 0.18 0.56
5×1017 0.17 0.80
1×1018 0.16 0.80

18. Continues…
 Change in channel length .
Channel length (in μm) Threshold Voltage
(Vth) in Volt
0.20 0.50
0.25 0.58
0.30 0.65

19. Continues…
 Change in Source-Drain doping concentration
(dose) .
Source-Drain implantation
dose (with Phosphorus)
/cm3
Source-Drain
implantation
energy in Kev
Depth of S-D
diffusion in μm
Threshold Voltage
(Vth) in Volt
1×1015 15 0.15 0.59
1×1016 15 0.17 0.58
1×1017 15 0.26 0.39
1×1018 15 0.33 0.10

20. Continues…
 Change in Source-Drain doping energy .
Source-Drain
imolantation energy
(with Phosphorus) /
in Kev
S-D implantaion dose
/cm3
Depth of S-D
diffusion in μm
Threshold Voltage
(Vth) in Volt
15 1×1015 0.15 0.59
20 1×1015 0.155 0.59
30 1×1015 0.18 0.59
35 1×1015 0.19 0.585

21.  A simple Model of NMOS Transistor has been designed
using Synopsys TCAD.
 Device simulation has been done and its different
characteristics observed.
 Effects on device due to changes in various design
parameters has been analyzed.
• Conclusion

22.  Till now I have done the fabrication of
 pn junction diode
 NMOS Transistor
 PMOS Transistor.
But in future I would like to work on FINFET, SOIFET
and also on CNTFET (Right now this is not available in
Synopsis TCAD )
 I have worked only on 2D tool but in future I would like
to work also on 3D tool.
• Future work

23. [1] Karthick Murukesan, Narsimha Rao Mavilla, “Towards Fabrication of Low
Cost High Efficiency c-Si Solar Cells:Progress and Optimisation Using TCAD
Simulation Study” ,India, IEEE 2011.
[2] M. S. Bahrudin, S.F. Abdullah and I. Ahmad, “Statistical Modeling of Solar
Cell using Taguchi Method and TCAD Tool” ,Malaysia, IEEE 2012.
[3] Michael Duane, “The Role of TCAD in Compact Modelling ” , 3320 Scott
Blvd.,MS 1148,Santa Clara,CA.
[4] Sentaurus tool User Guide https://solvnet.synopsys.com..
• Refrences

24. Thank You…