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Fabrication of silicon on insulator (soi)


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Fabrication of silicon on insulator (soi)

  2. 2. • To fabricate PHOTONIC CRYSTAL in SOI.• To use 248-nm deep UV Lithography for fabrication.• To use metal-oxide-semiconductor process.
  3. 3.  Demonstration of wavelength-scale photonic nanostructures, including PHOTONIC CRYSTALS. Fabrication of silicon on insulator using deep UV Lithography. Comparing UV lithography with E-BEAM lithography.
  4. 4. 1. Overview of photonic crystals, using deep UV Lithography.2. Use in optical waveguides.3. Current Lithography techniques for fabrication of PICs.
  6. 6.  PHOTONIC CRYSTALS are periodic optical nanostructures that are designed to affect the motion of photons in a similar way that periodicity of a semiconductor crystal affects the motion of electrons. They have separate high dielectric and low dielectric regions. Periodic – spacing for relevant light frequency.
  7. 7. • Reduce Band Gap• Reduce defects example: if thereis a LINE DEFECT instructure, it will act asa waveguide• Avoids Propagation of a Material
  8. 8. The fabrication method depends upon thenumber of dimensions that the photonic bandgap must exist in. 1-D Photonic Crystals 2-D Photonic Crystals 3-D Photonic Crystals
  9. 9. • Any type of dimension can be used. • High refractive index contrast gives high diffractive property. • PBG bounds defects in crystal.• Completely lossless and allows short bends without radiation loss.
  10. 10.  SOI was first used in CMOS application to reduce the parasitary capacitance to the silicon substrate. The top layer of SI acts as an optical waveguide due to high vertical index contrast. SOI uses large cores i.e., top SI layers of upto 10um thick but we use 205nm. SOI wafer bonding of a buried oxide is 400nm. Due to leakage slab waveguide remains single mode for a silicon thickness upto 268nm. The minimum loss of 6 db/mm.
  11. 11. 12Loss due to substrate leakage (cm) 10 8 100 nm 6 150 nm 200 nm 4 250 nm 500 nm 2 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Thickness silica layer (um)
  12. 12. Photolithography (or "optical lithography") is a process used in microfabrication to selectively remove parts of a thin film or the bulk of a substrate.It uses light to transfer a geometric pattern from a photomask to a light-sensitive chemical "photoresist", or simply "resist," on the substrate.For example, in complex integrated circuits, a modern CMOS wafer will go through the photolithographic cycle up to 50 times
  13. 13.  Size within 10nm.  Size of any illuminated wavelength. Most used for research  Widely used for CMOS purpose. fabrication. Structure is not  Mostly used for defined. structure defining. Defines extremely  Reduced wavelength small features. become fuzzy. Not suitable for large  High end deep volume because the lithography process is very slow.
  14. 14. Steps involved in the fabrication of the PHOTONICCRYSTALS are given below,
  15. 15. o The deep uv lithography facilities we use 5500/300 deep uv stepper with an illumination wavelength of 248 nm.o The stepper uses 200 nm wafers.o It is used in resist coating, baking, and development.o Steps for lithography, 1. Wafer illuminated in stepper 2. Post exposure bake – resist impurity isremoved 3. Development
  16. 16. The etching of the SOI wafer is done using a doubleetch, in different chambers
  17. 17.  No air is exposed when two chambers are etched. The top layer of silicon is etched using LOW PRESSURE and HIGH DENSITY. The top layer of silicon can be replaced by AMORPHOUS SILICON.
  18. 18.  The first lithography test were carried out using a CMOS process evaluation mask with dense contact holes. For perfect crystal we expose LARGER HOLES but SAME PITCH (400 to 600 nm), ratio is (0.25 to 0.35). Vertical sidewalls show roughness in square lattices so we prefer SUPERDENSE TRIANGULAR LATTICES
  19. 19.  The triangular lattice provides various pitch and hole size, both in top-down and cross-section view. Holes are very uniform through out the lattice. There is an strong effect of side lobes from the crystal wall.
  20. 20. A common problem in dense structures are,1. The size and shape of a structure is changed with the presence of a neighboring structures.2. The various structures on photonic Ics each require different lithography conditions.3. The effects are, (a) Optical Proximity Effects (b) Line Hole Bias
  21. 21.  Photonic crystals are superdense periodic structures with feature sizes close to the illumination wavelength. During lithography, neighboring holes interfere with eachother. Due to this the holes get larger or smaller during the print. This phenomenon is called as OPTICAL PROXIMITY EFFECTS (OPE).
  22. 22.  The denser the structures and the smaller the pitch, the stronger the OPE becomes
  23. 23.  The border holes are smaller than the holes in the bulks. The hole in the inner corner prints more smaller than the border holes. EXAMPLE: When the OPE of the lattice with arelatively large pitch of 530 nm, but with holes targetedat 420 nm.
  24. 24. 18 16 14 12 10 design print 8 6 target print 4 2 0 200 400 600 800 Different geometrics are on the same level of the chip, and preferably printed together. Small holes needs a much higher illumination than the larger holes i.e, a few hundreds of nm in width.
  25. 25.  The new mask structures should be included to study the effect of OPE in photonic crystals. The lithography should target the features with the highest exposure. The bias should be applied on the mask to the features that need less energy to print on target.
  26. 26. 1. Deep uv lithography has potential for the mass fabrication of ultra compact photonic Ics based on photonic crystal.2. SOI shows well defined holes with very little edge roughness.3. The neighboring of the holes can be avoided by using OPTICAL PROXIMITY CORRECTION (OPC) method.4. Thus, deep uv lithography is suitable for providing mass-manufacturing capabilities to the ultracompact photonic Ics.
  27. 27. • Fabrication of photonic crystals in SOI using 248 nm deep uv lithography, IEEE.• SOI Photonic Crystal Fabrication Using Deep UV Lithography, IEEE.••