This content covers second unit COMPUTER ARCHITECTURE AND ORGANIZATION framed as per syllabus of Anna University 2017 Regulation.. This upload covers what is fixed and floating point operations. In fixed point operations the unsigned and signed addition and subtraction has been covered .
3. NUMBER SYSTEMS
Human beings use decimal (base 10)
and duodecimal (base 12) number systems for
counting and measurements.
Computers use binary (base 2) number system, as
they are made from binary digital components
(known as transistors) operating in two states - on
and off.
In computing, we also use hexadecimal (base 16)
or octal (base 8) number systems, as a compact form
for representing binary numbers.
Example :10101010 AA(H) and 252(O)
5. WHAT IS FIXED AND FLOATING POINT?
A fixed point number just means that there are
a fixed number of digits after the decimal point.
EX:123.45, 1234.56, 12345.67
A floating point number allows for a varying
number of digits after the decimal point.
EX:1.234567, 0.00001234567
6. FIXED POINT NUMBERS
Computers use a fixed number of bits to represent an
integer. The commonly-used bit-lengths for integers
are 8-bit, 16-bit, 32-bit or 64-bit.
There are two representation schemes for integers:
Unsigned Integers: can represent zero and positive
integers.
Signed Integers: can represent zero, positive and
negative integers.
Three representation schemes had been proposed for
signed integers:
Sign-Magnitude representation
1's Complement representation
2's Complement representation
7. CONVERTION OF DECIMAL NUMBER 30
INTO 8 BIT BINARY NUMBER
8 7 6 5 4 3 2 1 8-bits
2^7 2^6 2^5 2^4 2^3 2^2 2^1 2^0 2^n
representation
128 64 32 16 8 4 2 1 value
0 0 0 1 1 1 1 0 Eg: for value 30
in 8 bit
8.
9. UNSIGNED NUMBERS
N bits -Magnitude (absolute value) of the integer
EXAMPLE: UNSIGNED ADDITION AND SUBTRACTION
8 - 4 in 4 bit
representation
8 1000
4 0100 (-)
------------------
4 0100
----------------------
8 + 4 in 4 bit
representation
8 1000
4 0100 (+)
------------------
12 1100
----------------------
11. SIGN MAGINTUDE 1’S COMPLEMENT 2’S COMPLEMENT
Nth bit or
MSB
N-1bits
Sign bit
FOR POSITIVE INTEGER
Magnitude (absolute value) of the
integer
FOR NEGATIVE INTEGER
Magnitude (absolute value) of the
integer
Sign bit
FOR POSITIVE INTEGER
Magnitude (absolute value) of the
integer.
FOR NEGATIVE INTEGER
Magnitude of
the complement (inverse) of the (n-
1)-bit binary pattern
Sign bit
FOR POSITIVE INTEGER
Magnitude (absolute value) of
the integer.
FOR NEGATIVE INTEGER
Magnitude of the complement of
the (n-1)-bit binary pattern plus
one
Example:
Taken 8 bit
representati
on
+10000 0001
-11000 0001
+00000 0000
-01000 0000
+10000 0001
-11111 1110
+00000 0000
-01111 1111
+10000 0001
-11111 1111
+00000 0000
-00000 0000
Drawback 1. There are two representations
for the number zero.
2. Positive and negative integers
need to be processed
separately.
1. There are two representations
for the number zero.
2. Positive and negative integers
need to be processed
separately.
1.There is only one
representation for the number
zero
2.Positive and negative integers
can be treated together in
addition and subtraction.
Subtraction can be carried out
using the "addition logic".
12. SIGN MAGINTUDE 1’S COMPLEMENT 2’S COMPLEMENT
Usual
Subtraction in 5
bit
representation
+8 01000
+4 00100 (-)
---------------
+4 00100
----------------
+8 01000
+4 00100 (-)
---------------
+4 00100
---------------
+8 01000
+4 00100 (-)
---------------
+4 00100
---------------
Using addition
to perform
subtraction
+8 01000
-4 10100 (+)
---------------
-12 11100
-----------------
+8 01000
-4 11011 (+)
---------------
+3 00011
---------------
with carry 1 which
should be omitted
+8 01000
-4 11100 (+)
---------------
+4 00100
---------------
with carry 1
which should be
omitted
13. OVERFLOW RULE FOR ADDITION
If two numbers which are both positive or negative
are added, then overflow occurs if and only if the
result has the opposite sign
OVERFLOW RULE FOR SUBTRACTION
If two numbers with opposite sign are subtracted,
then overflow occurs if and only if the result has the
opposite sign