SlideShare a Scribd company logo

regmap: The power of subsystems and abstractions

•
•
Mark Brown
Mark Brown

The document discusses the regmap subsystem in Linux, which provides an abstraction for register-based I/O. It was originally developed for audio CODECs but can now be used across different device classes. Regmap handles common tasks like register access, caching, and logging to simplify driver development and encourage best practices. It has expanded to support various features including interrupts, MMIO, and paging.

Technology
1 of 21
Download to read offline
regmap The power of subsystems and abstractions 1 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
Overview • The quality of the subsystems is key to Linux • Factor common code out of drivers • Simplify driver development • Encourage best practice • Maximise the impact of features • regmap provides a good case study • Register I/O for I2C and SPI • Originally in ASoC for audio CODECs • Traditionally open coded in drivers • Now provides benefits for totally different device classes • Nothing like it in other operating systems 2 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
In the beginning… • ASoC CODEC drivers need to provide configuration to users • Saw that there were lots of register bitfields like: • R0 INL_VOL [5:0]: Left input PGA Volume -23.25dB to +24.00dB in 0.75dB steps • R1 INR_VOL [5:0]: Right input PGA Volume -23.25dB to +24.00dB in 0.75dB steps • Factored this out into standard helpers for drivers: • SOC_DOUBLE_R_TLV("Capture Volume", WM8962_LEFT_INPUT_VOLUME, WM8962_RIGHT_INPUT_VOLUME, 0, 63, 0, inpga_tlv), • Supported with CODEC callbacks: • int read(struct snd_soc_codec *codec, int reg); • int write(struct snd_soc_codec *codec, int reg, int value); 3 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
Quick wins • Save some boilerplate • Simple factor out of one very common operation • snd_soc_update_bits(struct snd_soc_codec *codec, int reg, int mask, int val); • Can suppress no op changes • Make best practice clear and obvious 4 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
Register dumps • Using: • Register read and write operations • Ideally also the maximum register address • The subsystem can provide register dumps as a standard feature: 0000: abcd 0001: 5e32 • Common output format • Support for reading only specific registers • Write support • Enabled by previous factoring out 5 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
Register caches • Had been open coded in drivers • Layered in with a little bit more data • Register default values • Volatile registers • Really nice feature • Many devices don’t support readback • Performance improvement • Simplifies suspend and resume 6 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
Physical I/O • The hardware interface is very consistent over devices: SCLK SDA D7 D1 R/W A6 A0 B8 B7 B1 B0 START device ID (Write) ACK register address B8 ACK data bits B7 – B0 ACK STOP Note: The SDA pin is used as input for the control register address and data; SDA is pulled low by the receiving device to provide the acknowledge (ACK) response • Register followed by value, big endian • Standard implementation of read and write • Subsystem ensures all drivers get the fiddly bits right • Byte swapping • Interoperability with controller features • Performance tricks 7 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
Factoring out regmap • These patterns are present in many other devices • PMICs • Input controllers • GPIO expanders • Move the code out of ASoC • drivers/base/regmap • Gradual merge • v3.1: simple register I/O functionality for I2C and SPI • v3.2: caches, tracepoints and debugfs 8 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
Device description struct regmap_config { int reg_bits; int pad_bits; int val_bits; bool (*writeable_reg)(struct device *dev, unsigned int reg); bool (*readable_reg)(struct device *dev, unsigned int reg); bool (*volatile_reg)(struct device *dev, unsigned int reg); bool (*precious_reg)(struct device *dev, unsigned int reg); unsigned int max_register; const struct reg_default *reg_defaults; unsigned int num_reg_defaults; }; 9 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
Core API struct regmap *devm_regmap_init_i2c(struct i2c_client *i2c, const struct regmap_config *config); int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val); int regmap_write(struct regmap *map, unsigned int reg, unsigned int val); int regmap_update_bits(struct regmap *map, unsigned int reg, unsigned int mask, unsigned int val); int regcache_sync(struct regmap *map); void regcache_cache_only(struct regmap *map, bool enable); void regcache_mark_dirty(struct regmap *map); 10 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
Complex register caches • Initially caches just used a flat array • Not so good when caching devices with 32 bit addresses • Solved with better cache types • rbtree stores blocks of contiguous registers in a red/black tree (436 lines) • Compressed stores blocks of compressed data (380 lines) • Both rely on existing kernel libraries enum regcache_type cache_type; 11 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
Tracepoints/Logging • Simple, low overhead logging subsystem • Can be built in all the time and running all the time • Standard format allows reusable tooling in userspace • Key tracepoints for regmap: • regmap_reg_write 0-001a reg=1a val=3c • regmap_reg_read 0-001a reg=1 val=3c • See more in debugfs/trace/events/regmap/ • Also a simple define LOG_DEVICE for early init logging 12 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
Register patches • Magic register writes done at device startup • Performance tuning • Workarounds • Integrated into cache sync int regmap_register_patch(struct regmap *map, const struct reg_default *regs, int num_regs); 13 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
Paging support • Common hardware pattern, adds another level of addressing • Supported in regmap by creating virtual registers • Standard interface allows upper level code to ignore paging struct regmap_range_cfg { const char *name; unsigned int range_min; unsigned int range_max; unsigned int selector_reg; unsigned int selector_mask; int selector_shift; unsigned int window_start; unsigned int window_len; }; 14 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
MMIO support • Cache and diagnostic infrastructure isn’t just useful to I2C and SPI • Allows really simple integration with runtime PM 15 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
Interrupt controller • Common patterns in interrupt controllers • Status register • Mask register • Lots of fiddly stuff with interrupt core due to blocking in “interrupt” context • Frequently cut’n’pasted • Including the comments! 16 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
Interrupt controller struct regmap_irq { unsigned int reg_offset; unsigned int mask; }; struct regmap_irq_chip { const char *name; unsigned int status_base; unsigned int mask_base; unsigned int ack_base; unsigned int wake_base; unsigned int irq_reg_stride; unsigned int mask_invert; bool runtime_pm; const struct regmap_irq *irqs; int num_irqs; }; 17 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
Feature summary • v3.1: simple register I/O functionality for I2C and SPI • v3.2: caches, tracepoints and debugfs • v3.3: interrupt controller • v3.4: patches • v3.5: MMIO bus • v3.6: paging support • regmap based helpers for ASoC, regulator and IRQ 18 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
Future work • Support for devices providing their own set and get register operations without formatting (eg, for USB) • Performance improvements in cache sync • Combine rbtree and compressed into a single cache type • Common helpers for register access patterns • Simplify chips with dense interrupt controller bitfields • More helpers for subsystems 19 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
Thanks • Liam Girdwood, ASoC comaintainer and original author • Dimitris Papastamos, contributed advanced caches • Lars-Peter Clausen, early adopter & bug fixer • Stephen Warren, contributed regmap-mmio • Krystian Garbaciak, contributed paging support • Laxman Dewangan, contributed a bunch of improvements 20 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
Summary • Small abstractions pave the way for bigger ones • Solving things at the right level saves time and effort • Register I/O is very simple on Linux 21 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com

Recommended

Meeting SEP 2.0 Compliance: Developing Power Aware Embedded Systems for the M...
Meeting SEP 2.0 Compliance: Developing Power Aware Embedded Systems for the M...Meeting SEP 2.0 Compliance: Developing Power Aware Embedded Systems for the M...
Meeting SEP 2.0 Compliance: Developing Power Aware Embedded Systems for the M...
mentoresd
 
FPGA Camp - National Instruments Presentation
FPGA Camp - National Instruments PresentationFPGA Camp - National Instruments Presentation
FPGA Camp - National Instruments Presentation
FPGA Central
 
Challenges in mixed signal
Challenges in mixed signal Challenges in mixed signal
Challenges in mixed signal
chiportal
 
AMD Embedded G-Series Press Presentation
AMD Embedded G-Series Press PresentationAMD Embedded G-Series Press Presentation
AMD Embedded G-Series Press Presentation
AMD
 
513 516
513 516513 516
513 516
Editor IJARCET
 
NI Compact RIO Platform
NI Compact RIO PlatformNI Compact RIO Platform
NI Compact RIO Platform
jlai
 
E scala design platform
E scala design platformE scala design platform
E scala design platform
esenciatech
 
MIPI DevCon 2016: Accelerating Software Development for MIPI CSI-2 Cameras
MIPI DevCon 2016: Accelerating Software Development for MIPI CSI-2 CamerasMIPI DevCon 2016: Accelerating Software Development for MIPI CSI-2 Cameras
MIPI DevCon 2016: Accelerating Software Development for MIPI CSI-2 Cameras
MIPI Alliance
 

Recommended

Meeting SEP 2.0 Compliance: Developing Power Aware Embedded Systems for the M...
Meeting SEP 2.0 Compliance: Developing Power Aware Embedded Systems for the M...Meeting SEP 2.0 Compliance: Developing Power Aware Embedded Systems for the M...
Meeting SEP 2.0 Compliance: Developing Power Aware Embedded Systems for the M...
mentoresd
 
FPGA Camp - National Instruments Presentation
FPGA Camp - National Instruments PresentationFPGA Camp - National Instruments Presentation
FPGA Camp - National Instruments Presentation
FPGA Central
 
Challenges in mixed signal
Challenges in mixed signal Challenges in mixed signal
Challenges in mixed signal
chiportal
 
AMD Embedded G-Series Press Presentation
AMD Embedded G-Series Press PresentationAMD Embedded G-Series Press Presentation
AMD Embedded G-Series Press Presentation
AMD
 
513 516
513 516513 516
513 516
Editor IJARCET
 
NI Compact RIO Platform
NI Compact RIO PlatformNI Compact RIO Platform
NI Compact RIO Platform
jlai
 
E scala design platform
E scala design platformE scala design platform
E scala design platform
esenciatech
 
MIPI DevCon 2016: Accelerating Software Development for MIPI CSI-2 Cameras
MIPI DevCon 2016: Accelerating Software Development for MIPI CSI-2 CamerasMIPI DevCon 2016: Accelerating Software Development for MIPI CSI-2 Cameras
MIPI DevCon 2016: Accelerating Software Development for MIPI CSI-2 Cameras
MIPI Alliance
 
Arista @ HPC on Wall Street 2012
Arista @ HPC on Wall Street 2012Arista @ HPC on Wall Street 2012
Arista @ HPC on Wall Street 2012
Kazunori Sato
 
SoC: System On Chip
SoC: System On ChipSoC: System On Chip
SoC: System On Chip
Santosh Verma
 
MPU and MCU IP Cores from CAST
MPU and MCU IP Cores from CASTMPU and MCU IP Cores from CAST
MPU and MCU IP Cores from CAST
CAST, Inc.
 
The Microarchitecure Of FPGA Based Soft Processor
The Microarchitecure Of FPGA Based Soft ProcessorThe Microarchitecure Of FPGA Based Soft Processor
The Microarchitecure Of FPGA Based Soft Processor
Deepak Tomar
 
AMD Catalyst Software
AMD Catalyst Software AMD Catalyst Software
AMD Catalyst Software
AMD
 
XS Japan 2008 BitVisor English
XS Japan 2008 BitVisor EnglishXS Japan 2008 BitVisor English
XS Japan 2008 BitVisor English
The Linux Foundation
 
VVDN Presentation
VVDN PresentationVVDN Presentation
VVDN Presentation
vibansal
 
CHARMED Upgrading the UT Pickle Separations to DeltaV v11
CHARMED Upgrading the UT Pickle Separations to DeltaV v11CHARMED Upgrading the UT Pickle Separations to DeltaV v11
CHARMED Upgrading the UT Pickle Separations to DeltaV v11
Emerson Exchange
 
Trinity press deck 10 2 2012
Trinity press deck 10 2 2012Trinity press deck 10 2 2012
Trinity press deck 10 2 2012
AMD
 
SudheerV_resume_a
SudheerV_resume_aSudheerV_resume_a
SudheerV_resume_a
Sudheer Vegesna
 
SOC Chip Basics
SOC Chip BasicsSOC Chip Basics
SOC Chip Basics
A B Shinde
 
Track B- Advanced ESL verification - Mentor
Track B- Advanced ESL verification - MentorTrack B- Advanced ESL verification - Mentor
Track B- Advanced ESL verification - Mentor
chiportal
 
CAST BA22 32-bit Processor Design Seminar, 2/1/12
CAST BA22 32-bit Processor Design Seminar, 2/1/12CAST BA22 32-bit Processor Design Seminar, 2/1/12
CAST BA22 32-bit Processor Design Seminar, 2/1/12
CAST, Inc.
 
SoC Design
SoC DesignSoC Design
SoC Design
VinChip Systems - VinTrain VLSI Academy
 
Soc architecture and design
Soc architecture and designSoc architecture and design
Soc architecture and design
Satya Harish
 
System on Chip (SoC) for mobile phones
System on Chip (SoC) for mobile phonesSystem on Chip (SoC) for mobile phones
System on Chip (SoC) for mobile phones
Jeffrey Funk
 
ASIC vs SOC vs FPGA
ASIC vs SOC vs FPGAASIC vs SOC vs FPGA
ASIC vs SOC vs FPGA
Verification Excellence
 
Software hardware co-design using xilinx zynq soc
Software hardware co-design using xilinx zynq socSoftware hardware co-design using xilinx zynq soc
Software hardware co-design using xilinx zynq soc
Hossam Hassan
 
OpenEye IP Video Basics
OpenEye IP Video BasicsOpenEye IP Video Basics
OpenEye IP Video Basics
openeyevideo
 
Fpga asic technologies_flow
Fpga asic technologies_flowFpga asic technologies_flow
Fpga asic technologies_flow
ravi4all
 
Regulators learning to play with others
Regulators learning to play with othersRegulators learning to play with others
Regulators learning to play with others
Mark Brown
 
Kernelci.org needs you!
Kernelci.org needs you!Kernelci.org needs you!
Kernelci.org needs you!
Mark Brown
 

More Related Content

What's hot

Arista @ HPC on Wall Street 2012
Arista @ HPC on Wall Street 2012Arista @ HPC on Wall Street 2012
Arista @ HPC on Wall Street 2012
Kazunori Sato
 
SoC: System On Chip
SoC: System On ChipSoC: System On Chip
SoC: System On Chip
Santosh Verma
 
MPU and MCU IP Cores from CAST
MPU and MCU IP Cores from CASTMPU and MCU IP Cores from CAST
MPU and MCU IP Cores from CAST
CAST, Inc.
 
The Microarchitecure Of FPGA Based Soft Processor
The Microarchitecure Of FPGA Based Soft ProcessorThe Microarchitecure Of FPGA Based Soft Processor
The Microarchitecure Of FPGA Based Soft Processor
Deepak Tomar
 
AMD Catalyst Software
AMD Catalyst Software AMD Catalyst Software
AMD Catalyst Software
AMD
 
XS Japan 2008 BitVisor English
XS Japan 2008 BitVisor EnglishXS Japan 2008 BitVisor English
XS Japan 2008 BitVisor English
The Linux Foundation
 
VVDN Presentation
VVDN PresentationVVDN Presentation
VVDN Presentation
vibansal
 
CHARMED Upgrading the UT Pickle Separations to DeltaV v11
CHARMED Upgrading the UT Pickle Separations to DeltaV v11CHARMED Upgrading the UT Pickle Separations to DeltaV v11
CHARMED Upgrading the UT Pickle Separations to DeltaV v11
Emerson Exchange
 
Trinity press deck 10 2 2012
Trinity press deck 10 2 2012Trinity press deck 10 2 2012
Trinity press deck 10 2 2012
AMD
 
SudheerV_resume_a
SudheerV_resume_aSudheerV_resume_a
SudheerV_resume_a
Sudheer Vegesna
 
SOC Chip Basics
SOC Chip BasicsSOC Chip Basics
SOC Chip Basics
A B Shinde
 
Track B- Advanced ESL verification - Mentor
Track B- Advanced ESL verification - MentorTrack B- Advanced ESL verification - Mentor
Track B- Advanced ESL verification - Mentor
chiportal
 
CAST BA22 32-bit Processor Design Seminar, 2/1/12
CAST BA22 32-bit Processor Design Seminar, 2/1/12CAST BA22 32-bit Processor Design Seminar, 2/1/12
CAST BA22 32-bit Processor Design Seminar, 2/1/12
CAST, Inc.
 
SoC Design
SoC DesignSoC Design
SoC Design
VinChip Systems - VinTrain VLSI Academy
 
Soc architecture and design
Soc architecture and designSoc architecture and design
Soc architecture and design
Satya Harish
 
System on Chip (SoC) for mobile phones
System on Chip (SoC) for mobile phonesSystem on Chip (SoC) for mobile phones
System on Chip (SoC) for mobile phones
Jeffrey Funk
 
ASIC vs SOC vs FPGA
ASIC vs SOC vs FPGAASIC vs SOC vs FPGA
ASIC vs SOC vs FPGA
Verification Excellence
 
Software hardware co-design using xilinx zynq soc
Software hardware co-design using xilinx zynq socSoftware hardware co-design using xilinx zynq soc
Software hardware co-design using xilinx zynq soc
Hossam Hassan
 
OpenEye IP Video Basics
OpenEye IP Video BasicsOpenEye IP Video Basics
OpenEye IP Video Basics
openeyevideo
 
Fpga asic technologies_flow
Fpga asic technologies_flowFpga asic technologies_flow
Fpga asic technologies_flow
ravi4all
 

What's hot (20)

Arista @ HPC on Wall Street 2012
Arista @ HPC on Wall Street 2012Arista @ HPC on Wall Street 2012
Arista @ HPC on Wall Street 2012
 
SoC: System On Chip
SoC: System On ChipSoC: System On Chip
SoC: System On Chip
 
MPU and MCU IP Cores from CAST
MPU and MCU IP Cores from CASTMPU and MCU IP Cores from CAST
MPU and MCU IP Cores from CAST
 
The Microarchitecure Of FPGA Based Soft Processor
The Microarchitecure Of FPGA Based Soft ProcessorThe Microarchitecure Of FPGA Based Soft Processor
The Microarchitecure Of FPGA Based Soft Processor
 
AMD Catalyst Software
AMD Catalyst Software AMD Catalyst Software
AMD Catalyst Software
 
XS Japan 2008 BitVisor English
XS Japan 2008 BitVisor EnglishXS Japan 2008 BitVisor English
XS Japan 2008 BitVisor English
 
VVDN Presentation
VVDN PresentationVVDN Presentation
VVDN Presentation
 
CHARMED Upgrading the UT Pickle Separations to DeltaV v11
CHARMED Upgrading the UT Pickle Separations to DeltaV v11CHARMED Upgrading the UT Pickle Separations to DeltaV v11
CHARMED Upgrading the UT Pickle Separations to DeltaV v11
 
Trinity press deck 10 2 2012
Trinity press deck 10 2 2012Trinity press deck 10 2 2012
Trinity press deck 10 2 2012
 
SudheerV_resume_a
SudheerV_resume_aSudheerV_resume_a
SudheerV_resume_a
 
SOC Chip Basics
SOC Chip BasicsSOC Chip Basics
SOC Chip Basics
 
Track B- Advanced ESL verification - Mentor
Track B- Advanced ESL verification - MentorTrack B- Advanced ESL verification - Mentor
Track B- Advanced ESL verification - Mentor
 
CAST BA22 32-bit Processor Design Seminar, 2/1/12
CAST BA22 32-bit Processor Design Seminar, 2/1/12CAST BA22 32-bit Processor Design Seminar, 2/1/12
CAST BA22 32-bit Processor Design Seminar, 2/1/12
 
SoC Design
SoC DesignSoC Design
SoC Design
 
Soc architecture and design
Soc architecture and designSoc architecture and design
Soc architecture and design
 
System on Chip (SoC) for mobile phones
System on Chip (SoC) for mobile phonesSystem on Chip (SoC) for mobile phones
System on Chip (SoC) for mobile phones
 
ASIC vs SOC vs FPGA
ASIC vs SOC vs FPGAASIC vs SOC vs FPGA
ASIC vs SOC vs FPGA
 
Software hardware co-design using xilinx zynq soc
Software hardware co-design using xilinx zynq socSoftware hardware co-design using xilinx zynq soc
Software hardware co-design using xilinx zynq soc
 
OpenEye IP Video Basics
OpenEye IP Video BasicsOpenEye IP Video Basics
OpenEye IP Video Basics
 
Fpga asic technologies_flow
Fpga asic technologies_flowFpga asic technologies_flow
Fpga asic technologies_flow
 

Viewers also liked

Regulators learning to play with others
Regulators learning to play with othersRegulators learning to play with others
Regulators learning to play with others
Mark Brown
 
Kernelci.org needs you!
Kernelci.org needs you!Kernelci.org needs you!
Kernelci.org needs you!
Mark Brown
 
Linux audio for smartphones
Linux audio for smartphonesLinux audio for smartphones
Linux audio for smartphones
Mark Brown
 
LCU13: Linaro Stable Kernel
LCU13: Linaro Stable KernelLCU13: Linaro Stable Kernel
LCU13: Linaro Stable Kernel
Mark Brown
 
What's going on with SPI
What's going on with SPI What's going on with SPI
What's going on with SPI
Mark Brown
 
I2C Subsystem In Linux-2.6.24
I2C Subsystem In Linux-2.6.24I2C Subsystem In Linux-2.6.24
I2C Subsystem In Linux-2.6.24
Varun Mahajan
 

Viewers also liked (6)

Regulators learning to play with others
Regulators learning to play with othersRegulators learning to play with others
Regulators learning to play with others
 
Kernelci.org needs you!
Kernelci.org needs you!Kernelci.org needs you!
Kernelci.org needs you!
 
Linux audio for smartphones
Linux audio for smartphonesLinux audio for smartphones
Linux audio for smartphones
 
LCU13: Linaro Stable Kernel
LCU13: Linaro Stable KernelLCU13: Linaro Stable Kernel
LCU13: Linaro Stable Kernel
 
What's going on with SPI
What's going on with SPI What's going on with SPI
What's going on with SPI
 
I2C Subsystem In Linux-2.6.24
I2C Subsystem In Linux-2.6.24I2C Subsystem In Linux-2.6.24
I2C Subsystem In Linux-2.6.24
 

Similar to regmap: The power of subsystems and abstractions

SYBSC IT SEM IV EMBEDDED SYSTEMS UNIT I Core of Embedded Systems
SYBSC IT SEM IV EMBEDDED SYSTEMS UNIT I Core of Embedded SystemsSYBSC IT SEM IV EMBEDDED SYSTEMS UNIT I Core of Embedded Systems
SYBSC IT SEM IV EMBEDDED SYSTEMS UNIT I Core of Embedded Systems
Arti Parab Academics
 
Summer training embedded system and its scope
Summer training embedded system and its scopeSummer training embedded system and its scope
Summer training embedded system and its scope
Arshit Rai
 
Summer training embedded system and its scope
Summer training embedded system and its scopeSummer training embedded system and its scope
Summer training embedded system and its scope
Arshit Rai
 
RTOS based Confidential Area Security System
RTOS based Confidential Area Security SystemRTOS based Confidential Area Security System
RTOS based Confidential Area Security System
ajinky gadewar
 
POLYTEDA: Power DRC/LVS, June 2017
POLYTEDA: Power DRC/LVS, June 2017POLYTEDA: Power DRC/LVS, June 2017
POLYTEDA: Power DRC/LVS, June 2017
Oleksandra Nazola
 
Schneider Electric Scada Global Support Provides Troubleshooting and Technica...
Schneider Electric Scada Global Support Provides Troubleshooting and Technica...Schneider Electric Scada Global Support Provides Troubleshooting and Technica...
Schneider Electric Scada Global Support Provides Troubleshooting and Technica...
Preeya Selvarajah
 
Project_updated
Project_updatedProject_updated
Project_updated
Shaikh Zaid
 
Polyteda Power DRC/LVS July 2016
Polyteda Power DRC/LVS July 2016Polyteda Power DRC/LVS July 2016
Polyteda Power DRC/LVS July 2016
Oleksandra Nazola
 
High Performance Computing Infrastructure: Past, Present, and Future
High Performance Computing Infrastructure: Past, Present, and FutureHigh Performance Computing Infrastructure: Past, Present, and Future
High Performance Computing Infrastructure: Past, Present, and Future
karl.barnes
 
Introduction to embedded System.pptx
Introduction to embedded System.pptxIntroduction to embedded System.pptx
Introduction to embedded System.pptx
Pratik Gohel
 
Polyteda: Power DRC/LVS, October 2016
Polyteda: Power DRC/LVS, October 2016Polyteda: Power DRC/LVS, October 2016
Polyteda: Power DRC/LVS, October 2016
Oleksandra Nazola
 
Linux on System z debugging with Valgrind
Linux on System z debugging with ValgrindLinux on System z debugging with Valgrind
Linux on System z debugging with Valgrind
IBM India Smarter Computing
 
MÁY KIỂM KHO DATALOGIC Dh60
MÁY KIỂM KHO DATALOGIC Dh60 MÁY KIỂM KHO DATALOGIC Dh60
MÁY KIỂM KHO DATALOGIC Dh60
Radiant Global ADC Vietnam Co., Ltd.
 
Developing micro controller applications
Developing micro controller applicationsDeveloping micro controller applications
Developing micro controller applications
Steve Mylroie
 
Embedded systems
Embedded systemsEmbedded systems
Embedded systems
Manju Nathan
 
ankit
ankitankit
ankit
ankit kumar
 
PowerDRC/LVS 2.2 released by POLYTEDA
PowerDRC/LVS 2.2 released by POLYTEDAPowerDRC/LVS 2.2 released by POLYTEDA
PowerDRC/LVS 2.2 released by POLYTEDA
Alexander Grudanov
 
Ramprasad-CV_3+yrs
Ramprasad-CV_3+yrsRamprasad-CV_3+yrs
Ramprasad-CV_3+yrs
Ramprasad B
 
Vlsi lab
Vlsi labVlsi lab
Vlsi lab
Hendrick Rick
 
“High-Efficiency Edge Vision Processing Based on Dynamically Reconfigurable T...
“High-Efficiency Edge Vision Processing Based on Dynamically Reconfigurable T...“High-Efficiency Edge Vision Processing Based on Dynamically Reconfigurable T...
“High-Efficiency Edge Vision Processing Based on Dynamically Reconfigurable T...
Edge AI and Vision Alliance
 

Similar to regmap: The power of subsystems and abstractions (20)

SYBSC IT SEM IV EMBEDDED SYSTEMS UNIT I Core of Embedded Systems
SYBSC IT SEM IV EMBEDDED SYSTEMS UNIT I Core of Embedded SystemsSYBSC IT SEM IV EMBEDDED SYSTEMS UNIT I Core of Embedded Systems
SYBSC IT SEM IV EMBEDDED SYSTEMS UNIT I Core of Embedded Systems
 
Summer training embedded system and its scope
Summer training embedded system and its scopeSummer training embedded system and its scope
Summer training embedded system and its scope
 
Summer training embedded system and its scope
Summer training embedded system and its scopeSummer training embedded system and its scope
Summer training embedded system and its scope
 
RTOS based Confidential Area Security System
RTOS based Confidential Area Security SystemRTOS based Confidential Area Security System
RTOS based Confidential Area Security System
 
POLYTEDA: Power DRC/LVS, June 2017
POLYTEDA: Power DRC/LVS, June 2017POLYTEDA: Power DRC/LVS, June 2017
POLYTEDA: Power DRC/LVS, June 2017
 
Schneider Electric Scada Global Support Provides Troubleshooting and Technica...
Schneider Electric Scada Global Support Provides Troubleshooting and Technica...Schneider Electric Scada Global Support Provides Troubleshooting and Technica...
Schneider Electric Scada Global Support Provides Troubleshooting and Technica...
 
Project_updated
Project_updatedProject_updated
Project_updated
 
Polyteda Power DRC/LVS July 2016
Polyteda Power DRC/LVS July 2016Polyteda Power DRC/LVS July 2016
Polyteda Power DRC/LVS July 2016
 
High Performance Computing Infrastructure: Past, Present, and Future
High Performance Computing Infrastructure: Past, Present, and FutureHigh Performance Computing Infrastructure: Past, Present, and Future
High Performance Computing Infrastructure: Past, Present, and Future
 
Introduction to embedded System.pptx
Introduction to embedded System.pptxIntroduction to embedded System.pptx
Introduction to embedded System.pptx
 
Polyteda: Power DRC/LVS, October 2016
Polyteda: Power DRC/LVS, October 2016Polyteda: Power DRC/LVS, October 2016
Polyteda: Power DRC/LVS, October 2016
 
Linux on System z debugging with Valgrind
Linux on System z debugging with ValgrindLinux on System z debugging with Valgrind
Linux on System z debugging with Valgrind
 
MÁY KIỂM KHO DATALOGIC Dh60
MÁY KIỂM KHO DATALOGIC Dh60 MÁY KIỂM KHO DATALOGIC Dh60
MÁY KIỂM KHO DATALOGIC Dh60
 
Developing micro controller applications
Developing micro controller applicationsDeveloping micro controller applications
Developing micro controller applications
 
Embedded systems
Embedded systemsEmbedded systems
Embedded systems
 
ankit
ankitankit
ankit
 
PowerDRC/LVS 2.2 released by POLYTEDA
PowerDRC/LVS 2.2 released by POLYTEDAPowerDRC/LVS 2.2 released by POLYTEDA
PowerDRC/LVS 2.2 released by POLYTEDA
 
Ramprasad-CV_3+yrs
Ramprasad-CV_3+yrsRamprasad-CV_3+yrs
Ramprasad-CV_3+yrs
 
Vlsi lab
Vlsi labVlsi lab
Vlsi lab
 
“High-Efficiency Edge Vision Processing Based on Dynamically Reconfigurable T...
“High-Efficiency Edge Vision Processing Based on Dynamically Reconfigurable T...“High-Efficiency Edge Vision Processing Based on Dynamically Reconfigurable T...
“High-Efficiency Edge Vision Processing Based on Dynamically Reconfigurable T...
 

Recently uploaded

Video Streaming: Then, Now, and in the Future
Video Streaming: Then, Now, and in the FutureVideo Streaming: Then, Now, and in the Future
Video Streaming: Then, Now, and in the Future
Alpen-Adria-Universität
 
Alt. GDG Cloud Southlake #33: Boule & Rebala: Effective AppSec in SDLC using ...
Alt. GDG Cloud Southlake #33: Boule & Rebala: Effective AppSec in SDLC using ...Alt. GDG Cloud Southlake #33: Boule & Rebala: Effective AppSec in SDLC using ...
Alt. GDG Cloud Southlake #33: Boule & Rebala: Effective AppSec in SDLC using ...
James Anderson
 
Climate Impact of Software Testing at Nordic Testing Days
Climate Impact of Software Testing at Nordic Testing DaysClimate Impact of Software Testing at Nordic Testing Days
Climate Impact of Software Testing at Nordic Testing Days
Kari Kakkonen
 
20240605 QFM017 Machine Intelligence Reading List May 2024
20240605 QFM017 Machine Intelligence Reading List May 202420240605 QFM017 Machine Intelligence Reading List May 2024
20240605 QFM017 Machine Intelligence Reading List May 2024
Matthew Sinclair
 
Encryption in Microsoft 365 - ExpertsLive Netherlands 2024
Encryption in Microsoft 365 - ExpertsLive Netherlands 2024Encryption in Microsoft 365 - ExpertsLive Netherlands 2024
Encryption in Microsoft 365 - ExpertsLive Netherlands 2024
Albert Hoitingh
 
Microsoft - Power Platform_G.Aspiotis.pdf
Microsoft - Power Platform_G.Aspiotis.pdfMicrosoft - Power Platform_G.Aspiotis.pdf
Microsoft - Power Platform_G.Aspiotis.pdf
Uni Systems S.M.S.A.
 
UiPath Test Automation using UiPath Test Suite series, part 5
UiPath Test Automation using UiPath Test Suite series, part 5UiPath Test Automation using UiPath Test Suite series, part 5
UiPath Test Automation using UiPath Test Suite series, part 5
DianaGray10
 
Cosa hanno in comune un mattoncino Lego e la backdoor XZ?
Cosa hanno in comune un mattoncino Lego e la backdoor XZ?Cosa hanno in comune un mattoncino Lego e la backdoor XZ?
Cosa hanno in comune un mattoncino Lego e la backdoor XZ?
Speck&Tech
 
Goodbye Windows 11: Make Way for Nitrux Linux 3.5.0!
Goodbye Windows 11: Make Way for Nitrux Linux 3.5.0!Goodbye Windows 11: Make Way for Nitrux Linux 3.5.0!
Goodbye Windows 11: Make Way for Nitrux Linux 3.5.0!
SOFTTECHHUB
 
GraphSummit Singapore | Neo4j Product Vision & Roadmap - Q2 2024
GraphSummit Singapore | Neo4j Product Vision & Roadmap - Q2 2024GraphSummit Singapore | Neo4j Product Vision & Roadmap - Q2 2024
GraphSummit Singapore | Neo4j Product Vision & Roadmap - Q2 2024
Neo4j
 
How to Get CNIC Information System with Paksim Ga.pptx
How to Get CNIC Information System with Paksim Ga.pptxHow to Get CNIC Information System with Paksim Ga.pptx
How to Get CNIC Information System with Paksim Ga.pptx
danishmna97
 
Large Language Model (LLM) and it’s Geospatial Applications
Large Language Model (LLM) and it’s Geospatial ApplicationsLarge Language Model (LLM) and it’s Geospatial Applications
Large Language Model (LLM) and it’s Geospatial Applications
Rohit Gautam
 
Uni Systems Copilot event_05062024_C.Vlachos.pdf
Uni Systems Copilot event_05062024_C.Vlachos.pdfUni Systems Copilot event_05062024_C.Vlachos.pdf
Uni Systems Copilot event_05062024_C.Vlachos.pdf
Uni Systems S.M.S.A.
 
Observability Concepts EVERY Developer Should Know -- DeveloperWeek Europe.pdf
Observability Concepts EVERY Developer Should Know -- DeveloperWeek Europe.pdfObservability Concepts EVERY Developer Should Know -- DeveloperWeek Europe.pdf
Observability Concepts EVERY Developer Should Know -- DeveloperWeek Europe.pdf
Paige Cruz
 
Artificial Intelligence for XMLDevelopment
Artificial Intelligence for XMLDevelopmentArtificial Intelligence for XMLDevelopment
Artificial Intelligence for XMLDevelopment
Octavian Nadolu
 
Securing your Kubernetes cluster_ a step-by-step guide to success !
Securing your Kubernetes cluster_ a step-by-step guide to success !Securing your Kubernetes cluster_ a step-by-step guide to success !
Securing your Kubernetes cluster_ a step-by-step guide to success !
KatiaHIMEUR1
 
TrustArc Webinar - 2024 Global Privacy Survey
TrustArc Webinar - 2024 Global Privacy SurveyTrustArc Webinar - 2024 Global Privacy Survey
TrustArc Webinar - 2024 Global Privacy Survey
TrustArc
 
Enchancing adoption of Open Source Libraries. A case study on Albumentations.AI
Enchancing adoption of Open Source Libraries. A case study on Albumentations.AIEnchancing adoption of Open Source Libraries. A case study on Albumentations.AI
Enchancing adoption of Open Source Libraries. A case study on Albumentations.AI
Vladimir Iglovikov, Ph.D.
 
A tale of scale & speed: How the US Navy is enabling software delivery from l...
A tale of scale & speed: How the US Navy is enabling software delivery from l...A tale of scale & speed: How the US Navy is enabling software delivery from l...
A tale of scale & speed: How the US Navy is enabling software delivery from l...
sonjaschweigert1
 
Communications Mining Series - Zero to Hero - Session 1
Communications Mining Series - Zero to Hero - Session 1Communications Mining Series - Zero to Hero - Session 1
Communications Mining Series - Zero to Hero - Session 1
DianaGray10
 

Recently uploaded (20)

Video Streaming: Then, Now, and in the Future
Video Streaming: Then, Now, and in the FutureVideo Streaming: Then, Now, and in the Future
Video Streaming: Then, Now, and in the Future
 
Alt. GDG Cloud Southlake #33: Boule & Rebala: Effective AppSec in SDLC using ...
Alt. GDG Cloud Southlake #33: Boule & Rebala: Effective AppSec in SDLC using ...Alt. GDG Cloud Southlake #33: Boule & Rebala: Effective AppSec in SDLC using ...
Alt. GDG Cloud Southlake #33: Boule & Rebala: Effective AppSec in SDLC using ...
 
Climate Impact of Software Testing at Nordic Testing Days
Climate Impact of Software Testing at Nordic Testing DaysClimate Impact of Software Testing at Nordic Testing Days
Climate Impact of Software Testing at Nordic Testing Days
 
20240605 QFM017 Machine Intelligence Reading List May 2024
20240605 QFM017 Machine Intelligence Reading List May 202420240605 QFM017 Machine Intelligence Reading List May 2024
20240605 QFM017 Machine Intelligence Reading List May 2024
 
Encryption in Microsoft 365 - ExpertsLive Netherlands 2024
Encryption in Microsoft 365 - ExpertsLive Netherlands 2024Encryption in Microsoft 365 - ExpertsLive Netherlands 2024
Encryption in Microsoft 365 - ExpertsLive Netherlands 2024
 
Microsoft - Power Platform_G.Aspiotis.pdf
Microsoft - Power Platform_G.Aspiotis.pdfMicrosoft - Power Platform_G.Aspiotis.pdf
Microsoft - Power Platform_G.Aspiotis.pdf
 
UiPath Test Automation using UiPath Test Suite series, part 5
UiPath Test Automation using UiPath Test Suite series, part 5UiPath Test Automation using UiPath Test Suite series, part 5
UiPath Test Automation using UiPath Test Suite series, part 5
 
Cosa hanno in comune un mattoncino Lego e la backdoor XZ?
Cosa hanno in comune un mattoncino Lego e la backdoor XZ?Cosa hanno in comune un mattoncino Lego e la backdoor XZ?
Cosa hanno in comune un mattoncino Lego e la backdoor XZ?
 
Goodbye Windows 11: Make Way for Nitrux Linux 3.5.0!
Goodbye Windows 11: Make Way for Nitrux Linux 3.5.0!Goodbye Windows 11: Make Way for Nitrux Linux 3.5.0!
Goodbye Windows 11: Make Way for Nitrux Linux 3.5.0!
 
GraphSummit Singapore | Neo4j Product Vision & Roadmap - Q2 2024
GraphSummit Singapore | Neo4j Product Vision & Roadmap - Q2 2024GraphSummit Singapore | Neo4j Product Vision & Roadmap - Q2 2024
GraphSummit Singapore | Neo4j Product Vision & Roadmap - Q2 2024
 
How to Get CNIC Information System with Paksim Ga.pptx
How to Get CNIC Information System with Paksim Ga.pptxHow to Get CNIC Information System with Paksim Ga.pptx
How to Get CNIC Information System with Paksim Ga.pptx
 
Large Language Model (LLM) and it’s Geospatial Applications
Large Language Model (LLM) and it’s Geospatial ApplicationsLarge Language Model (LLM) and it’s Geospatial Applications
Large Language Model (LLM) and it’s Geospatial Applications
 
Uni Systems Copilot event_05062024_C.Vlachos.pdf
Uni Systems Copilot event_05062024_C.Vlachos.pdfUni Systems Copilot event_05062024_C.Vlachos.pdf
Uni Systems Copilot event_05062024_C.Vlachos.pdf
 
Observability Concepts EVERY Developer Should Know -- DeveloperWeek Europe.pdf
Observability Concepts EVERY Developer Should Know -- DeveloperWeek Europe.pdfObservability Concepts EVERY Developer Should Know -- DeveloperWeek Europe.pdf
Observability Concepts EVERY Developer Should Know -- DeveloperWeek Europe.pdf
 
Artificial Intelligence for XMLDevelopment
Artificial Intelligence for XMLDevelopmentArtificial Intelligence for XMLDevelopment
Artificial Intelligence for XMLDevelopment
 
Securing your Kubernetes cluster_ a step-by-step guide to success !
Securing your Kubernetes cluster_ a step-by-step guide to success !Securing your Kubernetes cluster_ a step-by-step guide to success !
Securing your Kubernetes cluster_ a step-by-step guide to success !
 
TrustArc Webinar - 2024 Global Privacy Survey
TrustArc Webinar - 2024 Global Privacy SurveyTrustArc Webinar - 2024 Global Privacy Survey
TrustArc Webinar - 2024 Global Privacy Survey
 
Enchancing adoption of Open Source Libraries. A case study on Albumentations.AI
Enchancing adoption of Open Source Libraries. A case study on Albumentations.AIEnchancing adoption of Open Source Libraries. A case study on Albumentations.AI
Enchancing adoption of Open Source Libraries. A case study on Albumentations.AI
 
A tale of scale & speed: How the US Navy is enabling software delivery from l...
A tale of scale & speed: How the US Navy is enabling software delivery from l...A tale of scale & speed: How the US Navy is enabling software delivery from l...
A tale of scale & speed: How the US Navy is enabling software delivery from l...
 
Communications Mining Series - Zero to Hero - Session 1
Communications Mining Series - Zero to Hero - Session 1Communications Mining Series - Zero to Hero - Session 1
Communications Mining Series - Zero to Hero - Session 1
 

regmap: The power of subsystems and abstractions

  • 1. regmap The power of subsystems and abstractions 1 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
  • 2. Overview • The quality of the subsystems is key to Linux • Factor common code out of drivers • Simplify driver development • Encourage best practice • Maximise the impact of features • regmap provides a good case study • Register I/O for I2C and SPI • Originally in ASoC for audio CODECs • Traditionally open coded in drivers • Now provides benefits for totally different device classes • Nothing like it in other operating systems 2 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
  • 3. In the beginning… • ASoC CODEC drivers need to provide configuration to users • Saw that there were lots of register bitfields like: • R0 INL_VOL [5:0]: Left input PGA Volume -23.25dB to +24.00dB in 0.75dB steps • R1 INR_VOL [5:0]: Right input PGA Volume -23.25dB to +24.00dB in 0.75dB steps • Factored this out into standard helpers for drivers: • SOC_DOUBLE_R_TLV("Capture Volume", WM8962_LEFT_INPUT_VOLUME, WM8962_RIGHT_INPUT_VOLUME, 0, 63, 0, inpga_tlv), • Supported with CODEC callbacks: • int read(struct snd_soc_codec *codec, int reg); • int write(struct snd_soc_codec *codec, int reg, int value); 3 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
  • 4. Quick wins • Save some boilerplate • Simple factor out of one very common operation • snd_soc_update_bits(struct snd_soc_codec *codec, int reg, int mask, int val); • Can suppress no op changes • Make best practice clear and obvious 4 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
  • 5. Register dumps • Using: • Register read and write operations • Ideally also the maximum register address • The subsystem can provide register dumps as a standard feature: 0000: abcd 0001: 5e32 • Common output format • Support for reading only specific registers • Write support • Enabled by previous factoring out 5 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
  • 6. Register caches • Had been open coded in drivers • Layered in with a little bit more data • Register default values • Volatile registers • Really nice feature • Many devices don’t support readback • Performance improvement • Simplifies suspend and resume 6 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
  • 7. Physical I/O • The hardware interface is very consistent over devices: SCLK SDA D7 D1 R/W A6 A0 B8 B7 B1 B0 START device ID (Write) ACK register address B8 ACK data bits B7 – B0 ACK STOP Note: The SDA pin is used as input for the control register address and data; SDA is pulled low by the receiving device to provide the acknowledge (ACK) response • Register followed by value, big endian • Standard implementation of read and write • Subsystem ensures all drivers get the fiddly bits right • Byte swapping • Interoperability with controller features • Performance tricks 7 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
  • 8. Factoring out regmap • These patterns are present in many other devices • PMICs • Input controllers • GPIO expanders • Move the code out of ASoC • drivers/base/regmap • Gradual merge • v3.1: simple register I/O functionality for I2C and SPI • v3.2: caches, tracepoints and debugfs 8 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
  • 9. Device description struct regmap_config { int reg_bits; int pad_bits; int val_bits; bool (*writeable_reg)(struct device *dev, unsigned int reg); bool (*readable_reg)(struct device *dev, unsigned int reg); bool (*volatile_reg)(struct device *dev, unsigned int reg); bool (*precious_reg)(struct device *dev, unsigned int reg); unsigned int max_register; const struct reg_default *reg_defaults; unsigned int num_reg_defaults; }; 9 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
  • 10. Core API struct regmap *devm_regmap_init_i2c(struct i2c_client *i2c, const struct regmap_config *config); int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val); int regmap_write(struct regmap *map, unsigned int reg, unsigned int val); int regmap_update_bits(struct regmap *map, unsigned int reg, unsigned int mask, unsigned int val); int regcache_sync(struct regmap *map); void regcache_cache_only(struct regmap *map, bool enable); void regcache_mark_dirty(struct regmap *map); 10 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
  • 11. Complex register caches • Initially caches just used a flat array • Not so good when caching devices with 32 bit addresses • Solved with better cache types • rbtree stores blocks of contiguous registers in a red/black tree (436 lines) • Compressed stores blocks of compressed data (380 lines) • Both rely on existing kernel libraries enum regcache_type cache_type; 11 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
  • 12. Tracepoints/Logging • Simple, low overhead logging subsystem • Can be built in all the time and running all the time • Standard format allows reusable tooling in userspace • Key tracepoints for regmap: • regmap_reg_write 0-001a reg=1a val=3c • regmap_reg_read 0-001a reg=1 val=3c • See more in debugfs/trace/events/regmap/ • Also a simple define LOG_DEVICE for early init logging 12 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
  • 13. Register patches • Magic register writes done at device startup • Performance tuning • Workarounds • Integrated into cache sync int regmap_register_patch(struct regmap *map, const struct reg_default *regs, int num_regs); 13 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
  • 14. Paging support • Common hardware pattern, adds another level of addressing • Supported in regmap by creating virtual registers • Standard interface allows upper level code to ignore paging struct regmap_range_cfg { const char *name; unsigned int range_min; unsigned int range_max; unsigned int selector_reg; unsigned int selector_mask; int selector_shift; unsigned int window_start; unsigned int window_len; }; 14 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
  • 15. MMIO support • Cache and diagnostic infrastructure isn’t just useful to I2C and SPI • Allows really simple integration with runtime PM 15 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
  • 16. Interrupt controller • Common patterns in interrupt controllers • Status register • Mask register • Lots of fiddly stuff with interrupt core due to blocking in “interrupt” context • Frequently cut’n’pasted • Including the comments! 16 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
  • 17. Interrupt controller struct regmap_irq { unsigned int reg_offset; unsigned int mask; }; struct regmap_irq_chip { const char *name; unsigned int status_base; unsigned int mask_base; unsigned int ack_base; unsigned int wake_base; unsigned int irq_reg_stride; unsigned int mask_invert; bool runtime_pm; const struct regmap_irq *irqs; int num_irqs; }; 17 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
  • 18. Feature summary • v3.1: simple register I/O functionality for I2C and SPI • v3.2: caches, tracepoints and debugfs • v3.3: interrupt controller • v3.4: patches • v3.5: MMIO bus • v3.6: paging support • regmap based helpers for ASoC, regulator and IRQ 18 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
  • 19. Future work • Support for devices providing their own set and get register operations without formatting (eg, for USB) • Performance improvements in cache sync • Combine rbtree and compressed into a single cache type • Common helpers for register access patterns • Simplify chips with dense interrupt controller bitfields • More helpers for subsystems 19 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
  • 20. Thanks • Liam Girdwood, ASoC comaintainer and original author • Dimitris Papastamos, contributed advanced caches • Lars-Peter Clausen, early adopter & bug fixer • Stephen Warren, contributed regmap-mmio • Krystian Garbaciak, contributed paging support • Laxman Dewangan, contributed a bunch of improvements 20 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com
  • 21. Summary • Small abstractions pave the way for bigger ones • Solving things at the right level saves time and effort • Register I/O is very simple on Linux 21 © 2012 Wolfson Microelectronics plc November 2012 www.wolfsonmicro.com