This is a Question Papers of Mumbai University for B.Sc.IT Student of Semester - I [Electronic and Communication Technology] (Revised Course). [Year - January / 2017] . . .Solution Set of this Paper is Coming soon..
[Question Paper] Electronic and Communication Technology (Revised Course) [Ma...Mumbai B.Sc.IT Study
This is a Question Papers of Mumbai University for B.Sc.IT Student of Semester - I [Electronic and Communication Technology] (Revised Course). [Year - May / 2016] . . .Solution Set of this Paper is Coming soon..
This document discusses block diagram reduction techniques. It provides 10 rules for combining blocks in a control system diagram to simplify the overall transfer function. The rules cover combining blocks in series and parallel, eliminating feedback loops, shifting summing and take-off points, and applying associative laws. The goal is to obtain a single transfer function to represent the overall system. Examples are provided to demonstrate applying the rules to shift elements in the diagram while maintaining equivalent outputs.
1. The document discusses various electronic circuits and their characteristics including RC circuits, filters, multivibrators, and transistor configurations.
2. Key points covered include that a sine wave is preserved through a linear network, the lower cutoff frequency of an example RC high pass circuit, and that the output of an integrator circuit with a square wave input would be a sawtooth wave.
3. Multiple choice and fill-in-the-blank questions test understanding of concepts like time constants, quality factors, clamping circuits, transistor turn-off times, and applications of circuits like monostable multivibrators and Schmitt triggers.
This document outlines the course outcomes and assessment for an Electronics Circuits II course. The course covers analyzing various feedback amplifiers, designing LC and RC oscillators, analyzing tuned amplifiers and bandwidth, and examining wave shaping and timing circuits. The assessment has three parts - multiple choice questions mapping the course outcomes and knowledge levels, longer answer questions worth 5 marks each, and short answer questions worth 1 mark each. Sample questions are provided covering feedback amplifiers, oscillators, tuned circuits, and multivibrators.
Vlsi model question paper 2 (june 2021)PUSHPALATHAV1
This document outlines the course outcomes and assessment structure for the course EC8095 - VLSI Design. The 5 course outcomes cover key concepts in digital building blocks, combinational and sequential circuit design, arithmetic blocks, memory systems, and FPGA design and testing. The assessment is divided into 3 parts: Part A contains 10 multiple choice questions assessing course outcomes 1-5 (20 marks), Part B contains 5 essay questions assessing course outcomes 1-5 at different cognitive levels (65 marks), and Part C contains 2 circuit design questions assessing course outcomes 1 and 5 (15 marks).
Vlsi model question paper 3 (june 2021)PUSHPALATHAV1
This document outlines the course outcomes and assessment plan for the course EC8095 - VLSI Design. The 5 course outcomes cover key concepts in digital building blocks using CMOS transistors, design of combinational and sequential circuits, arithmetic blocks, memory systems, and FPGA design flow. The assessment is divided into 3 parts - Part A consists of 10 multiple choice questions, Part B contains 13 questions of 5 marks each, and Part C has 1 question of 15 marks. The questions map the course outcomes to different levels of Bloom's taxonomy including remembering, understanding, applying, analyzing, evaluating and creating knowledge. The document also provides a sample exam paper consisting of the 3 parts with representative questions assessing the course outcomes and knowledge levels.
The document outlines 9 rules for reducing and manipulating block diagrams:
1) Summing points can be rearranged if there are no intermediate blocks or take-off points between them.
2) Blocks in series have their transfer functions multiplied.
3) Blocks in parallel have their transfer functions added algebraically.
4) When shifting a summing point behind a block, a block with the reciprocal transfer function is added.
5) When shifting a summing point beyond a block, signals are multiplied by that block's transfer function.
[Question Paper] Electronic and Communication Technology (Revised Course) [Ma...Mumbai B.Sc.IT Study
This is a Question Papers of Mumbai University for B.Sc.IT Student of Semester - I [Electronic and Communication Technology] (Revised Course). [Year - May / 2016] . . .Solution Set of this Paper is Coming soon..
This document discusses block diagram reduction techniques. It provides 10 rules for combining blocks in a control system diagram to simplify the overall transfer function. The rules cover combining blocks in series and parallel, eliminating feedback loops, shifting summing and take-off points, and applying associative laws. The goal is to obtain a single transfer function to represent the overall system. Examples are provided to demonstrate applying the rules to shift elements in the diagram while maintaining equivalent outputs.
1. The document discusses various electronic circuits and their characteristics including RC circuits, filters, multivibrators, and transistor configurations.
2. Key points covered include that a sine wave is preserved through a linear network, the lower cutoff frequency of an example RC high pass circuit, and that the output of an integrator circuit with a square wave input would be a sawtooth wave.
3. Multiple choice and fill-in-the-blank questions test understanding of concepts like time constants, quality factors, clamping circuits, transistor turn-off times, and applications of circuits like monostable multivibrators and Schmitt triggers.
This document outlines the course outcomes and assessment for an Electronics Circuits II course. The course covers analyzing various feedback amplifiers, designing LC and RC oscillators, analyzing tuned amplifiers and bandwidth, and examining wave shaping and timing circuits. The assessment has three parts - multiple choice questions mapping the course outcomes and knowledge levels, longer answer questions worth 5 marks each, and short answer questions worth 1 mark each. Sample questions are provided covering feedback amplifiers, oscillators, tuned circuits, and multivibrators.
Vlsi model question paper 2 (june 2021)PUSHPALATHAV1
This document outlines the course outcomes and assessment structure for the course EC8095 - VLSI Design. The 5 course outcomes cover key concepts in digital building blocks, combinational and sequential circuit design, arithmetic blocks, memory systems, and FPGA design and testing. The assessment is divided into 3 parts: Part A contains 10 multiple choice questions assessing course outcomes 1-5 (20 marks), Part B contains 5 essay questions assessing course outcomes 1-5 at different cognitive levels (65 marks), and Part C contains 2 circuit design questions assessing course outcomes 1 and 5 (15 marks).
Vlsi model question paper 3 (june 2021)PUSHPALATHAV1
This document outlines the course outcomes and assessment plan for the course EC8095 - VLSI Design. The 5 course outcomes cover key concepts in digital building blocks using CMOS transistors, design of combinational and sequential circuits, arithmetic blocks, memory systems, and FPGA design flow. The assessment is divided into 3 parts - Part A consists of 10 multiple choice questions, Part B contains 13 questions of 5 marks each, and Part C has 1 question of 15 marks. The questions map the course outcomes to different levels of Bloom's taxonomy including remembering, understanding, applying, analyzing, evaluating and creating knowledge. The document also provides a sample exam paper consisting of the 3 parts with representative questions assessing the course outcomes and knowledge levels.
The document outlines 9 rules for reducing and manipulating block diagrams:
1) Summing points can be rearranged if there are no intermediate blocks or take-off points between them.
2) Blocks in series have their transfer functions multiplied.
3) Blocks in parallel have their transfer functions added algebraically.
4) When shifting a summing point behind a block, a block with the reciprocal transfer function is added.
5) When shifting a summing point beyond a block, signals are multiplied by that block's transfer function.
This document contains an exam for an RF IC Design course, listing 8 questions covering various topics in radio frequency integrated circuit design. Students were instructed to answer any 5 of the 8 questions, which covered topics such as inter-symbol interference, analog modulation, coherent vs non-coherent detection, phase locked loops, low noise amplifier design, mobile RF communications concepts, transmitter architectures, oscillator design techniques, and power amplifier classes and matching. The exam was 3 hours long and worth a maximum of 60 marks.
Kruskal's and Prim's algorithms can both be used to find the minimum spanning tree (MST) and minimum total edge weight needed to connect all vertices in a network. Kruskal's algorithm works by sorting all the edges by weight and building the MST by adding the shortest edges that do not form cycles. Prim's algorithm starts from one vertex and builds out the MST by always adding the shortest edge connected to any already included vertex. Both algorithms will produce the same total edge weight for the MST, but may select edges in a different order or use different edges in some cases of ties.
1. The document discusses time domain and frequency domain analysis of an integrator circuit. It provides equations to analyze the input and output voltage relationships over time for an RC integrator circuit.
2. It poses two example problems - to analyze the output of an integrator circuit with an input of vi=3sin(2pit) and with an input of vi=3+3sin(2pit).
3. References for further reading on operational amplifiers and integrated circuit design are provided.
This document is a lecture on block diagram operations and transfer functions for a mechatronics systems design course. It includes objectives, concepts, terminology, transformations, reductions, and examples of working through block diagrams and deriving overall transfer functions. Students are assigned homework problems involving simplifying and reducing given block diagrams.
The document discusses the Bellman-Ford algorithm, which computes shortest paths from a single source vertex to all other vertices in a weighted graph. It can handle graphs with negative edge weights, and can detect negative cycles. The algorithm maintains distance estimates from the source for each vertex, updating the estimates by relaxing edges until it converges or detects a negative cycle. Examples are provided to illustrate running the algorithm on graphs and finding shortest paths.
Gate 2013 complete solutions of ec electronics and communication engineeringmanish katara
The document is a sample paper for GATE 2013 that contains 25 multiple choice questions related to engineering topics like logic gates, vector fields, impulse response of systems, diodes, IC technology, and more. Each question is followed by a brief explanation of the answer. The questions cover a range of fundamental concepts in areas like signals and systems, electronics, semiconductor devices, and mathematics.
Overview of Single Source Shortest Path
Types of Single Source Shortest Path Algorithm
Representation of Single Source Shortest Path
Initialization
Relaxation
Implementation of Dijkstra's Algorithm
Does Dijkstra’s Algorithm Always Work?
Implementation of Bellman-Ford Algorithm
Negative Weight Cycles in Bellman-Ford Algorithm
Bellman Ford's algorithm finds the shortest paths from a source vertex to all other vertices in a weighted graph, even if edge weights are negative. It works by repeatedly relaxing all edges to update the distance and previous vertex for each vertex. After iterating through all edges |V|-1 times, if an edge can still be relaxed, then a negative cycle exists in the graph.
The document discusses spanning trees and minimum spanning trees for graphs. A spanning tree is a minimal set of edges that connect all vertices of a connected, undirected graph without cycles. A minimum spanning tree is a spanning tree for a connected, undirected and weighted graph where the sum of the weights of the edges is minimized. Prim's algorithm is presented for finding a minimum spanning tree. The algorithm initializes the minimum spanning tree to be empty and selects the minimum weight edge connecting a vertex in the tree to one not in the tree, adding it to the tree iteratively until all vertices are included. An example run-through of Prim's algorithm on a weighted graph is shown step-by-step.
This document contains questions for an M.Tech examination in VLSI Design. It asks students to answer any five of ten questions. The questions cover topics like CMOS inverter transfer characteristics, MESFET drain current equations, BiCMOS vs CMOS technologies, MOSFET small signal modeling, Carbon nanotube FET operation, super buffers, pass transistor logic gates, multiplexer design using CMOS transmission gates, and VLSI design principles like hierarchy, regularity and modularity. The document tests students' understanding of fundamental analog and digital VLSI analysis and design concepts.
The document summarizes the Ford-Fulkerson algorithm for finding the maximum flow in a flow network. It defines key terms like flow network, source, sink, flow, residual graph and augmented path. It then outlines the steps of the Ford-Fulkerson algorithm to incrementally send flow along augmented paths from the source to the sink until no more such paths exist. An example applying the algorithm to find the maximum flow in a sample network is provided with illustrations of the residual capacities after each flow augmentation.
A presentation on prim's and kruskal's algorithmGaurav Kolekar
This slides are for a presentation on Prim's and Kruskal's algorithm. Where I have tried to explain how both the algorithms work, their similarities and their differences.
The document is a presentation on graph algorithms by Team Alpha. It summarizes Dijkstra's algorithm, BFS, DFS, and Bellman-Ford algorithm. It then provides examples of applying Bellman-Ford to find shortest paths in graphs, including detecting negative cycles.
The document summarizes network flow problems and the Ford-Fulkerson algorithm for finding the maximum flow in a network. It introduces network representations using graphs, the concepts of capacity, flow, and defines the maximum flow problem. It then describes the Ford-Fulkerson method using residual networks and augmenting paths to iteratively increase the flow. It proves that this process results in a valid flow and terminates when no augmenting path remains, at which point the maximum flow has been found.
The document describes various 3D modeling transactions that modify or create points and B-spline curves within a coordinate system. Key transactions include:
- Creating points with various translations in the THEATRE space
- Creating a B-spline curve with 7 poles for a second curve to the right
- Creating another B-spline curve with 7 poles for a second curve to the left
- Modifying an existing curve called curve_left by changing its poles
This document describes the Bellman-Ford algorithm, a single-source shortest path algorithm that can detect negative edge cycles. It provides pseudocode for the algorithm, runs through an example, discusses the relaxation equation and time/space complexity. It also lists some applications of Bellman-Ford in routing protocols and mentions some references for more information.
Abstract
キーの値による範囲検索が可能なキー順序保存型構造化オーバレイネットワークは多くの応用があり,重要性が高い.本研究では,新しいキー順序保存型構造化オーバレイネットワークSuzakuを提案する.Suzakuは,(1)Churn時でも最大検索ホップ数がlog_2 n程度に収まる(nはノード数),(2)キーが大小どちらの方向でも近傍ノードの検索は高速に行える,(3)構造は単純で実装が容易,といった特徴を備える.本稿ではSuzakuの詳細について述べ,シミュレーションによって既存のChord#およびSkip Graphと比較する.
A ``key-order preserving structured overlay network,'' which enables
range queries, has various applications and thus be important. In
this study, we propose a novel key-order preserving structured
overlay network ``Suzaku,'' which has the following properties: (1)
maximum lookup hops is almost log_2 n even in churn situations,
where $n$ is the number of nodes, (2) neighbor search is fast
regardless of the direction of their keys, (3) the structure is
simple and easy to implement. In this paper, we describe the
principles and detailed algorithm of Suzaku. We also show
simulation results comparing Suzaku with existing Chord# and Skip
Graph.
This document contains calculations to solve a circuit analysis problem. It first defines the circuit with multiple resistors connected in series and parallel. It then shows the calculations to solve for the resistance of each individual resistor (RA, RB, etc.) by adding or combining the resistances according to how they are connected. The final lines solve for the total resistance R1 and confirm there are no negative resistances.
This document contains a sample GATE paper with questions from various subjects like mathematics, physics, chemistry and general aptitude. The questions include multiple choice, numerical answer type and explanation type questions. Some questions test concepts like differential equations, complex numbers, Laplace transforms, electric circuits etc. The document also contains information about an online portal for GATE preparation that has trained over 1 lakh students across India.
[Question Paper] Electronic and Communication Technology (Revised Course) [Ap...Mumbai B.Sc.IT Study
This is a Question Papers of Mumbai University for B.Sc.IT Student of Semester - I [Electronic and Communication Technology] (Revised Course). [Year - April / 2015] . . .Solution Set of this Paper is Coming soon..
[Question Paper] Electronic and Communication Technology (Revised Course) [Ap...Mumbai B.Sc.IT Study
This is a Question Papers of Mumbai University for B.Sc.IT Student of Semester - I [Electronic and Communication Technology] (Revised Course). [Year - April / 2014] . . .Solution Set of this Paper is Coming soon..
This document contains an exam for an RF IC Design course, listing 8 questions covering various topics in radio frequency integrated circuit design. Students were instructed to answer any 5 of the 8 questions, which covered topics such as inter-symbol interference, analog modulation, coherent vs non-coherent detection, phase locked loops, low noise amplifier design, mobile RF communications concepts, transmitter architectures, oscillator design techniques, and power amplifier classes and matching. The exam was 3 hours long and worth a maximum of 60 marks.
Kruskal's and Prim's algorithms can both be used to find the minimum spanning tree (MST) and minimum total edge weight needed to connect all vertices in a network. Kruskal's algorithm works by sorting all the edges by weight and building the MST by adding the shortest edges that do not form cycles. Prim's algorithm starts from one vertex and builds out the MST by always adding the shortest edge connected to any already included vertex. Both algorithms will produce the same total edge weight for the MST, but may select edges in a different order or use different edges in some cases of ties.
1. The document discusses time domain and frequency domain analysis of an integrator circuit. It provides equations to analyze the input and output voltage relationships over time for an RC integrator circuit.
2. It poses two example problems - to analyze the output of an integrator circuit with an input of vi=3sin(2pit) and with an input of vi=3+3sin(2pit).
3. References for further reading on operational amplifiers and integrated circuit design are provided.
This document is a lecture on block diagram operations and transfer functions for a mechatronics systems design course. It includes objectives, concepts, terminology, transformations, reductions, and examples of working through block diagrams and deriving overall transfer functions. Students are assigned homework problems involving simplifying and reducing given block diagrams.
The document discusses the Bellman-Ford algorithm, which computes shortest paths from a single source vertex to all other vertices in a weighted graph. It can handle graphs with negative edge weights, and can detect negative cycles. The algorithm maintains distance estimates from the source for each vertex, updating the estimates by relaxing edges until it converges or detects a negative cycle. Examples are provided to illustrate running the algorithm on graphs and finding shortest paths.
Gate 2013 complete solutions of ec electronics and communication engineeringmanish katara
The document is a sample paper for GATE 2013 that contains 25 multiple choice questions related to engineering topics like logic gates, vector fields, impulse response of systems, diodes, IC technology, and more. Each question is followed by a brief explanation of the answer. The questions cover a range of fundamental concepts in areas like signals and systems, electronics, semiconductor devices, and mathematics.
Overview of Single Source Shortest Path
Types of Single Source Shortest Path Algorithm
Representation of Single Source Shortest Path
Initialization
Relaxation
Implementation of Dijkstra's Algorithm
Does Dijkstra’s Algorithm Always Work?
Implementation of Bellman-Ford Algorithm
Negative Weight Cycles in Bellman-Ford Algorithm
Bellman Ford's algorithm finds the shortest paths from a source vertex to all other vertices in a weighted graph, even if edge weights are negative. It works by repeatedly relaxing all edges to update the distance and previous vertex for each vertex. After iterating through all edges |V|-1 times, if an edge can still be relaxed, then a negative cycle exists in the graph.
The document discusses spanning trees and minimum spanning trees for graphs. A spanning tree is a minimal set of edges that connect all vertices of a connected, undirected graph without cycles. A minimum spanning tree is a spanning tree for a connected, undirected and weighted graph where the sum of the weights of the edges is minimized. Prim's algorithm is presented for finding a minimum spanning tree. The algorithm initializes the minimum spanning tree to be empty and selects the minimum weight edge connecting a vertex in the tree to one not in the tree, adding it to the tree iteratively until all vertices are included. An example run-through of Prim's algorithm on a weighted graph is shown step-by-step.
This document contains questions for an M.Tech examination in VLSI Design. It asks students to answer any five of ten questions. The questions cover topics like CMOS inverter transfer characteristics, MESFET drain current equations, BiCMOS vs CMOS technologies, MOSFET small signal modeling, Carbon nanotube FET operation, super buffers, pass transistor logic gates, multiplexer design using CMOS transmission gates, and VLSI design principles like hierarchy, regularity and modularity. The document tests students' understanding of fundamental analog and digital VLSI analysis and design concepts.
The document summarizes the Ford-Fulkerson algorithm for finding the maximum flow in a flow network. It defines key terms like flow network, source, sink, flow, residual graph and augmented path. It then outlines the steps of the Ford-Fulkerson algorithm to incrementally send flow along augmented paths from the source to the sink until no more such paths exist. An example applying the algorithm to find the maximum flow in a sample network is provided with illustrations of the residual capacities after each flow augmentation.
A presentation on prim's and kruskal's algorithmGaurav Kolekar
This slides are for a presentation on Prim's and Kruskal's algorithm. Where I have tried to explain how both the algorithms work, their similarities and their differences.
The document is a presentation on graph algorithms by Team Alpha. It summarizes Dijkstra's algorithm, BFS, DFS, and Bellman-Ford algorithm. It then provides examples of applying Bellman-Ford to find shortest paths in graphs, including detecting negative cycles.
The document summarizes network flow problems and the Ford-Fulkerson algorithm for finding the maximum flow in a network. It introduces network representations using graphs, the concepts of capacity, flow, and defines the maximum flow problem. It then describes the Ford-Fulkerson method using residual networks and augmenting paths to iteratively increase the flow. It proves that this process results in a valid flow and terminates when no augmenting path remains, at which point the maximum flow has been found.
The document describes various 3D modeling transactions that modify or create points and B-spline curves within a coordinate system. Key transactions include:
- Creating points with various translations in the THEATRE space
- Creating a B-spline curve with 7 poles for a second curve to the right
- Creating another B-spline curve with 7 poles for a second curve to the left
- Modifying an existing curve called curve_left by changing its poles
This document describes the Bellman-Ford algorithm, a single-source shortest path algorithm that can detect negative edge cycles. It provides pseudocode for the algorithm, runs through an example, discusses the relaxation equation and time/space complexity. It also lists some applications of Bellman-Ford in routing protocols and mentions some references for more information.
Abstract
キーの値による範囲検索が可能なキー順序保存型構造化オーバレイネットワークは多くの応用があり,重要性が高い.本研究では,新しいキー順序保存型構造化オーバレイネットワークSuzakuを提案する.Suzakuは,(1)Churn時でも最大検索ホップ数がlog_2 n程度に収まる(nはノード数),(2)キーが大小どちらの方向でも近傍ノードの検索は高速に行える,(3)構造は単純で実装が容易,といった特徴を備える.本稿ではSuzakuの詳細について述べ,シミュレーションによって既存のChord#およびSkip Graphと比較する.
A ``key-order preserving structured overlay network,'' which enables
range queries, has various applications and thus be important. In
this study, we propose a novel key-order preserving structured
overlay network ``Suzaku,'' which has the following properties: (1)
maximum lookup hops is almost log_2 n even in churn situations,
where $n$ is the number of nodes, (2) neighbor search is fast
regardless of the direction of their keys, (3) the structure is
simple and easy to implement. In this paper, we describe the
principles and detailed algorithm of Suzaku. We also show
simulation results comparing Suzaku with existing Chord# and Skip
Graph.
This document contains calculations to solve a circuit analysis problem. It first defines the circuit with multiple resistors connected in series and parallel. It then shows the calculations to solve for the resistance of each individual resistor (RA, RB, etc.) by adding or combining the resistances according to how they are connected. The final lines solve for the total resistance R1 and confirm there are no negative resistances.
This document contains a sample GATE paper with questions from various subjects like mathematics, physics, chemistry and general aptitude. The questions include multiple choice, numerical answer type and explanation type questions. Some questions test concepts like differential equations, complex numbers, Laplace transforms, electric circuits etc. The document also contains information about an online portal for GATE preparation that has trained over 1 lakh students across India.
[Question Paper] Electronic and Communication Technology (Revised Course) [Ap...Mumbai B.Sc.IT Study
This is a Question Papers of Mumbai University for B.Sc.IT Student of Semester - I [Electronic and Communication Technology] (Revised Course). [Year - April / 2015] . . .Solution Set of this Paper is Coming soon..
[Question Paper] Electronic and Communication Technology (Revised Course) [Ap...Mumbai B.Sc.IT Study
This is a Question Papers of Mumbai University for B.Sc.IT Student of Semester - I [Electronic and Communication Technology] (Revised Course). [Year - April / 2014] . . .Solution Set of this Paper is Coming soon..
This document contains a power electronics exam with 9 questions. Question 1 is multiple choice with 10 parts worth 2 marks each. Questions 2 through 8 are long-form questions worth 16 marks each, with students required to answer 5 of these 8 questions. Question 9 has two parts, with part a worth 7 marks and part b worth 9 marks. The questions cover topics like IGBTs, thyristors, choppers, converters, inverters and their control and applications.
This is a Question Papers of Mumbai University for B.Sc.IT Student of Semester - III [Computer Graphics] (Revised Course). [Year - June / 2016] . . .Solution Set of this Paper is Coming soon...
This is a Question Papers of Mumbai University for B.Sc.IT Student of Semester - II [Computer Graphics] (Old Course). [Year - June / 2014] . . .Solution Set of this Paper is Coming soon..
Digital Signals and System (April – 2017) [75:25 Pattern | Question Paper]Mumbai B.Sc.IT Study
This document contains a question paper for a Digital Signals and Systems exam with 7 multiple choice questions. The questions cover topics such as properties of the unit impulse function, classification of continuous and discrete time systems, Laplace and z-transforms, difference equations, Fourier analysis, filter design, and convolution. Students are asked to solve problems related to these topics and show calculations. The paper tests the application of key concepts in digital signal processing.
This document contains questions that appear to be from a university examination for a Master of Technology degree in VLSI Systems. The questions cover topics related to VLSI design including MOSFETs, amplifiers, oscillators, PLLs, ADCs, DACs, low power design techniques, testing and verification, SOC design, memory, NOC architectures, and processor extensions. Some of the questions ask students to derive equations, explain concepts, compare techniques, or solve example circuits. The time allotted for the exam is 3 hours and it is out of a maximum of 100 marks. Students are instructed to answer any five full questions from the list provided.
1. The document contains sample test papers for an electrical and electronics diploma course. It covers topics like electrical machines, transformers, motors, diodes, transistors, logic gates and power supplies.
2. The papers contain both theoretical and calculation questions to test students' understanding of key concepts and ability to apply them to solve problems.
3. Sample questions assess concepts like energy consumption, motor speed control, transformer design, diode characteristics, transistor operation, logic gates, rectifier circuits and electrical safety. Diagrams are included where needed.
This document contains 30 multiple choice questions related to electrical machines. The questions cover topics like induction motors, transformers, synchronous machines, and DC machines. They assess understanding of concepts like rotor skewing, double cage motors, star-delta starting, transformer losses, synchronous generator operation, DC motor characteristics, and methods of speed control for induction motors. The questions are from previous years' GATE exams on the electrical engineering topic of electrical machines.
[Question Paper] Electronic & Tele Communication System (Old Course) [Septemb...Mumbai B.Sc.IT Study
This is a Question Papers of Mumbai University for B.Sc.IT Student of Semester - II [Electronic & Tele Communication System] (Old Course). [Year - September / 2013] . . .Solution Set of this Paper is Coming soon..
This document contains exam questions for a course on analog integrated circuits. It is divided into three parts - Part A contains three questions related to differential amplifiers, operational amplifiers and their characteristics. Part B contains circuit design questions related to differentiator, rectifier, Schmitt trigger and filters. Part C contains detailed circuit explanation questions about monostable multivibrator, ADC types, voltage regulators and applications of PLL. It tests the student's knowledge of various analog integrated circuits.
This document contains 20 questions related to CMOS circuits. The questions cover topics such as common source amplifiers, differential amplifiers, switched capacitor amplifiers, ring oscillators, phase locked loops, flip flops, ROM architectures, dynamic memory cells, programmable logic arrays, content addressable memory, parity generators, and binary multiplication algorithms. Students are asked to analyze circuits, derive equations, perform numerical calculations, draw diagrams, and explain concepts.
The document contains details regarding the B.E/B.Tech degree examination for the subject of Power Electronics. It includes 20 marks for 10 short answer questions in Part A, 65 marks for 5 long answer questions in Part B, and 15 marks for 1 long answer question in Part C, for a total of 100 marks. The questions cover topics such as snubber circuits, thyristors, rectifiers, choppers, inverters, and AC voltage controllers. The document provides the framework and guidelines for the examination on Power Electronics.
This document contains 20 multiple choice questions from a GATE EE exam. Each question is presented along with the question stem and 4 possible answer choices. The correct answer is indicated and a brief explanation of the solution is provided. The questions cover topics in circuits, signals and systems, random variables, matrices, communication systems, control systems, electronics, and power systems.
This document contains 20 multiple choice questions from a GATE EE exam. It covers topics in signals and systems, circuits, electromagnetic theory, machines, and instrumentation. For each question, the full question and multiple choice options are provided, along with the solution and explanation for the correct answer.
[Question Paper] Fundamentals of Digital Computing (Revised Course) [April / ...Mumbai B.Sc.IT Study
This is a Question Papers of Mumbai University for B.Sc.IT Student of Semester - I [Fundamentals of Digital Computing] (Revised Course). [Year - April / 2015] . . .Solution Set of this Paper is Coming soon..
The document contains sample test papers for the subject of Power Electronics for a Diploma in Electronics Engineering program. It covers topics like rectifiers, choppers, inverters, thyristors, transistors, and power semiconductor devices. The test paper includes multiple choice and long answer questions to assess the understanding of circuit diagrams, characteristics, working principles and comparisons of various power electronic components and circuits.
This document contains 6 sample question papers for an exam on Linear Integrated Circuits. Each paper contains 3-6 questions with multiple parts assessing various concepts related to operational amplifiers, filters, instrumentation amplifiers, timers and oscillators using op-amps and IC 555. The questions include topics like ideal op-amp characteristics, filter design and analysis, signal conditioning circuits, timer applications and phase locked loops. Students are required to draw circuits, derive expressions and describe concepts with diagrams to solve the problems.
This document contains questions from 5 units on the topic of Basic Electrical Engineering. The questions cover topics such as derivation of rms value, active and reactive power, Thevenin's theorem, power calculations in AC circuits, transformer theory including equivalent circuits and testing, DC motor characteristics and speed control, induction motor theory including rotating magnetic fields and starting methods, and single phase motors including split phase, capacitor start, and stepper motors. Both short answer and long answer questions are provided ranging from derivations to explanations to circuit analyses.
</SUMMARY>
- The document is an exam paper for the subject Power System I. It contains two sections - Section A and Section B, with 4 questions each. Students have to answer any 3 questions from each section.
- The questions cover various topics related to power systems including transformer and transmission line modeling, fault analysis, symmetrical components, load flow analysis, relay protection and power flow through transmission lines.
- The questions involve derivations, calculations, explanations and numerical problems related to the power system topics. Diagrams and data are provided with some questions.
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[Question Paper] Electronic and Communication Technology (Revised Course) [January / 2017]
1. E l e c t r o n i c s a n d C o m m u n i c a t i o n s T e c h n o l o g y
Q u e s t i o n P a p e r ( J a n u a r y – 2 0 1 7 ) [ R e v i s e d C o u r s e ]
1 | Page
M u m b a i B . S c . I T S t u d y
F a c e b o o k | T w i t t e r | I n s t a g r a m | G o o g l e + | Y o u T u b e
– Kamal T.
Time: 3 Hours Total Marks: 100
N.B.: (1) All Questions from 1 to 7 are Compulsory.
(2) Figure To right indicate the marks.
Q.1 Attempt Any Two From The Following: (10 Marks)
(A) Explain the formation of P-Type Semiconductor with necessary diagram. (5)
(B) Draw a neat Labelled Block Diagram of an Oscillator. (5)
(C) Explain working of Transistor as a Switch. (5)
(D) Define AM and draw the Waveforms. (5)
(E) State the Sampling Theorem and explain it. (5)
Q.2 Attempt Any Three From The Following: (15 Marks)
(A) Explain the working of P-N Junction diode with necessary diagrams. (5)
(B) With the help of Circuit Diagram explain the working of Half Rectifier with necessary
Wave-Forms.
(5)
(C) Explain the output characteristics of P-N-P Transistor in CE Configuration. (5)
(D) The turns ratio of a transformer uses in a bridge rectifier is 100:1. The primary is
connected to a 230 VRMS mains supply. Assuming diode voltage drop to be 0.5 V, find
the de voltage across the load resistance & the PIV of each diode. Also find the load
current if a load resistance of 100 Ω is used.
(5)
(E) When the emitter current of a transistor is changed by 1.1 mA its collector current
changes by 0.97 mA. Calculate its common base current gain(𝛽) and common emitter
current gain(𝛼).
(5)
Q.3 Attempt Any Three From The Following: (15 Marks)
(A) Explain the working of single stage CE amplifier. Also discuss its frequency response
curve.
(5)
(B) With the help of circuit diagram explain the working of Multistage Amplifier. Derive an
expression for its gain decibel.
(5)
(C) Explain working of RC coupled amplifier with circuit diagram discuss its frequency
response curve.
(5)
(D) Explain the need of biasing a transistor. Explain the fixed biased method of biasing. (5)
(E) Explain how to plot the load line of CE amplifier. What is Q-point? (5)
2. E l e c t r o n i c s a n d C o m m u n i c a t i o n s T e c h n o l o g y
Q u e s t i o n P a p e r ( J a n u a r y – 2 0 1 7 ) [ R e v i s e d C o u r s e ]
2 | Page
M u m b a i B . S c . I T S t u d y
F a c e b o o k | T w i t t e r | I n s t a g r a m | G o o g l e + | Y o u T u b e
– Kamal T.
Q.4 Attempt Any Three From The Following: (15 Marks)
(A) Explain the need of tank circuit in an oscillator. Explain the RC Tank circuit. (5)
(B) Explain the working of RC Phase Shift Oscillator with its Circuit Diagram. (5)
(C) Explain the Block Diagram of IC555. (5)
(D) An astable multivibrator using IC555 has 𝑅 𝐴 = 470Ω, 𝑅 𝐵 = 2𝑘Ω and 𝐶 =
0.0076𝑢𝐹. Calculate charging and discharging time constant duty cycle and output
frequency.
(5)
(E) A Colpitt’s Oscillator uses following components in its turned 𝐶1 = 1500𝑝𝐹, 𝐶2 =
800𝑝𝐹, 𝐿 = 200𝜇𝐻. Calculate the frequency of the Oscillator.
(5)
Q.5 Attempt Any Three From The Following: (15 Marks)
(A) With the help of Circuit Diagram explain the working of Balanced Modulator. (5)
(B) Explain the Block Diagram of the Basic Communication System. (5)
(C) Explain filter method for side band suppression with block diagram. (5)
(D) An audio signal is given by 𝐸 𝑚 = 100 sin(3140)𝑡. It Amplitude Modulates a carrier
frequency of carrier, Frequency of Modulating Signal, Amplitude of Side Band
Components & their Frequency.
(5)
(E) Explain the Low Level Modulator. (5)
Q.6 Attempt Any Three From The Following: (15 Marks)
(A) With help of Block Diagram explain the Television Transmitter. (5)
(B) Explain TRF Receiver with the Block Diagram. (5)
(C) Compare PM and AM Systems. (5)
(D) Explain Typical Pre-Emphasis & De-Emphasis Circuit with their characteristics. (5)
(E) Explain PPM Generator with Waveforms. (5)
Q.7 Attempt Any Three From The Following: (15 Marks)
(A) Explain Amplitude Shift Keying. (5)
(B) Explain types of Optical Fiber. (5)
(C) Explain the Optional Links in detail. (5)
(D) Explain the construction and working of LED. (5)
(E) Write a note on Ray Model. (5)