SlideShare a Scribd company logo
Classificationof InstructionSet:
8086 instructions are classified as given below, based on its operation performed.
1. Data Transfer Instructions
2. Arithmetic Instructions
3. Bit Manipulation Instructions
4. Program Execution Transfer Instructions
5. String Instructions
6. Processor Control Instructions
Data Transfer Instructions
These instructions are used to transfer data from source to destination.
The operand can be a constant, memory location, register or I/O port address.
1. MOV Destination,Source:
• This instructionisusedtotransfercontentsof source tothe destination.
• The source operandcanbe a immediate,aregisterora memorylocationaddressedby
any of the 24 addressingmodes.
• The destinationcanbe a registerora memorylocation,butnotan immediate data.
• Both operandscannotbe immediate dataormemorylocation.
• To loadthe segmentregisterswithdata,anygeneral purpose registerisloadedwiththe
data firstand thenmovedtothat particularsegmentregister
E.g.:
MOV CX,037A H
MOV AL, BL
MOV BX,[0301 H]
MOV DS, AX
2. PUSH Source
 It pushesthe operandintotopof stack.
 The PUSH instructiondecrementsthe stackpointerby2 copiesaword fromsource to the
locationpointedbythe stackpointerwithinthe stacksegment.
 The source can be a general purpose register,memorylocationorasegmentregister.
E.g.: PUSH BX
PUSH DS
PUSH [2000h}
PUSH AL; not allowed
3. POP Destination
 It popsthe operandfromtop of stackto Destination.
 It copiesa wordfromthe locationpointedbythe stackpointerwithinthe stacksegmentto
the specifieddestinationand incrementsthe stackpointerby2.
 The source can be a general purpose register,memorylocationorasegmentregister.
E.g.: POPAX
POPDS
POP[3000h]
4. XCHG Destination,Source
 ThisinstructionexchangesSource withDestination.
 It cannot exchange twomemorylocationsdirectly.
 The source anddestinationcanbe anyof the general purpose registerormemorylocation,
but nottwo locationssimultaneously.
 No segmentregisterscanbe used.
E.g.: XCHG DX, AX
XCHG BL, CH
XCHG AL,[9800]
5. IN Accumulator, Port Address:
 It transfersthe operandfromspecifiedporttoaccumulator registerwhichcanbe AL or AX.
 The addressof the port isspecifiedinthe instruction eitherdirectly(fixedport) orindirectly
(variable portusingDXregister).
E.g.: IN AX, 80H
IN AL, DX ; DX may containthe addressof the portas 8000H
6. OUT Port Address,Accumulator:
It transfersthe operandfromaccumulator AL or AX to specifiedport.
The addressof the port isspecifiedeitherdirectly(fixedport) orindirectly(variableportusingDX
register).
E.g.: OUT 80 H, AX
OUT DX,AL ; DX may containthe addressof the portas 8000H
7. LEA Register,Src:
It loadsa 16-bit registerwiththe offsetaddressof the dataspecifiedbythe Src.
E.g.: LEA BX,[DI]
Thisinstructionloadsthe contentsof DI(offset) intothe BXregister.
8. LDS Des,Src:
It loads32-bit pointerfrommemorysource todestination registerandDS.
The offsetisplacedinthe destinationregisterandthe segmentisplacedinDS.
To use thisinstructionthe wordat the lowermemoryaddressmustcontainthe offsetandthe word
at the higheraddressmustcontainthe segment.
E.g.: LDS BX, [0301 H]
9. LES Des,Src:
It loads32-bit pointerfrommemorysource todestinationregisterandES.
The offsetisplacedinthe destinationregisterandthe segmentisplacedinES.
ThisinstructionisverysimilartoLDS exceptthatitinitializesESinsteadof DS.
E.g.: LES BX, [0301 H]
10. LAHF:
It copiesthe lowerbyte of flagregistertoAH. Thisinstructionisusedtosimulate 8085 PUSH PSW
instruction.Thisaffectsnoflags.
E.g.: LAHF
11. SAHF:
It copiesthe contentsof AH to lowerbyte of flagregister. Thisinstructionisusedtosimulate 8085
POPPSW instruction.Thisaffectsthe lowerbyte of the flagregister.
E.g.: SAHF
12. PUSHF:
Pushesflagregistertotopof stack. Thisinstructiondecrementsthe stackpointerby2 and copies
the word inthe flagregistertothe memorylocationspointedbystackpointer.Noflagsare
changed.
E.g.: PUSHF
13. POPF:
Popsthe contentsof stack top to the flagregister. Thiscopiesawordfrom twomemorylocationsat
the top of the stack to the flagregisterandincrements the stackpointerbytwo.All flagsare
affected.
E.g.: POPF
14. XLAT
The XLAT (Translate) instructionreplacesabyte inALregisterwitha byte froma lookuptable in
memory.Before the execution,BXregistershouldbe loadedwiththe offsetof the lookup table.
XLAT instructionaddsthe ALbyte withthe offsetof the start of the table inBX andthencopiesthe
byte pointedbythismemorylocationbacktoAL. XLAT changesnoflags.
E.g: If AL ishavinga byte whose code isto be foundout,
MOV BX,2800H ; PointBX at the start of the table
XLAT ; replace the byte inAL withthe code in table.
Arithmetic Instructions
1. ADD Destination,Source
• Thisinstructionisusedto add the contentsof source to the destination.
• The resultisstoredin the destination.
• The source operandcanbe a immediate,aregisterora memorylocationaddressedby
any of the 24 addressingmodes.
• The destinationcanbe a registerora memorylocation,butnotan immediate data.
• Both operandscannotbe immediate dataormemorylocation.
• The source andthe destinationmustbe of the same data type i.e.,ADDinstruction
adds a byte to byte or a wordto word.
• It affectsAF,CF,OF, PF,SF,ZF flags.
E.g.:
ADD AL, 74H
ADD DX,AX
ADD AX,[BX]
2. ADC Destination,Source
• Thisinstructionisusedto add the contentsof source to the destinationandcarry flag.
• The resultisstoredin the destination.
• The source operandcanbe a immediate,aregisterora memorylocationaddressedby
any of the 24 addressingmodes.
• The destinationcanbe a registerora memorylocation,butnotan immediate data.
• Both operandscannotbe immediate dataormemorylocation.
• The source andthe destinationmustbe of the same data type i.e.,ADDinstruction
adds a byte to byte or a wordto word.
• It addsthe twooperandswithCF.
• It effectsAF,CF,OF,PF,SF, ZF flags.
E.g.:
ADC AL,74H
ADC DX,AX
ADC AX,[BX]
3. SUB Destination,Source
• Thisinstructionisusedto subtract the contentsof source from the destination.
• The resultisstoredin the destination.
• The source operandcanbe a immediate,aregisterora memorylocationaddressedby
any of the 24 addressingmodes.
• The destinationcanbe a registerora memorylocation,butnotan immediate data.
• Both operands cannotbe immediate dataormemorylocation.
• The source andthe destinationmustbe of the same data type i.e.,SUBinstruction
subtractsa byte frombyte or a word fromword.
• It affectsAF,CF,OF, PF,SF,ZF flags.
• For subtraction,CFacts as borrow flag.
E.g.:
SUB AL, 74H
SUB DX, AX
SUB AX, [BX]
4. SBB Destination,Source
• Thisinstructionisusedto subtract the contentsof source withborrow from the
destination.
• The resultisstoredin the destination.
• The source operandcanbe a immediate,aregisteror a memorylocationaddressedby
any of the 24 addressingmodes.
• The destinationcanbe a registerora memorylocation,butnotan immediate data.
• Both operandscannotbe immediate dataormemorylocation.
• The source andthe destinationmustbe of the same data type i.e.,SUBinstruction
subtractsa byte frombyte or a word fromword.
• It affectsAF,CF,OF, PF,SF,ZF flags.
• For subtraction,CFacts as borrow flag.
E.g.:
SBB AL, 74H
SBB DX, AX
SBB AX,[BX]
5. INC Destination
• It incrementsthe byte orword in destination byone.
• The destinationoperandcanbe a registerora memorylocationaddressedbyanyof the
24 addressingmodes.
• It affectsAF,OF,PF,SF, ZF flags.
• CF isnot affected.
E.g.:
INC AX
INCBL
6. DEC Destination
• It decrementsthe byte orword indestination byone.
• The destinationoperandcanbe a registerora memorylocationaddressedbyanyof the
24 addressingmodes.
• It affectsAF,OF,PF,SF, ZF flags.
• CF isnot affected.
E.g.:
DEC AX
DEC CL
7. DAA (Decimal Adjust Accumulator)
Syntax :-- DAA
• This instructionisusedtoconvertthe resultof the additionof twopackedBCD
numberstoa validBCDnumber.
• The resulthasto be onlyin AL.
• Afteradditionif the lowernibble isgreaterthan9 or AF =1, it will add06H to the lower
nibble inAL.
• Afterthisaddition,if the uppernibbleisgreaterthan9 or if CF = 1, DAA instruction
adds 60H to AL.
• DAA instructionaffectsAF,CF,PFandZF. OFisundefined.
OperationPerformed:--
– If lowernibble of AL> 9 or AF =1 thenAL = AL +06
– If highernibble of AL> 9 or CF =1 thenAL = AL +60
NumericExamples
AL = 53H, CL = 29H
ADD AL,CL ; AL  AL + CL
;AL  53 + 29
;AL  7CH
DAA ; AL 7C +06 (asC>9)
;AL 82
8. DAS (Decimal Adjust AfterSubtraction)
Syntax :-- DAS
• This instructionisusedtoconvertthe resultof the subtractionof twopackedBCD
numberstoa validBCDnumber.
• The subtractionhasto be onlyin AL.
• Aftersubtractionif the lowernibble isgreaterthan9or AF=1, it will subtract06H from
the lowernibble inAL.
• If the resultof the subtractionsetsthe carry flag or if the uppernibble isgreaterthan9,
DAS instructionsubtracts60H fromAL.
• DAS instructionaffectsAF,CF,PFandZF.OFis undefined.
OperationPerformed:--
– If lowernibble of AL> 9 or AF =1 thenAL = AL -06
– If highernibble of AL> 9 or CF =1 thenAL = AL -60
NumericExamples
AL = 75, BH = 46
SUB AL,BH ; AL  (AL) - (BH)
;AL  75 - 46
;AL  2FH
; AF = 1
DAS ; AL 2F - 06 (as F>9)
;AL 29
9. MUL (Unsignedmultiplication)
Syntax :-- MUL source
• This instructionmultipliesan unsignedbyte fromsource withan unsignedbyte in AL
register
or
Unsignedword fromsource withanunsignedwordin AX register.
• The source can be a registerormemorylocationbutcannotbe an immediatedata.
• Whena byte is multipliedwithabyte inAL, the resultisstoredinAX.
• Whena wordis multipliedwithawordinAX,the MSW (Most SignificantWord) of the
resultisstoredinDX and the LSW (LeastSignificantWord) of the resultisstoredinAX.
• If MS Byte or Word of the resultiszero,CF and OF bothwill be set.
• All otherflagsare modifieddependinguponthe result
OperationPerformed:--
– If source isbyte thenAX  AL * unsigned8bitsource
– If source iswordthenDX, AX  AX * unsigned16 bitsource
Examples:--
1. MUL BL ; MultiplyALby BL & the resultinAX
2. MUL CX ; MultiplyAXbyCX & the resultinDX,AX
3. MUL Byte PTR [SI] ; AX  AL * [SI]
10. IMUL (Signedmultiplication)
Syntax :-- IMUL source
• This instructionmultipliesa signedbyte fromsource witha signedbyte in ALregister
or
signedword fromsource withan signedwordin AX register.
• The source can be a register,general purpose,base orindex,ormemorylocation,but
cannot be an immediate data.
• Whena byte is multipliedwithabyte inAL, the resultisstoredinAX.
• Whena wordis multipliedwithawordinAX,the MSW (Most SignificantWord) of the
resultisstoredinDX and the LSW (LeastSignificantWord) of the resultisstoredinAX.
• If the magnitude of the productdoesnotrequire all the bitsof the destination,the
unusedbitsare filledwithcopiesof the signbit.
• If AH and DX containparts of the 16 & 32 bit results,CFandOF are set,If the unused
bitsare filledbythe signbit,OFandCF are cleared.
OperationPerformed:--
• If source isbyte thenAX  AL * signed8bit source
• If source iswordthenDX, AX  AX * signed16 bit source
Examples:--
1. IMUL BL ; MultiplyALby BL & the resultinAX
2. IMUL CX ; MultiplyAXbyCX & the resultinDX,AX
3. IMUL Byte PTR [SI] ; AX  AL * [SI]
•
11. DIV (UnsignedDivision)
Syntax :-- DIV source
• This instructiondividesanunsigned word(16Bits) in AX registerbyan unsigned byte
(8Bits) fromsource
or
an unsigned double word(32 bits) in DX & AX registerbyan unsigned word(16bits)
fromsource
• The source can be a registerormemorylocationbutcannotbe an immediatedata.
• Whena word inAX isdividedbyabyte,AL will containthe 8 bitquotientandAHwill
containan 8 bitremainder.
• Whena double wordinDX(MSW) & AX (LSW) isdividedbya word,AX will containthe
16 bit quotientandDXwill containan16 bitremainder.
• If a byte isto be dividedbya byte,ALis loadedwithdividendandAHisfilledwithall 0’s.
• If a wordis to be dividedbyaword,Ax is loadedwithdividendandDXis filledwithall
0’s.
• If an attemptismade to divide by0,or the quotientistoolarge (FFor FFFF),type 0
interruptisgenerated.
• No flagsare affected.
OperationPerformed:--
• If source isbyte then
• AL  AX/ unsigned8bit source ; (quotient)
• AH  AXMOD unsigned8bitsource ; (remainder)
• If source iswordthen
• AX  DX:AX/ unsigned16 bitsource ; (quotient)
• DX  DX:AXMOD unsigned16 bitsource ; (remainder)
Examples:--
1. DIV BL ; Divide wordinAXby byte in BL, Quotientisstoredin AL,
remainderinAH.
2. DIV CX ; Divide double wordinDX:AX bywordinCX,QuotientinAX,
RemainderinDX.
3. DIV [BX] ; Divide wordinAXby byte in memorylocationpointerby BX.
12. CBW (ConvertSignedByte to Word)
Syntax :-- CBW
• This instructionconvertsasignedbyte toa signedword.
• Thisinstructioncopiesthe signof a byte inAL to all the bitsin AH.
• AH is thensaidto be the signextensionof AL.
• CBW operationisdone before performingdivisionof asignedbyte inthe ALby another
signedbyte withIDIV instruction.
Operation :--
• AH  filledwith8th
bitof AL i.e.,D7
Thisdoesnot affectanyflags.
Example :--
If AX = 009BH, (00000000 10011011
AfterCBW Instruction,
AX=FF9B (11111111 10011011)
13. CWD (ConvertSignedWordto Double Word)
Syntax :-- CWD
• This instructioncopiesthe signbitof aword inAXto all the bitsinDX.
• Thus the signof AXis saidto be extendedtoDX.
• CWD operationisdone before performingdivisionof asignedwordinthe AXby
anothersignedwordwithIDIV instruction.
Operation :--
• DX filledwith16th
bitof AXi.e.,D15
Thisdoesnot affectanyflags.
Example :--
If DX = 0000H (00000000 00000000)
If AX = F0C7H, (11110000 11000111)
AfterCWD Instruction,
DX = FFFFH (11111111 11111111)
AX=F0C7 (11110000 11000111)
14. CMP (Compare)
Syntax :-- CMP destination,source
• Thisinstructioncomparesthe source operand,whichmaybe a register,immediate
data or memorylocationwithadestinationoperandwhichmaybe a registeror
memorylocation.
• It subtractsthe source operandfromthe destinationbutdoesnotstore the result
anywhere.
• The flags(OF,CF, PF,AF,SF, ZF)are affecteddependingonthe resultof subtraction.
• Source and destinationbothcannotbe memorylocations.
OperationPerformed:--
• If destination>source thenCF = 0, ZF = 0, SF = 0
• If destination<source thenCF = 1, ZF = 0, SF = 1
• If destination=source thenCF = 0, ZF = 1, SF = 0
Examples:--
1. CMP AL,0FFH; ComparesAL withFFH
2. CMP AX,BX ; ComparesAX withBX
3. CMP CX,COUNT ; ComparesCXwithmemory variable COUNT
15. NEG ( Negate )
Syntax :-- NEG destination
• This instructionreplacesthe numberinthe destinationwiththe 2’scomplementof that
number.
• For obtainingthe 2’scomplement,itsubtractsthe contentsof destinationfromzero.
• The resultisstoredback in the destinationwhichmaybe a registerora memory
location
• If OF =1, it indicatesthatthe operationcouldnotbe completedsuccessfully.
• NEG instructionaffectsall conditionalflags.
• Examples:--
1. NEG AL ; 2’s complementof ALbyte.
2. NEG BX ; 2’s complementof BXword.
• Logical Instructions
– These are the instructions used for basic logic operations such as AND, OR, NOT
and XOR.
– These are also used for carrying out bit by bit operations such as shift (SHR,SHL)
or rotate (ROL,ROR,RCR,RCL).
– One more Instruction under this category is TEST instruction.
AND (Logical AND)
Syntax :-- AND destination, source
• This instruction is used to bit by bit AND the contents of source to the destination.
• The result is stored in the destination.
• The source operand can be a immediate, a register or a memory location.
• The destination can be a register or a memory location, but not an immediate data.
• Both operands cannot be immediate data or memory location.
• Flags affected : OF = 0 ,CF = 0 , AF is undefined.
• And other flags (SF, ZF, PF) are affected based on the AND operation.
• Operation Performed :--
• Destination  Destination AND source
• Examples :--
1. AND BH,CL ;AND byte in CL with Byte in BH, result in BH.
2. AND BX,00FFH ;AND word in BX with immediate data 00ffH
3. AND [5000H], DX ;AND word in DX with a word in memory with offset
5000 in DS.
• Numeric Example
If AX = 3F0F,
After Instruction,
AND AX,9078H ; AX  AX AND 0008H
;AX  3F0F AND 0008
3F0F  0011 1111 0000 1111
AND
9078  1001 0000 0111 1000
-------------------------------------
= 0001 0000 0000 1000
1008H in AX register
OR (Logical OR)
Syntax :-- OR destination, source
• This instruction is used to bit by bit OR the contents of source to the destination.
• The result is stored in the destination.
• The source operand can be a immediate, a register or a memory location.
• The destination can be a register or a memory location, but not an immediate data.
• Both operands cannot be immediate data or memory location.
• Flags affected : OF = 0 ,CF = 0 , AF is undefined.
• And other flags (SF, ZF, PF) are affected based on the OR operation.
Operation Performed :--
Destination  Destination OR source
• Examples :--
1. OR BH,CL ;OR byte in CL with Byte in BH, result in BH.
2. OR BX,00FFH ;OR word in BX with immediate data 00ffH
3. OR [5000H], DX ; OR word in DX with a word in memory with offset 5000
in DS.
Numeric Example
If AX = 3F0F,
After Instruction,
OR AX,9078H ; AX  AX OR 9078H
;AX  3F0F OR 9078
3F0F  0011 1111 0000 1111
OR
9078  1001 0000 0111 1000
-------------------------------------
= 1011 1111 0111 1111
BF7FH in AX register
XOR (Logical XOR)
Syntax :-- XOR destination, source
• This instruction is used to bit by bit XOR the contents of source to the destination.
• The result is stored in the destination.
• The source operand can be a immediate, a register or a memory location.
• The destination can be a register or a memory location, but not an immediate data.
• Both operands cannot be immediate data or memory location.
• Flags affected : OF = 0 ,CF = 0 , AF is undefined.
• And other flags (SF, ZF, PF) are affected based on the XOR operation.
Operation Performed :--
Destination  Destination XOR source
• Examples :--
1. XOR BH,CL ;XOR byte in CL with Byte in BH, result in BH.
2. XOR BX,00FFH ;XOR word in BX with immediate data 00ffH
3. XOR [5000H], DX ; XOR word in DX with a word in memory with offset 5000 in
DS.
Numeric Example
If AX = 3F0F,
After Instruction,
XOR AX,9078H ; AX  AX XOR 0008H
;AX  3F0F XOR 0008
3F0F  0011 1111 0000 1111
XOR
9078  1001 0000 0111 1000
-------------------------------------
= 1010 1111 0111 0111
AF77H in AX register
NOT (Logical Invert )
Syntax :-- NOT destination
• This instruction complements (inverts) each bit of the byte or word stored in the
destination.
• The result is stored in the destination.
• The destination can be a register or a memory location.
• No Flags affected
Operation Performed :--
• Destination  NOT Destination
• Examples :--
1. NOT BH ;Complement byte in BH, result in BH.
2. NOT BX ; Complement word in BX, result in BX.
3. NOT BYTE PTR [5000H] ; Complement byte in memory with offset 5000 in DS.
Numeric Example
If AX = 3F0F,
After Instruction,
NOT AX ; AX  NOT AX
;AX  NOT 3F0F
3F0F  0011 1111 0000 1111
Complement
-------------------------------------
= 1100 0000 1111 0000
C0F0H in AX register
TEST (Logical compare )
Syntax :-- TEST destination, source
• This instruction is used to bit by bit AND the contents of source to the destination.
• The result is not stored in the destination.
• The source operand can be a immediate, a register or a memory location.
• The destination can be a register or a memory location, but not an immediate data.
• Both operands cannot be immediate data or memory location.
• Flags affected : OF = 0 ,CF = 0 , SF, ZF, PF.
• TEST instruction is used to set flags before a conditional jump instruction
Operation Performed :--
• Flags  set result of Destination AND source
• Examples :--
1. TEST BH,CL ;AND byte in CL with Byte in BH, no result but flags are affected.
2. TEST BX,00FFH ;AND word in BX with immediate data 00ffH, no result
but flags are affected.
3. TEST DX, [5000H] ;AND word in DX with a word in memory with offset
5000 in DS, no result but flags are affected.
SHL / SAL (Shift Logical/Arithmetic Left)
Syntax :-- SHL/SAL destination, count
• SHL & SAL are the opcodes for the same operation
• This instruction shifts the destination bit by bit to the left and insert zeroes in the newly
introduced least significant bits.
• The shift operation is through carry.
• The count can be either 1 or specified by CL register.
• The destination can be a byte or a word in register or a memory location, but not an
immediate data.
• Flags affected : OF ,CF, SF, ZF, PF.
• These instructions can be used to multiply an unsigned number by power of 2.
Operation Performed :--
CF  MSB LSB  0
Example :--
If CF = 0, BX = E6D3H
After SAL BX, 1 ; Shift the contents of BX register by one towards left
BX = CDA6
Example :--
Use of SHL instruction for Multiplication:-
If CF = 0, BH = 04H
MOV CL, 03 ; Load CL register for the count
SHL BH, CL ; Shift the contents of BX register by one towards left
BH = 20H (32D) [ 04 * 23 = 32 D]
Note :-- SHL can be used to multiply a number with powers of 2.
BH = 20H with CF = 0
SAR (Shift Arithmetic Right )
Syntax :-- SAR destination, count
• This instruction shifts the destination bit by bit to the right and MSB position is kept in
the old MSB position
• The shift operation is through carry, LSB is shifted to CF.
• The count can be either 1 or specified by CL register.
• The destination can be a byte or a word in register or a memory location, but not an
immediate data.
• Flags affected : OF ,CF, SF, ZF, PF.
• This instruction can be used to divide an unsigned number by power of 2.
Operation Performed :--
MSB LSB  CF
Example1 :--
If CF = 0, BX = E6D3H
After SAR BX, 1 ; Shift the contents of BX register by one towards right
BX = F369H with CF =1
Example2 :--
• Use of SAR instruction for Division:-
If CF = 0, BH = 14H
MOV CL, 02 ; Load CL register for the count
SAR BH, CL ; Shift the contents of BX register by one towards right
BH = 05H (20D) [ 20 / 22 = 05D]
BH = 05H with CF = 0
Note :-- SAR can be used to divide a number with powers of 2 and get the quotient.
SHR (Shift Logical Right)
Syntax :-- SHR destination, count
• This instruction shifts the destination bit by bit to the right and insert zeroes in the
newly introduced most significant bits.
• The shift operation is through carry.
• The count can be either 1 or specified by CL register.
• The destination can be a byte or a word in register or a memory location, but not an
immediate data.
• Flags affected : OF ,CF, SF, ZF, PF.
Operation Performed :--
0  MSB LSB  CF
Example :--
If CF = 0, BX = E6D3H
After SHR BX, 1 ; Shift the contents of BX register by one towards right
BX = 7369H
ROR (Rotate Right without Carry)
Syntax :-- ROR destination, count
• This instruction rotates the destination bit by bit to the right excluding the carry
• The bit moved out of LSB is rotated around into the MSB and also copied to CF.
• The count can be either 1 or specified by CL register.
• The destination can be a byte or a word in register or a memory location, but not an
immediate data.
• Flags affected : OF ,CF
Operation Performed :--
MSB LSB  CF
Example 1:--
If CF = 0, BX = E6D3H
After ROR BX, 1 ; Rotate the contents of BX register by one towards right
BX = F369H
Example2 :--
If CF = 0, BH = 54H
MOV CL, 02 ; Load CL register for the count
ROR BH, CL ; Rotate the contents of BH register by twice towards right
BH = 15H with CF = 0
Uses of ROR instruction:--
• This instruction can be used to swap the nibbles in a byte or to swap the bytes in a
word.
MOV CL,04H
ROR AL, CL
• It can also be used to rotate the bit into CF which can be checked later for a conditional
jump. (JC or JNC)
ROL (Rotate Left without Carry)
Syntax :-- ROL destination, count
• This instruction rotates the destination bit by bit to the left excluding the carry
• The bit moved out of MSB is rotated around into the LSB and also copied to CF.
• The count can be either 1 or specified by CL register.
• The destination can be a byte or a word in register or a memory location, but not an
immediate data.
• Flags affected : OF ,CF
Operation Performed :--
CF MSB LSB
Example1 :--
If CF = 0, BX = E6D3H
After ROL BX, 1 ; Rotate the contents of BX register by one towards left
BX = CDA7H
Example2 :--
If CF = 0, BH = 54H
MOV CL, 02 ; Load CL register for the count
ROL BH, CL ; Rotate the contents of BH register by twice towards Left
BH = 51H with CF = 1
Uses of ROL instruction:--
• This instruction can be used to swap the nibbles in a byte or to swap the bytes in a
word.
MOV CL,04H
ROL AL, CL
• It can also be used to rotate the bit into CF which can be checked later for a conditional
jump. (JC or JNC)
RCR (Rotate Right withCarry)
Syntax :-- RCR destination, count
• This instruction rotates the destination bit by bit to the right including the carry
• The bit moved out of LSB is rotated into CF and the bit in CF is rotated into the MSB.
• The count can be either 1 or specified by CL register.
• The destination can be a byte or a word in register or a memory location, but not an
immediate data.
• Flags affected : OF ,CF
Operation Performed :--
MSB LSB  CF
Example1 :--
If CF = 0, BX = E6D3H
After RCR BX, 1 ; Rotate the contents of BX register by one towards right through carry
Example2 :--
If CF = 0, BH = 54H
MOV CL, 02 ; Load CL register for the count
RCR BH, CL ; Rotate the contents of BH register by twice towards right through
carry
BH = 15H with CF = 0
RCL (Rotate Left withCarry)
Syntax :-- RCL destination, count
• This instruction rotates the destination bit by bit to the left including the carry
• The bit moved out of MSB is rotated into CF and the bit in CF is rotated into the
LSB.
• The count can be either 1 or specified by CL register.
• The destination can be a byte or a word in register or a memory location, but not
an immediate data.
• Flags affected : OF ,CF
Operation Performed :--
– CF MSB LSB
Example :--
If CF = 0, BX = E6D3H
After RCL BX, 1 ; Rotate the contents of BX register by one towards left through carry
BX = CDA6H
Example :--
If CF = 0, BH = 54H
MOV CL, 02 ; Load CL register for the count
RCL BH, CL ; Rotate the contents of BH register by twice towards Left through carry
Notes all instructions

More Related Content

What's hot

Instruction Set of 8086 Microprocessor
Instruction Set of 8086 MicroprocessorInstruction Set of 8086 Microprocessor
Instruction Set of 8086 Microprocessor
Ashita Agrawal
 
Instructionsetof8086 180224060745(3)
Instructionsetof8086 180224060745(3)Instructionsetof8086 180224060745(3)
Instructionsetof8086 180224060745(3)
AmitPaliwal20
 
8086 instruction set with types
8086 instruction set with types8086 instruction set with types
8086 instruction set with types
Ravinder Rautela
 
8086 Instruction set
8086 Instruction set8086 Instruction set
8086 Instruction set
karthiga selvaraju
 
Logical Instructions used in 8086 microprocessor
Logical Instructions used in 8086 microprocessorLogical Instructions used in 8086 microprocessor
Logical Instructions used in 8086 microprocessor
Rabin BK
 
Instruction set of 8086 Microprocessor
Instruction set of 8086 Microprocessor Instruction set of 8086 Microprocessor
Instruction set of 8086 Microprocessor
Velalar College of Engineering and Technology
 
Instruction sets of 8086
Instruction sets of 8086Instruction sets of 8086
Instruction sets of 8086
Mahalakshmiv11
 
8086 Microprocessor Instruction set
8086 Microprocessor Instruction set8086 Microprocessor Instruction set
8086 Microprocessor Instruction set
Vijay Kumar
 
Assembly Language Lecture 4
Assembly Language Lecture 4Assembly Language Lecture 4
Assembly Language Lecture 4
Motaz Saad
 
Arithmetic instructions
Arithmetic instructionsArithmetic instructions
Arithmetic instructions
Robert Almazan
 
8086 instruction set
8086 instruction set8086 instruction set
8086 instruction setjemimajerome
 
8086 microprocessor instruction set by Er. Swapnil Kaware
8086 microprocessor instruction set by Er. Swapnil Kaware8086 microprocessor instruction set by Er. Swapnil Kaware
8086 microprocessor instruction set by Er. Swapnil KawareProf. Swapnil V. Kaware
 
Arithmetic and logical instructions set
Arithmetic and logical instructions setArithmetic and logical instructions set
Arithmetic and logical instructions set
Robert Almazan
 
Instruction set of 8086
Instruction set of 8086Instruction set of 8086
Instruction set of 8086
Tirumalesh Nizampatnam
 
Instruction set of 8086
Instruction set of 8086Instruction set of 8086
Instruction set of 80869840596838
 
Chap3 8086 artithmetic
Chap3 8086 artithmeticChap3 8086 artithmetic
Chap3 8086 artithmetic
HarshitParkar6677
 
8086 ins2 math
8086 ins2 math8086 ins2 math
8086 ins2 math
HarshitParkar6677
 
Instruction set
Instruction setInstruction set
Instruction set
Kamini Benare
 
1344 Alp Of 8086
1344 Alp Of 80861344 Alp Of 8086
1344 Alp Of 8086
techbed
 

What's hot (19)

Instruction Set of 8086 Microprocessor
Instruction Set of 8086 MicroprocessorInstruction Set of 8086 Microprocessor
Instruction Set of 8086 Microprocessor
 
Instructionsetof8086 180224060745(3)
Instructionsetof8086 180224060745(3)Instructionsetof8086 180224060745(3)
Instructionsetof8086 180224060745(3)
 
8086 instruction set with types
8086 instruction set with types8086 instruction set with types
8086 instruction set with types
 
8086 Instruction set
8086 Instruction set8086 Instruction set
8086 Instruction set
 
Logical Instructions used in 8086 microprocessor
Logical Instructions used in 8086 microprocessorLogical Instructions used in 8086 microprocessor
Logical Instructions used in 8086 microprocessor
 
Instruction set of 8086 Microprocessor
Instruction set of 8086 Microprocessor Instruction set of 8086 Microprocessor
Instruction set of 8086 Microprocessor
 
Instruction sets of 8086
Instruction sets of 8086Instruction sets of 8086
Instruction sets of 8086
 
8086 Microprocessor Instruction set
8086 Microprocessor Instruction set8086 Microprocessor Instruction set
8086 Microprocessor Instruction set
 
Assembly Language Lecture 4
Assembly Language Lecture 4Assembly Language Lecture 4
Assembly Language Lecture 4
 
Arithmetic instructions
Arithmetic instructionsArithmetic instructions
Arithmetic instructions
 
8086 instruction set
8086 instruction set8086 instruction set
8086 instruction set
 
8086 microprocessor instruction set by Er. Swapnil Kaware
8086 microprocessor instruction set by Er. Swapnil Kaware8086 microprocessor instruction set by Er. Swapnil Kaware
8086 microprocessor instruction set by Er. Swapnil Kaware
 
Arithmetic and logical instructions set
Arithmetic and logical instructions setArithmetic and logical instructions set
Arithmetic and logical instructions set
 
Instruction set of 8086
Instruction set of 8086Instruction set of 8086
Instruction set of 8086
 
Instruction set of 8086
Instruction set of 8086Instruction set of 8086
Instruction set of 8086
 
Chap3 8086 artithmetic
Chap3 8086 artithmeticChap3 8086 artithmetic
Chap3 8086 artithmetic
 
8086 ins2 math
8086 ins2 math8086 ins2 math
8086 ins2 math
 
Instruction set
Instruction setInstruction set
Instruction set
 
1344 Alp Of 8086
1344 Alp Of 80861344 Alp Of 8086
1344 Alp Of 8086
 

Similar to Notes all instructions

Arithmetic instrctions
Arithmetic instrctionsArithmetic instrctions
Arithmetic instrctions
HarshitParkar6677
 
Chapter3 8086inst logical 2
Chapter3 8086inst logical 2Chapter3 8086inst logical 2
Chapter3 8086inst logical 2
HarshitParkar6677
 
Chapter 3 8086 ins2 math
Chapter 3 8086 ins2 mathChapter 3 8086 ins2 math
Chapter 3 8086 ins2 math
HarshitParkar6677
 
8086 instructions
8086 instructions8086 instructions
8086 instructions
Ravi Anand
 
8086 instruction set
8086 instruction set8086 instruction set
8086 instruction set
Sazzad Hossain
 
All-addressing-modes of the 80386 /microprocessor.pptx
All-addressing-modes of the 80386 /microprocessor.pptxAll-addressing-modes of the 80386 /microprocessor.pptx
All-addressing-modes of the 80386 /microprocessor.pptx
VidyaAshokNemade
 
Mastering Assembly Language: Programming with 8086
Mastering Assembly Language: Programming with 8086Mastering Assembly Language: Programming with 8086
Mastering Assembly Language: Programming with 8086
sravanithonta79
 
Intrl 8086 instruction set
Intrl 8086 instruction setIntrl 8086 instruction set
Intrl 8086 instruction set
edwardkiwalabye1
 
Lec06
Lec06Lec06
Addressing modes of 8086
Addressing modes of 8086Addressing modes of 8086
Addressing modes of 8086
Dr. AISHWARYA N
 
Chap 3_2.ppt
Chap 3_2.pptChap 3_2.ppt
Chap 3_2.ppt
inian2
 
Microprocessor.pptx
Microprocessor.pptxMicroprocessor.pptx
Microprocessor.pptx
NishatNishu5
 
8086 instruction set (with simulator)
8086 instruction set (with simulator)8086 instruction set (with simulator)
8086 instruction set (with simulator)
Aswini Dharmaraj
 
Microprocessor
MicroprocessorMicroprocessor
Microprocessor
adnanqayum
 
Introduction of 8086 micro processor .
Introduction of 8086 micro processor .Introduction of 8086 micro processor .
Introduction of 8086 micro processor .
Siraj Ahmed
 
8086 microprocessor assembler directives.ppt
8086   microprocessor assembler directives.ppt8086   microprocessor assembler directives.ppt
8086 microprocessor assembler directives.ppt
NaveenKumar5162
 
Intel8086_Flags_Addr_Modes_sample_pgms.pdf
Intel8086_Flags_Addr_Modes_sample_pgms.pdfIntel8086_Flags_Addr_Modes_sample_pgms.pdf
Intel8086_Flags_Addr_Modes_sample_pgms.pdf
Anonymous611358
 
Unit 2 assembly language programming
Unit 2   assembly language programmingUnit 2   assembly language programming
Unit 2 assembly language programming
Kartik Sharma
 

Similar to Notes all instructions (20)

Arithmetic instrctions
Arithmetic instrctionsArithmetic instrctions
Arithmetic instrctions
 
Chapter3 8086inst logical 2
Chapter3 8086inst logical 2Chapter3 8086inst logical 2
Chapter3 8086inst logical 2
 
Chapter 3 8086 ins2 math
Chapter 3 8086 ins2 mathChapter 3 8086 ins2 math
Chapter 3 8086 ins2 math
 
8086 instructions
8086 instructions8086 instructions
8086 instructions
 
8086 instruction set
8086 instruction set8086 instruction set
8086 instruction set
 
All-addressing-modes of the 80386 /microprocessor.pptx
All-addressing-modes of the 80386 /microprocessor.pptxAll-addressing-modes of the 80386 /microprocessor.pptx
All-addressing-modes of the 80386 /microprocessor.pptx
 
Mastering Assembly Language: Programming with 8086
Mastering Assembly Language: Programming with 8086Mastering Assembly Language: Programming with 8086
Mastering Assembly Language: Programming with 8086
 
Intrl 8086 instruction set
Intrl 8086 instruction setIntrl 8086 instruction set
Intrl 8086 instruction set
 
Lec06
Lec06Lec06
Lec06
 
Addressing modes of 8086
Addressing modes of 8086Addressing modes of 8086
Addressing modes of 8086
 
Chap 3_2.ppt
Chap 3_2.pptChap 3_2.ppt
Chap 3_2.ppt
 
Microprocessor.pptx
Microprocessor.pptxMicroprocessor.pptx
Microprocessor.pptx
 
8086 instruction set (with simulator)
8086 instruction set (with simulator)8086 instruction set (with simulator)
8086 instruction set (with simulator)
 
Lecture5
Lecture5Lecture5
Lecture5
 
Lecture5(1)
Lecture5(1)Lecture5(1)
Lecture5(1)
 
Microprocessor
MicroprocessorMicroprocessor
Microprocessor
 
Introduction of 8086 micro processor .
Introduction of 8086 micro processor .Introduction of 8086 micro processor .
Introduction of 8086 micro processor .
 
8086 microprocessor assembler directives.ppt
8086   microprocessor assembler directives.ppt8086   microprocessor assembler directives.ppt
8086 microprocessor assembler directives.ppt
 
Intel8086_Flags_Addr_Modes_sample_pgms.pdf
Intel8086_Flags_Addr_Modes_sample_pgms.pdfIntel8086_Flags_Addr_Modes_sample_pgms.pdf
Intel8086_Flags_Addr_Modes_sample_pgms.pdf
 
Unit 2 assembly language programming
Unit 2   assembly language programmingUnit 2   assembly language programming
Unit 2 assembly language programming
 

More from HarshitParkar6677

Wi fi hacking
Wi fi hackingWi fi hacking
Wi fi hacking
HarshitParkar6677
 
D dos attack
D dos attackD dos attack
D dos attack
HarshitParkar6677
 
Notes chapter 6
Notes chapter  6Notes chapter  6
Notes chapter 6
HarshitParkar6677
 
Interface notes
Interface notesInterface notes
Interface notes
HarshitParkar6677
 
Chapter6 2
Chapter6 2Chapter6 2
Chapter6 2
HarshitParkar6677
 
Chapter6
Chapter6Chapter6
8086 cpu 1
8086 cpu 18086 cpu 1
8086 cpu 1
HarshitParkar6677
 
Chapter 6 notes
Chapter 6 notesChapter 6 notes
Chapter 6 notes
HarshitParkar6677
 
Chapter 5 notes
Chapter 5 notesChapter 5 notes
Chapter 5 notes
HarshitParkar6677
 
Chap6 procedures &amp; macros
Chap6 procedures &amp; macrosChap6 procedures &amp; macros
Chap6 procedures &amp; macros
HarshitParkar6677
 
Chapter 5 notes new
Chapter 5 notes newChapter 5 notes new
Chapter 5 notes new
HarshitParkar6677
 
Notes aaa aa
Notes aaa aaNotes aaa aa
Notes aaa aa
HarshitParkar6677
 
Notes 8086 instruction format
Notes 8086 instruction formatNotes 8086 instruction format
Notes 8086 instruction format
HarshitParkar6677
 
Misc
MiscMisc
Chapter3 program flow control instructions
Chapter3 program flow control instructionsChapter3 program flow control instructions
Chapter3 program flow control instructions
HarshitParkar6677
 
Chapter3 8086inst stringsl
Chapter3 8086inst stringslChapter3 8086inst stringsl
Chapter3 8086inst stringsl
HarshitParkar6677
 
Chap3 program flow control instructions
Chap3 program flow control instructionsChap3 program flow control instructions
Chap3 program flow control instructions
HarshitParkar6677
 
Chap3 8086 data transfer
Chap3 8086 data transferChap3 8086 data transfer
Chap3 8086 data transfer
HarshitParkar6677
 
Chap 8086 string
Chap 8086 stringChap 8086 string
Chap 8086 string
HarshitParkar6677
 
Addressing modes of 8086
Addressing modes of 8086Addressing modes of 8086
Addressing modes of 8086
HarshitParkar6677
 

More from HarshitParkar6677 (20)

Wi fi hacking
Wi fi hackingWi fi hacking
Wi fi hacking
 
D dos attack
D dos attackD dos attack
D dos attack
 
Notes chapter 6
Notes chapter  6Notes chapter  6
Notes chapter 6
 
Interface notes
Interface notesInterface notes
Interface notes
 
Chapter6 2
Chapter6 2Chapter6 2
Chapter6 2
 
Chapter6
Chapter6Chapter6
Chapter6
 
8086 cpu 1
8086 cpu 18086 cpu 1
8086 cpu 1
 
Chapter 6 notes
Chapter 6 notesChapter 6 notes
Chapter 6 notes
 
Chapter 5 notes
Chapter 5 notesChapter 5 notes
Chapter 5 notes
 
Chap6 procedures &amp; macros
Chap6 procedures &amp; macrosChap6 procedures &amp; macros
Chap6 procedures &amp; macros
 
Chapter 5 notes new
Chapter 5 notes newChapter 5 notes new
Chapter 5 notes new
 
Notes aaa aa
Notes aaa aaNotes aaa aa
Notes aaa aa
 
Notes 8086 instruction format
Notes 8086 instruction formatNotes 8086 instruction format
Notes 8086 instruction format
 
Misc
MiscMisc
Misc
 
Chapter3 program flow control instructions
Chapter3 program flow control instructionsChapter3 program flow control instructions
Chapter3 program flow control instructions
 
Chapter3 8086inst stringsl
Chapter3 8086inst stringslChapter3 8086inst stringsl
Chapter3 8086inst stringsl
 
Chap3 program flow control instructions
Chap3 program flow control instructionsChap3 program flow control instructions
Chap3 program flow control instructions
 
Chap3 8086 data transfer
Chap3 8086 data transferChap3 8086 data transfer
Chap3 8086 data transfer
 
Chap 8086 string
Chap 8086 stringChap 8086 string
Chap 8086 string
 
Addressing modes of 8086
Addressing modes of 8086Addressing modes of 8086
Addressing modes of 8086
 

Recently uploaded

Immunizing Image Classifiers Against Localized Adversary Attacks
Immunizing Image Classifiers Against Localized Adversary AttacksImmunizing Image Classifiers Against Localized Adversary Attacks
Immunizing Image Classifiers Against Localized Adversary Attacks
gerogepatton
 
Standard Reomte Control Interface - Neometrix
Standard Reomte Control Interface - NeometrixStandard Reomte Control Interface - Neometrix
Standard Reomte Control Interface - Neometrix
Neometrix_Engineering_Pvt_Ltd
 
Gen AI Study Jams _ For the GDSC Leads in India.pdf
Gen AI Study Jams _ For the GDSC Leads in India.pdfGen AI Study Jams _ For the GDSC Leads in India.pdf
Gen AI Study Jams _ For the GDSC Leads in India.pdf
gdsczhcet
 
Democratizing Fuzzing at Scale by Abhishek Arya
Democratizing Fuzzing at Scale by Abhishek AryaDemocratizing Fuzzing at Scale by Abhishek Arya
Democratizing Fuzzing at Scale by Abhishek Arya
abh.arya
 
road safety engineering r s e unit 3.pdf
road safety engineering  r s e unit 3.pdfroad safety engineering  r s e unit 3.pdf
road safety engineering r s e unit 3.pdf
VENKATESHvenky89705
 
Automobile Management System Project Report.pdf
Automobile Management System Project Report.pdfAutomobile Management System Project Report.pdf
Automobile Management System Project Report.pdf
Kamal Acharya
 
addressing modes in computer architecture
addressing modes  in computer architectureaddressing modes  in computer architecture
addressing modes in computer architecture
ShahidSultan24
 
AKS UNIVERSITY Satna Final Year Project By OM Hardaha.pdf
AKS UNIVERSITY Satna Final Year Project By OM Hardaha.pdfAKS UNIVERSITY Satna Final Year Project By OM Hardaha.pdf
AKS UNIVERSITY Satna Final Year Project By OM Hardaha.pdf
SamSarthak3
 
J.Yang, ICLR 2024, MLILAB, KAIST AI.pdf
J.Yang,  ICLR 2024, MLILAB, KAIST AI.pdfJ.Yang,  ICLR 2024, MLILAB, KAIST AI.pdf
J.Yang, ICLR 2024, MLILAB, KAIST AI.pdf
MLILAB
 
HYDROPOWER - Hydroelectric power generation
HYDROPOWER - Hydroelectric power generationHYDROPOWER - Hydroelectric power generation
HYDROPOWER - Hydroelectric power generation
Robbie Edward Sayers
 
Planning Of Procurement o different goods and services
Planning Of Procurement o different goods and servicesPlanning Of Procurement o different goods and services
Planning Of Procurement o different goods and services
JoytuBarua2
 
Pile Foundation by Venkatesh Taduvai (Sub Geotechnical Engineering II)-conver...
Pile Foundation by Venkatesh Taduvai (Sub Geotechnical Engineering II)-conver...Pile Foundation by Venkatesh Taduvai (Sub Geotechnical Engineering II)-conver...
Pile Foundation by Venkatesh Taduvai (Sub Geotechnical Engineering II)-conver...
AJAYKUMARPUND1
 
block diagram and signal flow graph representation
block diagram and signal flow graph representationblock diagram and signal flow graph representation
block diagram and signal flow graph representation
Divya Somashekar
 
Cosmetic shop management system project report.pdf
Cosmetic shop management system project report.pdfCosmetic shop management system project report.pdf
Cosmetic shop management system project report.pdf
Kamal Acharya
 
The Benefits and Techniques of Trenchless Pipe Repair.pdf
The Benefits and Techniques of Trenchless Pipe Repair.pdfThe Benefits and Techniques of Trenchless Pipe Repair.pdf
The Benefits and Techniques of Trenchless Pipe Repair.pdf
Pipe Restoration Solutions
 
Industrial Training at Shahjalal Fertilizer Company Limited (SFCL)
Industrial Training at Shahjalal Fertilizer Company Limited (SFCL)Industrial Training at Shahjalal Fertilizer Company Limited (SFCL)
Industrial Training at Shahjalal Fertilizer Company Limited (SFCL)
MdTanvirMahtab2
 
Courier management system project report.pdf
Courier management system project report.pdfCourier management system project report.pdf
Courier management system project report.pdf
Kamal Acharya
 
The role of big data in decision making.
The role of big data in decision making.The role of big data in decision making.
The role of big data in decision making.
ankuprajapati0525
 
power quality voltage fluctuation UNIT - I.pptx
power quality voltage fluctuation UNIT - I.pptxpower quality voltage fluctuation UNIT - I.pptx
power quality voltage fluctuation UNIT - I.pptx
ViniHema
 
LIGA(E)11111111111111111111111111111111111111111.ppt
LIGA(E)11111111111111111111111111111111111111111.pptLIGA(E)11111111111111111111111111111111111111111.ppt
LIGA(E)11111111111111111111111111111111111111111.ppt
ssuser9bd3ba
 

Recently uploaded (20)

Immunizing Image Classifiers Against Localized Adversary Attacks
Immunizing Image Classifiers Against Localized Adversary AttacksImmunizing Image Classifiers Against Localized Adversary Attacks
Immunizing Image Classifiers Against Localized Adversary Attacks
 
Standard Reomte Control Interface - Neometrix
Standard Reomte Control Interface - NeometrixStandard Reomte Control Interface - Neometrix
Standard Reomte Control Interface - Neometrix
 
Gen AI Study Jams _ For the GDSC Leads in India.pdf
Gen AI Study Jams _ For the GDSC Leads in India.pdfGen AI Study Jams _ For the GDSC Leads in India.pdf
Gen AI Study Jams _ For the GDSC Leads in India.pdf
 
Democratizing Fuzzing at Scale by Abhishek Arya
Democratizing Fuzzing at Scale by Abhishek AryaDemocratizing Fuzzing at Scale by Abhishek Arya
Democratizing Fuzzing at Scale by Abhishek Arya
 
road safety engineering r s e unit 3.pdf
road safety engineering  r s e unit 3.pdfroad safety engineering  r s e unit 3.pdf
road safety engineering r s e unit 3.pdf
 
Automobile Management System Project Report.pdf
Automobile Management System Project Report.pdfAutomobile Management System Project Report.pdf
Automobile Management System Project Report.pdf
 
addressing modes in computer architecture
addressing modes  in computer architectureaddressing modes  in computer architecture
addressing modes in computer architecture
 
AKS UNIVERSITY Satna Final Year Project By OM Hardaha.pdf
AKS UNIVERSITY Satna Final Year Project By OM Hardaha.pdfAKS UNIVERSITY Satna Final Year Project By OM Hardaha.pdf
AKS UNIVERSITY Satna Final Year Project By OM Hardaha.pdf
 
J.Yang, ICLR 2024, MLILAB, KAIST AI.pdf
J.Yang,  ICLR 2024, MLILAB, KAIST AI.pdfJ.Yang,  ICLR 2024, MLILAB, KAIST AI.pdf
J.Yang, ICLR 2024, MLILAB, KAIST AI.pdf
 
HYDROPOWER - Hydroelectric power generation
HYDROPOWER - Hydroelectric power generationHYDROPOWER - Hydroelectric power generation
HYDROPOWER - Hydroelectric power generation
 
Planning Of Procurement o different goods and services
Planning Of Procurement o different goods and servicesPlanning Of Procurement o different goods and services
Planning Of Procurement o different goods and services
 
Pile Foundation by Venkatesh Taduvai (Sub Geotechnical Engineering II)-conver...
Pile Foundation by Venkatesh Taduvai (Sub Geotechnical Engineering II)-conver...Pile Foundation by Venkatesh Taduvai (Sub Geotechnical Engineering II)-conver...
Pile Foundation by Venkatesh Taduvai (Sub Geotechnical Engineering II)-conver...
 
block diagram and signal flow graph representation
block diagram and signal flow graph representationblock diagram and signal flow graph representation
block diagram and signal flow graph representation
 
Cosmetic shop management system project report.pdf
Cosmetic shop management system project report.pdfCosmetic shop management system project report.pdf
Cosmetic shop management system project report.pdf
 
The Benefits and Techniques of Trenchless Pipe Repair.pdf
The Benefits and Techniques of Trenchless Pipe Repair.pdfThe Benefits and Techniques of Trenchless Pipe Repair.pdf
The Benefits and Techniques of Trenchless Pipe Repair.pdf
 
Industrial Training at Shahjalal Fertilizer Company Limited (SFCL)
Industrial Training at Shahjalal Fertilizer Company Limited (SFCL)Industrial Training at Shahjalal Fertilizer Company Limited (SFCL)
Industrial Training at Shahjalal Fertilizer Company Limited (SFCL)
 
Courier management system project report.pdf
Courier management system project report.pdfCourier management system project report.pdf
Courier management system project report.pdf
 
The role of big data in decision making.
The role of big data in decision making.The role of big data in decision making.
The role of big data in decision making.
 
power quality voltage fluctuation UNIT - I.pptx
power quality voltage fluctuation UNIT - I.pptxpower quality voltage fluctuation UNIT - I.pptx
power quality voltage fluctuation UNIT - I.pptx
 
LIGA(E)11111111111111111111111111111111111111111.ppt
LIGA(E)11111111111111111111111111111111111111111.pptLIGA(E)11111111111111111111111111111111111111111.ppt
LIGA(E)11111111111111111111111111111111111111111.ppt
 

Notes all instructions

  • 1. Classificationof InstructionSet: 8086 instructions are classified as given below, based on its operation performed. 1. Data Transfer Instructions 2. Arithmetic Instructions 3. Bit Manipulation Instructions 4. Program Execution Transfer Instructions 5. String Instructions 6. Processor Control Instructions Data Transfer Instructions These instructions are used to transfer data from source to destination. The operand can be a constant, memory location, register or I/O port address. 1. MOV Destination,Source: • This instructionisusedtotransfercontentsof source tothe destination. • The source operandcanbe a immediate,aregisterora memorylocationaddressedby any of the 24 addressingmodes. • The destinationcanbe a registerora memorylocation,butnotan immediate data. • Both operandscannotbe immediate dataormemorylocation. • To loadthe segmentregisterswithdata,anygeneral purpose registerisloadedwiththe data firstand thenmovedtothat particularsegmentregister E.g.: MOV CX,037A H MOV AL, BL MOV BX,[0301 H] MOV DS, AX 2. PUSH Source  It pushesthe operandintotopof stack.  The PUSH instructiondecrementsthe stackpointerby2 copiesaword fromsource to the locationpointedbythe stackpointerwithinthe stacksegment.  The source can be a general purpose register,memorylocationorasegmentregister. E.g.: PUSH BX PUSH DS PUSH [2000h} PUSH AL; not allowed 3. POP Destination  It popsthe operandfromtop of stackto Destination.  It copiesa wordfromthe locationpointedbythe stackpointerwithinthe stacksegmentto the specifieddestinationand incrementsthe stackpointerby2.  The source can be a general purpose register,memorylocationorasegmentregister. E.g.: POPAX POPDS POP[3000h] 4. XCHG Destination,Source  ThisinstructionexchangesSource withDestination.  It cannot exchange twomemorylocationsdirectly.  The source anddestinationcanbe anyof the general purpose registerormemorylocation, but nottwo locationssimultaneously.  No segmentregisterscanbe used. E.g.: XCHG DX, AX XCHG BL, CH XCHG AL,[9800] 5. IN Accumulator, Port Address:  It transfersthe operandfromspecifiedporttoaccumulator registerwhichcanbe AL or AX.  The addressof the port isspecifiedinthe instruction eitherdirectly(fixedport) orindirectly (variable portusingDXregister). E.g.: IN AX, 80H IN AL, DX ; DX may containthe addressof the portas 8000H
  • 2. 6. OUT Port Address,Accumulator: It transfersthe operandfromaccumulator AL or AX to specifiedport. The addressof the port isspecifiedeitherdirectly(fixedport) orindirectly(variableportusingDX register). E.g.: OUT 80 H, AX OUT DX,AL ; DX may containthe addressof the portas 8000H 7. LEA Register,Src: It loadsa 16-bit registerwiththe offsetaddressof the dataspecifiedbythe Src. E.g.: LEA BX,[DI] Thisinstructionloadsthe contentsof DI(offset) intothe BXregister. 8. LDS Des,Src: It loads32-bit pointerfrommemorysource todestination registerandDS. The offsetisplacedinthe destinationregisterandthe segmentisplacedinDS. To use thisinstructionthe wordat the lowermemoryaddressmustcontainthe offsetandthe word at the higheraddressmustcontainthe segment. E.g.: LDS BX, [0301 H] 9. LES Des,Src: It loads32-bit pointerfrommemorysource todestinationregisterandES. The offsetisplacedinthe destinationregisterandthe segmentisplacedinES. ThisinstructionisverysimilartoLDS exceptthatitinitializesESinsteadof DS. E.g.: LES BX, [0301 H] 10. LAHF: It copiesthe lowerbyte of flagregistertoAH. Thisinstructionisusedtosimulate 8085 PUSH PSW instruction.Thisaffectsnoflags. E.g.: LAHF 11. SAHF: It copiesthe contentsof AH to lowerbyte of flagregister. Thisinstructionisusedtosimulate 8085 POPPSW instruction.Thisaffectsthe lowerbyte of the flagregister. E.g.: SAHF 12. PUSHF: Pushesflagregistertotopof stack. Thisinstructiondecrementsthe stackpointerby2 and copies the word inthe flagregistertothe memorylocationspointedbystackpointer.Noflagsare changed. E.g.: PUSHF 13. POPF: Popsthe contentsof stack top to the flagregister. Thiscopiesawordfrom twomemorylocationsat the top of the stack to the flagregisterandincrements the stackpointerbytwo.All flagsare affected. E.g.: POPF 14. XLAT The XLAT (Translate) instructionreplacesabyte inALregisterwitha byte froma lookuptable in memory.Before the execution,BXregistershouldbe loadedwiththe offsetof the lookup table. XLAT instructionaddsthe ALbyte withthe offsetof the start of the table inBX andthencopiesthe byte pointedbythismemorylocationbacktoAL. XLAT changesnoflags. E.g: If AL ishavinga byte whose code isto be foundout, MOV BX,2800H ; PointBX at the start of the table XLAT ; replace the byte inAL withthe code in table. Arithmetic Instructions 1. ADD Destination,Source • Thisinstructionisusedto add the contentsof source to the destination. • The resultisstoredin the destination. • The source operandcanbe a immediate,aregisterora memorylocationaddressedby any of the 24 addressingmodes. • The destinationcanbe a registerora memorylocation,butnotan immediate data. • Both operandscannotbe immediate dataormemorylocation.
  • 3. • The source andthe destinationmustbe of the same data type i.e.,ADDinstruction adds a byte to byte or a wordto word. • It affectsAF,CF,OF, PF,SF,ZF flags. E.g.: ADD AL, 74H ADD DX,AX ADD AX,[BX] 2. ADC Destination,Source • Thisinstructionisusedto add the contentsof source to the destinationandcarry flag. • The resultisstoredin the destination. • The source operandcanbe a immediate,aregisterora memorylocationaddressedby any of the 24 addressingmodes. • The destinationcanbe a registerora memorylocation,butnotan immediate data. • Both operandscannotbe immediate dataormemorylocation. • The source andthe destinationmustbe of the same data type i.e.,ADDinstruction adds a byte to byte or a wordto word. • It addsthe twooperandswithCF. • It effectsAF,CF,OF,PF,SF, ZF flags. E.g.: ADC AL,74H ADC DX,AX ADC AX,[BX] 3. SUB Destination,Source • Thisinstructionisusedto subtract the contentsof source from the destination. • The resultisstoredin the destination. • The source operandcanbe a immediate,aregisterora memorylocationaddressedby any of the 24 addressingmodes. • The destinationcanbe a registerora memorylocation,butnotan immediate data. • Both operands cannotbe immediate dataormemorylocation. • The source andthe destinationmustbe of the same data type i.e.,SUBinstruction subtractsa byte frombyte or a word fromword. • It affectsAF,CF,OF, PF,SF,ZF flags. • For subtraction,CFacts as borrow flag. E.g.: SUB AL, 74H SUB DX, AX SUB AX, [BX] 4. SBB Destination,Source • Thisinstructionisusedto subtract the contentsof source withborrow from the destination. • The resultisstoredin the destination. • The source operandcanbe a immediate,aregisteror a memorylocationaddressedby any of the 24 addressingmodes. • The destinationcanbe a registerora memorylocation,butnotan immediate data. • Both operandscannotbe immediate dataormemorylocation. • The source andthe destinationmustbe of the same data type i.e.,SUBinstruction subtractsa byte frombyte or a word fromword. • It affectsAF,CF,OF, PF,SF,ZF flags. • For subtraction,CFacts as borrow flag. E.g.: SBB AL, 74H SBB DX, AX SBB AX,[BX] 5. INC Destination • It incrementsthe byte orword in destination byone. • The destinationoperandcanbe a registerora memorylocationaddressedbyanyof the 24 addressingmodes. • It affectsAF,OF,PF,SF, ZF flags.
  • 4. • CF isnot affected. E.g.: INC AX INCBL 6. DEC Destination • It decrementsthe byte orword indestination byone. • The destinationoperandcanbe a registerora memorylocationaddressedbyanyof the 24 addressingmodes. • It affectsAF,OF,PF,SF, ZF flags. • CF isnot affected. E.g.: DEC AX DEC CL 7. DAA (Decimal Adjust Accumulator) Syntax :-- DAA • This instructionisusedtoconvertthe resultof the additionof twopackedBCD numberstoa validBCDnumber. • The resulthasto be onlyin AL. • Afteradditionif the lowernibble isgreaterthan9 or AF =1, it will add06H to the lower nibble inAL. • Afterthisaddition,if the uppernibbleisgreaterthan9 or if CF = 1, DAA instruction adds 60H to AL. • DAA instructionaffectsAF,CF,PFandZF. OFisundefined. OperationPerformed:-- – If lowernibble of AL> 9 or AF =1 thenAL = AL +06 – If highernibble of AL> 9 or CF =1 thenAL = AL +60 NumericExamples AL = 53H, CL = 29H ADD AL,CL ; AL  AL + CL ;AL  53 + 29 ;AL  7CH DAA ; AL 7C +06 (asC>9) ;AL 82 8. DAS (Decimal Adjust AfterSubtraction) Syntax :-- DAS • This instructionisusedtoconvertthe resultof the subtractionof twopackedBCD numberstoa validBCDnumber. • The subtractionhasto be onlyin AL. • Aftersubtractionif the lowernibble isgreaterthan9or AF=1, it will subtract06H from the lowernibble inAL. • If the resultof the subtractionsetsthe carry flag or if the uppernibble isgreaterthan9, DAS instructionsubtracts60H fromAL. • DAS instructionaffectsAF,CF,PFandZF.OFis undefined. OperationPerformed:-- – If lowernibble of AL> 9 or AF =1 thenAL = AL -06 – If highernibble of AL> 9 or CF =1 thenAL = AL -60 NumericExamples AL = 75, BH = 46 SUB AL,BH ; AL  (AL) - (BH) ;AL  75 - 46 ;AL  2FH ; AF = 1 DAS ; AL 2F - 06 (as F>9) ;AL 29 9. MUL (Unsignedmultiplication) Syntax :-- MUL source
  • 5. • This instructionmultipliesan unsignedbyte fromsource withan unsignedbyte in AL register or Unsignedword fromsource withanunsignedwordin AX register. • The source can be a registerormemorylocationbutcannotbe an immediatedata. • Whena byte is multipliedwithabyte inAL, the resultisstoredinAX. • Whena wordis multipliedwithawordinAX,the MSW (Most SignificantWord) of the resultisstoredinDX and the LSW (LeastSignificantWord) of the resultisstoredinAX. • If MS Byte or Word of the resultiszero,CF and OF bothwill be set. • All otherflagsare modifieddependinguponthe result OperationPerformed:-- – If source isbyte thenAX  AL * unsigned8bitsource – If source iswordthenDX, AX  AX * unsigned16 bitsource Examples:-- 1. MUL BL ; MultiplyALby BL & the resultinAX 2. MUL CX ; MultiplyAXbyCX & the resultinDX,AX 3. MUL Byte PTR [SI] ; AX  AL * [SI] 10. IMUL (Signedmultiplication) Syntax :-- IMUL source • This instructionmultipliesa signedbyte fromsource witha signedbyte in ALregister or signedword fromsource withan signedwordin AX register. • The source can be a register,general purpose,base orindex,ormemorylocation,but cannot be an immediate data. • Whena byte is multipliedwithabyte inAL, the resultisstoredinAX. • Whena wordis multipliedwithawordinAX,the MSW (Most SignificantWord) of the resultisstoredinDX and the LSW (LeastSignificantWord) of the resultisstoredinAX. • If the magnitude of the productdoesnotrequire all the bitsof the destination,the unusedbitsare filledwithcopiesof the signbit. • If AH and DX containparts of the 16 & 32 bit results,CFandOF are set,If the unused bitsare filledbythe signbit,OFandCF are cleared. OperationPerformed:-- • If source isbyte thenAX  AL * signed8bit source • If source iswordthenDX, AX  AX * signed16 bit source Examples:-- 1. IMUL BL ; MultiplyALby BL & the resultinAX 2. IMUL CX ; MultiplyAXbyCX & the resultinDX,AX 3. IMUL Byte PTR [SI] ; AX  AL * [SI] • 11. DIV (UnsignedDivision) Syntax :-- DIV source • This instructiondividesanunsigned word(16Bits) in AX registerbyan unsigned byte (8Bits) fromsource or an unsigned double word(32 bits) in DX & AX registerbyan unsigned word(16bits) fromsource • The source can be a registerormemorylocationbutcannotbe an immediatedata. • Whena word inAX isdividedbyabyte,AL will containthe 8 bitquotientandAHwill containan 8 bitremainder. • Whena double wordinDX(MSW) & AX (LSW) isdividedbya word,AX will containthe 16 bit quotientandDXwill containan16 bitremainder. • If a byte isto be dividedbya byte,ALis loadedwithdividendandAHisfilledwithall 0’s. • If a wordis to be dividedbyaword,Ax is loadedwithdividendandDXis filledwithall 0’s.
  • 6. • If an attemptismade to divide by0,or the quotientistoolarge (FFor FFFF),type 0 interruptisgenerated. • No flagsare affected. OperationPerformed:-- • If source isbyte then • AL  AX/ unsigned8bit source ; (quotient) • AH  AXMOD unsigned8bitsource ; (remainder) • If source iswordthen • AX  DX:AX/ unsigned16 bitsource ; (quotient) • DX  DX:AXMOD unsigned16 bitsource ; (remainder) Examples:-- 1. DIV BL ; Divide wordinAXby byte in BL, Quotientisstoredin AL, remainderinAH. 2. DIV CX ; Divide double wordinDX:AX bywordinCX,QuotientinAX, RemainderinDX. 3. DIV [BX] ; Divide wordinAXby byte in memorylocationpointerby BX. 12. CBW (ConvertSignedByte to Word) Syntax :-- CBW • This instructionconvertsasignedbyte toa signedword. • Thisinstructioncopiesthe signof a byte inAL to all the bitsin AH. • AH is thensaidto be the signextensionof AL. • CBW operationisdone before performingdivisionof asignedbyte inthe ALby another signedbyte withIDIV instruction. Operation :-- • AH  filledwith8th bitof AL i.e.,D7 Thisdoesnot affectanyflags. Example :-- If AX = 009BH, (00000000 10011011 AfterCBW Instruction, AX=FF9B (11111111 10011011) 13. CWD (ConvertSignedWordto Double Word) Syntax :-- CWD • This instructioncopiesthe signbitof aword inAXto all the bitsinDX. • Thus the signof AXis saidto be extendedtoDX. • CWD operationisdone before performingdivisionof asignedwordinthe AXby anothersignedwordwithIDIV instruction. Operation :-- • DX filledwith16th bitof AXi.e.,D15 Thisdoesnot affectanyflags. Example :-- If DX = 0000H (00000000 00000000) If AX = F0C7H, (11110000 11000111) AfterCWD Instruction, DX = FFFFH (11111111 11111111) AX=F0C7 (11110000 11000111) 14. CMP (Compare) Syntax :-- CMP destination,source • Thisinstructioncomparesthe source operand,whichmaybe a register,immediate data or memorylocationwithadestinationoperandwhichmaybe a registeror memorylocation. • It subtractsthe source operandfromthe destinationbutdoesnotstore the result anywhere. • The flags(OF,CF, PF,AF,SF, ZF)are affecteddependingonthe resultof subtraction. • Source and destinationbothcannotbe memorylocations.
  • 7. OperationPerformed:-- • If destination>source thenCF = 0, ZF = 0, SF = 0 • If destination<source thenCF = 1, ZF = 0, SF = 1 • If destination=source thenCF = 0, ZF = 1, SF = 0 Examples:-- 1. CMP AL,0FFH; ComparesAL withFFH 2. CMP AX,BX ; ComparesAX withBX 3. CMP CX,COUNT ; ComparesCXwithmemory variable COUNT 15. NEG ( Negate ) Syntax :-- NEG destination • This instructionreplacesthe numberinthe destinationwiththe 2’scomplementof that number. • For obtainingthe 2’scomplement,itsubtractsthe contentsof destinationfromzero. • The resultisstoredback in the destinationwhichmaybe a registerora memory location • If OF =1, it indicatesthatthe operationcouldnotbe completedsuccessfully. • NEG instructionaffectsall conditionalflags. • Examples:-- 1. NEG AL ; 2’s complementof ALbyte. 2. NEG BX ; 2’s complementof BXword. • Logical Instructions – These are the instructions used for basic logic operations such as AND, OR, NOT and XOR. – These are also used for carrying out bit by bit operations such as shift (SHR,SHL) or rotate (ROL,ROR,RCR,RCL). – One more Instruction under this category is TEST instruction. AND (Logical AND) Syntax :-- AND destination, source • This instruction is used to bit by bit AND the contents of source to the destination. • The result is stored in the destination. • The source operand can be a immediate, a register or a memory location. • The destination can be a register or a memory location, but not an immediate data. • Both operands cannot be immediate data or memory location. • Flags affected : OF = 0 ,CF = 0 , AF is undefined. • And other flags (SF, ZF, PF) are affected based on the AND operation. • Operation Performed :-- • Destination  Destination AND source • Examples :-- 1. AND BH,CL ;AND byte in CL with Byte in BH, result in BH. 2. AND BX,00FFH ;AND word in BX with immediate data 00ffH 3. AND [5000H], DX ;AND word in DX with a word in memory with offset 5000 in DS. • Numeric Example If AX = 3F0F, After Instruction, AND AX,9078H ; AX  AX AND 0008H ;AX  3F0F AND 0008 3F0F  0011 1111 0000 1111 AND 9078  1001 0000 0111 1000 ------------------------------------- = 0001 0000 0000 1000 1008H in AX register OR (Logical OR)
  • 8. Syntax :-- OR destination, source • This instruction is used to bit by bit OR the contents of source to the destination. • The result is stored in the destination. • The source operand can be a immediate, a register or a memory location. • The destination can be a register or a memory location, but not an immediate data. • Both operands cannot be immediate data or memory location. • Flags affected : OF = 0 ,CF = 0 , AF is undefined. • And other flags (SF, ZF, PF) are affected based on the OR operation. Operation Performed :-- Destination  Destination OR source • Examples :-- 1. OR BH,CL ;OR byte in CL with Byte in BH, result in BH. 2. OR BX,00FFH ;OR word in BX with immediate data 00ffH 3. OR [5000H], DX ; OR word in DX with a word in memory with offset 5000 in DS. Numeric Example If AX = 3F0F, After Instruction, OR AX,9078H ; AX  AX OR 9078H ;AX  3F0F OR 9078 3F0F  0011 1111 0000 1111 OR 9078  1001 0000 0111 1000 ------------------------------------- = 1011 1111 0111 1111 BF7FH in AX register XOR (Logical XOR) Syntax :-- XOR destination, source • This instruction is used to bit by bit XOR the contents of source to the destination. • The result is stored in the destination. • The source operand can be a immediate, a register or a memory location. • The destination can be a register or a memory location, but not an immediate data. • Both operands cannot be immediate data or memory location. • Flags affected : OF = 0 ,CF = 0 , AF is undefined. • And other flags (SF, ZF, PF) are affected based on the XOR operation. Operation Performed :-- Destination  Destination XOR source • Examples :-- 1. XOR BH,CL ;XOR byte in CL with Byte in BH, result in BH. 2. XOR BX,00FFH ;XOR word in BX with immediate data 00ffH 3. XOR [5000H], DX ; XOR word in DX with a word in memory with offset 5000 in DS. Numeric Example If AX = 3F0F, After Instruction, XOR AX,9078H ; AX  AX XOR 0008H ;AX  3F0F XOR 0008 3F0F  0011 1111 0000 1111 XOR 9078  1001 0000 0111 1000 ------------------------------------- = 1010 1111 0111 0111 AF77H in AX register NOT (Logical Invert )
  • 9. Syntax :-- NOT destination • This instruction complements (inverts) each bit of the byte or word stored in the destination. • The result is stored in the destination. • The destination can be a register or a memory location. • No Flags affected Operation Performed :-- • Destination  NOT Destination • Examples :-- 1. NOT BH ;Complement byte in BH, result in BH. 2. NOT BX ; Complement word in BX, result in BX. 3. NOT BYTE PTR [5000H] ; Complement byte in memory with offset 5000 in DS. Numeric Example If AX = 3F0F, After Instruction, NOT AX ; AX  NOT AX ;AX  NOT 3F0F 3F0F  0011 1111 0000 1111 Complement ------------------------------------- = 1100 0000 1111 0000 C0F0H in AX register TEST (Logical compare ) Syntax :-- TEST destination, source • This instruction is used to bit by bit AND the contents of source to the destination. • The result is not stored in the destination. • The source operand can be a immediate, a register or a memory location. • The destination can be a register or a memory location, but not an immediate data. • Both operands cannot be immediate data or memory location. • Flags affected : OF = 0 ,CF = 0 , SF, ZF, PF. • TEST instruction is used to set flags before a conditional jump instruction Operation Performed :-- • Flags  set result of Destination AND source • Examples :-- 1. TEST BH,CL ;AND byte in CL with Byte in BH, no result but flags are affected. 2. TEST BX,00FFH ;AND word in BX with immediate data 00ffH, no result but flags are affected. 3. TEST DX, [5000H] ;AND word in DX with a word in memory with offset 5000 in DS, no result but flags are affected. SHL / SAL (Shift Logical/Arithmetic Left) Syntax :-- SHL/SAL destination, count • SHL & SAL are the opcodes for the same operation • This instruction shifts the destination bit by bit to the left and insert zeroes in the newly introduced least significant bits. • The shift operation is through carry. • The count can be either 1 or specified by CL register. • The destination can be a byte or a word in register or a memory location, but not an immediate data.
  • 10. • Flags affected : OF ,CF, SF, ZF, PF. • These instructions can be used to multiply an unsigned number by power of 2. Operation Performed :-- CF  MSB LSB  0 Example :-- If CF = 0, BX = E6D3H After SAL BX, 1 ; Shift the contents of BX register by one towards left BX = CDA6 Example :-- Use of SHL instruction for Multiplication:- If CF = 0, BH = 04H MOV CL, 03 ; Load CL register for the count SHL BH, CL ; Shift the contents of BX register by one towards left BH = 20H (32D) [ 04 * 23 = 32 D] Note :-- SHL can be used to multiply a number with powers of 2. BH = 20H with CF = 0 SAR (Shift Arithmetic Right ) Syntax :-- SAR destination, count
  • 11. • This instruction shifts the destination bit by bit to the right and MSB position is kept in the old MSB position • The shift operation is through carry, LSB is shifted to CF. • The count can be either 1 or specified by CL register. • The destination can be a byte or a word in register or a memory location, but not an immediate data. • Flags affected : OF ,CF, SF, ZF, PF. • This instruction can be used to divide an unsigned number by power of 2. Operation Performed :-- MSB LSB  CF Example1 :-- If CF = 0, BX = E6D3H After SAR BX, 1 ; Shift the contents of BX register by one towards right BX = F369H with CF =1 Example2 :-- • Use of SAR instruction for Division:- If CF = 0, BH = 14H MOV CL, 02 ; Load CL register for the count SAR BH, CL ; Shift the contents of BX register by one towards right BH = 05H (20D) [ 20 / 22 = 05D] BH = 05H with CF = 0
  • 12. Note :-- SAR can be used to divide a number with powers of 2 and get the quotient. SHR (Shift Logical Right) Syntax :-- SHR destination, count • This instruction shifts the destination bit by bit to the right and insert zeroes in the newly introduced most significant bits. • The shift operation is through carry. • The count can be either 1 or specified by CL register. • The destination can be a byte or a word in register or a memory location, but not an immediate data. • Flags affected : OF ,CF, SF, ZF, PF. Operation Performed :-- 0  MSB LSB  CF Example :-- If CF = 0, BX = E6D3H After SHR BX, 1 ; Shift the contents of BX register by one towards right BX = 7369H ROR (Rotate Right without Carry) Syntax :-- ROR destination, count • This instruction rotates the destination bit by bit to the right excluding the carry • The bit moved out of LSB is rotated around into the MSB and also copied to CF. • The count can be either 1 or specified by CL register. • The destination can be a byte or a word in register or a memory location, but not an immediate data. • Flags affected : OF ,CF Operation Performed :-- MSB LSB  CF
  • 13. Example 1:-- If CF = 0, BX = E6D3H After ROR BX, 1 ; Rotate the contents of BX register by one towards right BX = F369H Example2 :-- If CF = 0, BH = 54H MOV CL, 02 ; Load CL register for the count ROR BH, CL ; Rotate the contents of BH register by twice towards right BH = 15H with CF = 0 Uses of ROR instruction:-- • This instruction can be used to swap the nibbles in a byte or to swap the bytes in a word. MOV CL,04H ROR AL, CL • It can also be used to rotate the bit into CF which can be checked later for a conditional jump. (JC or JNC) ROL (Rotate Left without Carry) Syntax :-- ROL destination, count • This instruction rotates the destination bit by bit to the left excluding the carry • The bit moved out of MSB is rotated around into the LSB and also copied to CF. • The count can be either 1 or specified by CL register.
  • 14. • The destination can be a byte or a word in register or a memory location, but not an immediate data. • Flags affected : OF ,CF Operation Performed :-- CF MSB LSB Example1 :-- If CF = 0, BX = E6D3H After ROL BX, 1 ; Rotate the contents of BX register by one towards left BX = CDA7H Example2 :-- If CF = 0, BH = 54H MOV CL, 02 ; Load CL register for the count ROL BH, CL ; Rotate the contents of BH register by twice towards Left BH = 51H with CF = 1 Uses of ROL instruction:-- • This instruction can be used to swap the nibbles in a byte or to swap the bytes in a word. MOV CL,04H ROL AL, CL • It can also be used to rotate the bit into CF which can be checked later for a conditional jump. (JC or JNC)
  • 15. RCR (Rotate Right withCarry) Syntax :-- RCR destination, count • This instruction rotates the destination bit by bit to the right including the carry • The bit moved out of LSB is rotated into CF and the bit in CF is rotated into the MSB. • The count can be either 1 or specified by CL register. • The destination can be a byte or a word in register or a memory location, but not an immediate data. • Flags affected : OF ,CF Operation Performed :-- MSB LSB  CF Example1 :-- If CF = 0, BX = E6D3H After RCR BX, 1 ; Rotate the contents of BX register by one towards right through carry Example2 :-- If CF = 0, BH = 54H MOV CL, 02 ; Load CL register for the count RCR BH, CL ; Rotate the contents of BH register by twice towards right through carry BH = 15H with CF = 0
  • 16. RCL (Rotate Left withCarry) Syntax :-- RCL destination, count • This instruction rotates the destination bit by bit to the left including the carry • The bit moved out of MSB is rotated into CF and the bit in CF is rotated into the LSB. • The count can be either 1 or specified by CL register. • The destination can be a byte or a word in register or a memory location, but not an immediate data. • Flags affected : OF ,CF Operation Performed :-- – CF MSB LSB Example :-- If CF = 0, BX = E6D3H After RCL BX, 1 ; Rotate the contents of BX register by one towards left through carry BX = CDA6H Example :-- If CF = 0, BH = 54H MOV CL, 02 ; Load CL register for the count RCL BH, CL ; Rotate the contents of BH register by twice towards Left through carry