SlideShare a Scribd company logo
Logical Instructions
–These are the instructions used for basic
logic operations such as AND, OR, NOT and
XOR.
–These are also used for carrying out bit by
bit operations such as shift (SHR,SHL) or
rotate (ROL,ROR,RCR,RCL).
– One more Instruction under this category is
TEST instruction.
AND (Logical AND)
Syntax :-- AND destination, source
• This instruction is used to bit by bit AND the
contents of source to the destination.
•The result is stored in the destination.
•The source operand can be a immediate, a
register or a memory location.
•The destination can be a register or a memory
location, but not an immediate data.
•Both operands cannot be immediate data or
memory location.
•Flags affected : OF = 0 ,CF = 0 , AF is undefined.
• And other flags (SF, ZF, PF) are affected based on
the AND operation.
• Operation Performed :--
• Destination  Destination AND source
• Examples :--
1. AND BH,CL ;AND byte in CL with Byte in BH,
result in BH.
2. AND BX,00FFH ;AND word in BX with immediate
data 00ffH
3. AND [5000H], DX ;AND word in DX with a
word in memory with offset
5000 in DS.
AND (Logical AND) contd..
Numeric Example
If AX = 3F0F,
After Instruction,
AND AX,9078H ; AX  AX AND 0008H
;AX  3F0F AND 0008
3F0F  0011 1111 0000 1111
AND
9078  1001 0000 0111 1000
-------------------------------------
= 0001 0000 0000 1000
1008H in AX register
OR (Logical OR)
Syntax :-- OR destination, source
• This instruction is used to bit by bit OR the
contents of source to the destination.
•The result is stored in the destination.
•The source operand can be a immediate, a
register or a memory location.
•The destination can be a register or a memory
location, but not an immediate data.
•Both operands cannot be immediate data or
memory location.
•Flags affected : OF = 0 ,CF = 0 , AF is undefined.
• And other flags (SF, ZF, PF) are affected based on
the OR operation.
• Operation Performed :--
• Destination  Destination OR source
• Examples :--
1. OR BH,CL ;OR byte in CL with Byte in BH,
result in BH.
2. OR BX,00FFH ;OR word in BX with immediate
data 00ffH
3. OR [5000H], DX ; OR word in DX with a
word in memory with offset
5000 in DS.
OR (Logical OR) contd..
Numeric Example
If AX = 3F0F,
After Instruction,
OR AX,9078H ; AX  AX OR 9078H
;AX  3F0F OR 9078
3F0F  0011 1111 0000 1111
OR
9078  1001 0000 0111 1000
-------------------------------------
= 1011 1111 0111 1111
BF7FH in AX register
XOR (Logical XOR)
Syntax :-- XOR destination, source
• This instruction is used to bit by bit XOR the
contents of source to the destination.
•The result is stored in the destination.
•The source operand can be a immediate, a
register or a memory location.
•The destination can be a register or a memory
location, but not an immediate data.
•Both operands cannot be immediate data or
memory location.
•Flags affected : OF = 0 ,CF = 0 , AF is undefined.
• And other flags (SF, ZF, PF) are affected based on
the XOR operation.
• Operation Performed :--
• Destination  Destination XOR source
• Examples :--
1. XOR BH,CL ;XOR byte in CL with Byte in BH,
result in BH.
2. XOR BX,00FFH ;XOR word in BX with immediate
data 00ffH
3. XOR [5000H], DX ; XOR word in DX with a
word in memory with offset
5000 in DS.
XOR (Logical XOR) contd..
Numeric Example
If AX = 3F0F,
After Instruction,
XOR AX,9078H ; AX  AX XOR 0008H
;AX  3F0F XOR 0008
3F0F  0011 1111 0000 1111
XOR
9078  1001 0000 0111 1000
-------------------------------------
= 1010 1111 0111 0111
AF77H in AX register
NOT (Logical Invert )
Syntax :-- NOT destination
• This instruction complements (inverts) each
bit of the byte or word stored in the
destination.
•The result is stored in the destination.
•The destination can be a register or a memory
location.
•No Flags affected
• Operation Performed :--
• Destination  NOT Destination
• Examples :--
1. NOT BH ;Complement byte in BH, result in BH.
2. NOT BX ; Complement word in BX, result in BX.
3. NOT BYTE PTR [5000H] ; Complement byte
in memory with offset 5000 in DS.
NOT (Logical Invert ) contd..
Numeric Example
If AX = 3F0F,
After Instruction,
NOT AX ; AX  NOT AX
;AX  NOT 3F0F
3F0F  0011 1111 0000 1111
Complement
-------------------------------------
= 1100 0000 1111 0000
C0F0H in AX register
TEST (Logical compare )
Syntax :-- TEST destination, source
• This instruction is used to bit by bit AND the
contents of source to the destination.
•The result is not stored in the destination.
•The source operand can be a immediate, a
register or a memory location.
•The destination can be a register or a memory
location, but not an immediate data.
•Both operands cannot be immediate data or
memory location.
•Flags affected : OF = 0 ,CF = 0 , SF, ZF, PF.
•TEST instruction is used to set flags before a
conditional jump instruction
• Operation Performed :--
– Flags  set result of Destination AND source
• Examples :--
1. TEST BH,CL ;AND byte in CL with Byte in BH,
no result but flags are affected.
2. TEST BX,00FFH ;AND word in BX with immediate
data 00ffH, no result but flags are
affected.
3. TEST DX, [5000H];AND word in DX with a word in
memory with offset 5000 in DS,
no result but flags are affected.
TEST (Logical Compare) contd..
SHL / SAL (Shift Logical/Arithmetic Left)
Syntax :-- SHL/SAL destination, count
• SHL & SAL are the opcodes for the same
operation
•This instruction shifts the destination bit by bit to
the left and insert zeroes in the newly introduced
least significant bits.
•The shift operation is through carry.
•The count can be either 1 or specified by CL
register.
•The destination can be a byte or a word in
register or a memory location, but not an
immediate data.
•Flags affected : OF ,CF, SF, ZF, PF.
•These instructions can be used to multiply an
unsigned number by power of 2.
CF BX
0
0
1
CF BX
• Operation Performed :--
–CF  MSB ------------------ LSB  0
• Example :--
– If CF = 0, BX = E6D3H
– After SAL BX, 1 ; Shift the contents of BX
register by one towards left
SHL / SAL (Shift Logical/Arithmetic Left)Cntd..
1 1 1 0 0 1 1 0 1 1 0 1 0 0 1 1
1 1 0 0 1 1 0 1 1 0 1 0 0 1 1 0
BX = CDA6
• Example :--
• Use of SHL instruction for Multiplication:-
– If CF = 0, BH = 04H
– MOV CL, 03 ; Load CL register for
the count
– SHL BH, CL ; Shift the contents
of BX register by one
towards left
– BH = 20H (32D) [ 04 * 23 = 32 D]
– Note :-- SHL can be used to multiply a number
with powers of 2.
SHL / SAL (Shift Logical/Arithmetic Left)Cntd..
0 0 0 1 0 0 0 0
CF BH
0
0
0
0
0
0
0
SHL / SAL (Shift Logical/Arithmetic Left)Cntd..
BH = 20H with CF = 0
0 0 0 0 0 1 0 0
0 0 0 0 1 0 0 0
0 0 1 0 0 0 0 0
SAR (Shift Arithmetic Right )
Syntax :-- SAR destination, count
• This instruction shifts the destination bit by bit to
the right and MSB position is kept in the old MSB
position
•The shift operation is through carry, LSB is shifted
to CF.
•The count can be either 1 or specified by CL
register.
•The destination can be a byte or a word in
register or a memory location, but not an
immediate data.
•Flags affected : OF ,CF, SF, ZF, PF.
•This instruction can be used to divide an unsigned
number by power of 2.
BX CF
0
1
BX CF
1 1 1 1 0 0 1 1 0 1 1 0 1 0 0 1
• Operation Performed :--
– MSB ----------------- LSB  CF
• Example :--
– If CF = 0, BX = E6D3H
– After SAR BX, 1 ; Shift the contents of BX
register by one towards right
SAR (Shift Arithmetic Right)Cntd..
1 1 1 0 0 1 1 0 1 1 0 1 0 0 1 1
BX = F369H
• Example :--
• Use of SAR instruction for Division:-
– If CF = 0, BH = 14H
– MOV CL, 02 ; Load CL register for the
count
– SAR BH, CL ; Shift the contents
of BX register by one
towards right
– BH = 05H (20D) [ 20 / 22 = 5D]
– Note :-- SAR can be used to divide a number with
powers of 2 and get the quotient.
SAR (Shift Arithmetic Right )Cntd..
0 0 0 0 0 1 0 1
BH CF
0
0
0
SAR (Shift Arithmetic Right)Cntd..
BH = 05H with CF = 0
0 0 0 1 0 1 0 0
0 0 0 0 1 0 1 0
SHR (Shift Logical Right)
Syntax :-- SHR destination, count
•This instruction shifts the destination bit by
bit to the right and insert zeroes in the newly
introduced most significant bits.
•The shift operation is through carry.
•The count can be either 1 or specified by CL
register.
•The destination can be a byte or a word in
register or a memory location, but not an
immediate data.
•Flags affected : OF ,CF, SF, ZF, PF.
1 1 1 1 0 0 1 1 0 1 1 0 1 0 0 1
BX CF
0
0
1
BX CF
• Operation Performed :--
–0  MSB ------------------ LSB  CF
• Example :--
– If CF = 0, BX = E6D3H
– After SHR BX, 1 ; Shift the contents of BX
register by one towards right
SHR (Shift Logical Right)Cntd..
1 1 1 0 0 1 1 0 1 1 0 1 0 0 1 1
BX = F369H

More Related Content

What's hot

Logical instructions (and, or, xor, not, test)
Logical instructions (and, or, xor, not, test)Logical instructions (and, or, xor, not, test)
Logical instructions (and, or, xor, not, test)
Irfan Anjum
 
Notes all instructions
Notes all instructionsNotes all instructions
Notes all instructions
HarshitParkar6677
 
Instruction set of 8086
Instruction set of 8086Instruction set of 8086
Instruction set of 8086
Vijay Kumar
 
Instruction set of 8086
Instruction set of 8086Instruction set of 8086
Instruction set of 8086aviban
 
Notes arithmetic instructions
Notes arithmetic instructionsNotes arithmetic instructions
Notes arithmetic instructions
HarshitParkar6677
 
8086 instruction set
8086 instruction set8086 instruction set
8086 instruction setjemimajerome
 
Instruction Set of 8086 Microprocessor
Instruction Set of 8086 MicroprocessorInstruction Set of 8086 Microprocessor
Instruction Set of 8086 Microprocessor
Ashita Agrawal
 
Instruction set of 8086
Instruction set of 8086Instruction set of 8086
Instruction set of 8086
Akhila Rahul
 
8086-instruction-set-ppt
 8086-instruction-set-ppt 8086-instruction-set-ppt
8086-instruction-set-pptjemimajerome
 
8086 instruction set
8086 instruction set8086 instruction set
8086 instruction set
Alamin Hossain Miraje
 
Instruction sets of 8086
Instruction sets of 8086Instruction sets of 8086
Instruction sets of 8086
Mahalakshmiv11
 
8086 instructions
8086 instructions8086 instructions
8086 instructions
Ravi Anand
 
Unit iii mca 1st year
Unit iii mca 1st yearUnit iii mca 1st year
Unit iii mca 1st year
akuladananjaya
 
Arithmetic instrctions
Arithmetic instrctionsArithmetic instrctions
Arithmetic instrctions
HarshitParkar6677
 
Instruction set-of-8085
Instruction set-of-8085Instruction set-of-8085
Instruction set-of-8085saleForce
 
Instruction set of 8085 Microprocessor By Er. Swapnil Kaware
Instruction set of 8085 Microprocessor By Er. Swapnil KawareInstruction set of 8085 Microprocessor By Er. Swapnil Kaware
Instruction set of 8085 Microprocessor By Er. Swapnil KawareProf. Swapnil V. Kaware
 
Instructionset8085
Instructionset8085Instructionset8085
Instructionset8085Fawad Pathan
 
Instruction set
Instruction setInstruction set
Instruction set
Mayank Bhatt
 
itft-Instruction set-of-8085
itft-Instruction set-of-8085itft-Instruction set-of-8085
itft-Instruction set-of-8085Shifali Sharma
 

What's hot (19)

Logical instructions (and, or, xor, not, test)
Logical instructions (and, or, xor, not, test)Logical instructions (and, or, xor, not, test)
Logical instructions (and, or, xor, not, test)
 
Notes all instructions
Notes all instructionsNotes all instructions
Notes all instructions
 
Instruction set of 8086
Instruction set of 8086Instruction set of 8086
Instruction set of 8086
 
Instruction set of 8086
Instruction set of 8086Instruction set of 8086
Instruction set of 8086
 
Notes arithmetic instructions
Notes arithmetic instructionsNotes arithmetic instructions
Notes arithmetic instructions
 
8086 instruction set
8086 instruction set8086 instruction set
8086 instruction set
 
Instruction Set of 8086 Microprocessor
Instruction Set of 8086 MicroprocessorInstruction Set of 8086 Microprocessor
Instruction Set of 8086 Microprocessor
 
Instruction set of 8086
Instruction set of 8086Instruction set of 8086
Instruction set of 8086
 
8086-instruction-set-ppt
 8086-instruction-set-ppt 8086-instruction-set-ppt
8086-instruction-set-ppt
 
8086 instruction set
8086 instruction set8086 instruction set
8086 instruction set
 
Instruction sets of 8086
Instruction sets of 8086Instruction sets of 8086
Instruction sets of 8086
 
8086 instructions
8086 instructions8086 instructions
8086 instructions
 
Unit iii mca 1st year
Unit iii mca 1st yearUnit iii mca 1st year
Unit iii mca 1st year
 
Arithmetic instrctions
Arithmetic instrctionsArithmetic instrctions
Arithmetic instrctions
 
Instruction set-of-8085
Instruction set-of-8085Instruction set-of-8085
Instruction set-of-8085
 
Instruction set of 8085 Microprocessor By Er. Swapnil Kaware
Instruction set of 8085 Microprocessor By Er. Swapnil KawareInstruction set of 8085 Microprocessor By Er. Swapnil Kaware
Instruction set of 8085 Microprocessor By Er. Swapnil Kaware
 
Instructionset8085
Instructionset8085Instructionset8085
Instructionset8085
 
Instruction set
Instruction setInstruction set
Instruction set
 
itft-Instruction set-of-8085
itft-Instruction set-of-8085itft-Instruction set-of-8085
itft-Instruction set-of-8085
 

Similar to Copy of 8086inst logical

Chapter3 8086inst logical 2
Chapter3 8086inst logical 2Chapter3 8086inst logical 2
Chapter3 8086inst logical 2
HarshitParkar6677
 
Microprocessor.pptx
Microprocessor.pptxMicroprocessor.pptx
Microprocessor.pptx
NishatNishu5
 
8086 Instruction set
8086 Instruction set8086 Instruction set
8086 Instruction set
karthiga selvaraju
 
Logical, Shift, and Rotate Instruction
Logical, Shift, and Rotate InstructionLogical, Shift, and Rotate Instruction
Logical, Shift, and Rotate Instruction
Badrul Alam
 
Addressing mode of 80286 microprocessor
Addressing mode of 80286 microprocessorAddressing mode of 80286 microprocessor
Addressing mode of 80286 microprocessor
pal bhumit
 
Assembly Language Programming By Ytha Yu, Charles Marut Chap 7 (Logic, Shift,...
Assembly Language Programming By Ytha Yu, Charles Marut Chap 7 (Logic, Shift,...Assembly Language Programming By Ytha Yu, Charles Marut Chap 7 (Logic, Shift,...
Assembly Language Programming By Ytha Yu, Charles Marut Chap 7 (Logic, Shift,...
Bilal Amjad
 
Chap3 8086 artithmetic
Chap3 8086 artithmeticChap3 8086 artithmetic
Chap3 8086 artithmetic
HarshitParkar6677
 
Chapter 3 8086 ins2 math
Chapter 3 8086 ins2 mathChapter 3 8086 ins2 math
Chapter 3 8086 ins2 math
HarshitParkar6677
 
8086 ins2 math
8086 ins2 math8086 ins2 math
8086 ins2 math
HarshitParkar6677
 
Addressing modes
Addressing modesAddressing modes
Addressing modes
rajukarki1599
 
instruction-set-of-8086-mr-binu-joy3.ppt
instruction-set-of-8086-mr-binu-joy3.pptinstruction-set-of-8086-mr-binu-joy3.ppt
instruction-set-of-8086-mr-binu-joy3.ppt
ssuser2b759d
 
Addressing modes of 8086
Addressing modes of 8086Addressing modes of 8086
Addressing modes of 8086
saurav kumar
 
Types of instructions
Types of instructionsTypes of instructions
Types of instructions
ihsanjamil
 
[ASM]Lab7
[ASM]Lab7[ASM]Lab7
[ASM]Lab7
Nora Youssef
 
Addressing modes of 8086
Addressing modes of 8086Addressing modes of 8086
Addressing modes of 8086
Dr. AISHWARYA N
 
8086 instruction set (with simulator)
8086 instruction set (with simulator)8086 instruction set (with simulator)
8086 instruction set (with simulator)
Aswini Dharmaraj
 
Mastering Assembly Language: Programming with 8086
Mastering Assembly Language: Programming with 8086Mastering Assembly Language: Programming with 8086
Mastering Assembly Language: Programming with 8086
sravanithonta79
 
Microprocessor
MicroprocessorMicroprocessor
Microprocessor
adnanqayum
 
Logic, shift and rotate instruction
Logic, shift and rotate instructionLogic, shift and rotate instruction
Logic, shift and rotate instruction
kashif Shafqat
 
mm_1.pdf
mm_1.pdfmm_1.pdf
mm_1.pdf
Isim monastir
 

Similar to Copy of 8086inst logical (20)

Chapter3 8086inst logical 2
Chapter3 8086inst logical 2Chapter3 8086inst logical 2
Chapter3 8086inst logical 2
 
Microprocessor.pptx
Microprocessor.pptxMicroprocessor.pptx
Microprocessor.pptx
 
8086 Instruction set
8086 Instruction set8086 Instruction set
8086 Instruction set
 
Logical, Shift, and Rotate Instruction
Logical, Shift, and Rotate InstructionLogical, Shift, and Rotate Instruction
Logical, Shift, and Rotate Instruction
 
Addressing mode of 80286 microprocessor
Addressing mode of 80286 microprocessorAddressing mode of 80286 microprocessor
Addressing mode of 80286 microprocessor
 
Assembly Language Programming By Ytha Yu, Charles Marut Chap 7 (Logic, Shift,...
Assembly Language Programming By Ytha Yu, Charles Marut Chap 7 (Logic, Shift,...Assembly Language Programming By Ytha Yu, Charles Marut Chap 7 (Logic, Shift,...
Assembly Language Programming By Ytha Yu, Charles Marut Chap 7 (Logic, Shift,...
 
Chap3 8086 artithmetic
Chap3 8086 artithmeticChap3 8086 artithmetic
Chap3 8086 artithmetic
 
Chapter 3 8086 ins2 math
Chapter 3 8086 ins2 mathChapter 3 8086 ins2 math
Chapter 3 8086 ins2 math
 
8086 ins2 math
8086 ins2 math8086 ins2 math
8086 ins2 math
 
Addressing modes
Addressing modesAddressing modes
Addressing modes
 
instruction-set-of-8086-mr-binu-joy3.ppt
instruction-set-of-8086-mr-binu-joy3.pptinstruction-set-of-8086-mr-binu-joy3.ppt
instruction-set-of-8086-mr-binu-joy3.ppt
 
Addressing modes of 8086
Addressing modes of 8086Addressing modes of 8086
Addressing modes of 8086
 
Types of instructions
Types of instructionsTypes of instructions
Types of instructions
 
[ASM]Lab7
[ASM]Lab7[ASM]Lab7
[ASM]Lab7
 
Addressing modes of 8086
Addressing modes of 8086Addressing modes of 8086
Addressing modes of 8086
 
8086 instruction set (with simulator)
8086 instruction set (with simulator)8086 instruction set (with simulator)
8086 instruction set (with simulator)
 
Mastering Assembly Language: Programming with 8086
Mastering Assembly Language: Programming with 8086Mastering Assembly Language: Programming with 8086
Mastering Assembly Language: Programming with 8086
 
Microprocessor
MicroprocessorMicroprocessor
Microprocessor
 
Logic, shift and rotate instruction
Logic, shift and rotate instructionLogic, shift and rotate instruction
Logic, shift and rotate instruction
 
mm_1.pdf
mm_1.pdfmm_1.pdf
mm_1.pdf
 

More from HarshitParkar6677

Wi fi hacking
Wi fi hackingWi fi hacking
Wi fi hacking
HarshitParkar6677
 
D dos attack
D dos attackD dos attack
D dos attack
HarshitParkar6677
 
Notes chapter 6
Notes chapter  6Notes chapter  6
Notes chapter 6
HarshitParkar6677
 
Interface notes
Interface notesInterface notes
Interface notes
HarshitParkar6677
 
Chapter6 2
Chapter6 2Chapter6 2
Chapter6 2
HarshitParkar6677
 
Chapter6
Chapter6Chapter6
8086 cpu 1
8086 cpu 18086 cpu 1
8086 cpu 1
HarshitParkar6677
 
Chapter 6 notes
Chapter 6 notesChapter 6 notes
Chapter 6 notes
HarshitParkar6677
 
Chapter 5 notes
Chapter 5 notesChapter 5 notes
Chapter 5 notes
HarshitParkar6677
 
Chap6 procedures & macros
Chap6 procedures & macrosChap6 procedures & macros
Chap6 procedures & macros
HarshitParkar6677
 
Chapter 5 notes new
Chapter 5 notes newChapter 5 notes new
Chapter 5 notes new
HarshitParkar6677
 
Notes aaa aa
Notes aaa aaNotes aaa aa
Notes aaa aa
HarshitParkar6677
 
Notes 8086 instruction format
Notes 8086 instruction formatNotes 8086 instruction format
Notes 8086 instruction format
HarshitParkar6677
 
Misc
MiscMisc
Copy of 8086inst logical
Copy of 8086inst logicalCopy of 8086inst logical
Copy of 8086inst logical
HarshitParkar6677
 
Chapter3 program flow control instructions
Chapter3 program flow control instructionsChapter3 program flow control instructions
Chapter3 program flow control instructions
HarshitParkar6677
 
Chapter3 8086inst stringsl
Chapter3 8086inst stringslChapter3 8086inst stringsl
Chapter3 8086inst stringsl
HarshitParkar6677
 
Chap3 program flow control instructions
Chap3 program flow control instructionsChap3 program flow control instructions
Chap3 program flow control instructions
HarshitParkar6677
 
Chap3 8086 data transfer
Chap3 8086 data transferChap3 8086 data transfer
Chap3 8086 data transfer
HarshitParkar6677
 
Chap 8086 string
Chap 8086 stringChap 8086 string
Chap 8086 string
HarshitParkar6677
 

More from HarshitParkar6677 (20)

Wi fi hacking
Wi fi hackingWi fi hacking
Wi fi hacking
 
D dos attack
D dos attackD dos attack
D dos attack
 
Notes chapter 6
Notes chapter  6Notes chapter  6
Notes chapter 6
 
Interface notes
Interface notesInterface notes
Interface notes
 
Chapter6 2
Chapter6 2Chapter6 2
Chapter6 2
 
Chapter6
Chapter6Chapter6
Chapter6
 
8086 cpu 1
8086 cpu 18086 cpu 1
8086 cpu 1
 
Chapter 6 notes
Chapter 6 notesChapter 6 notes
Chapter 6 notes
 
Chapter 5 notes
Chapter 5 notesChapter 5 notes
Chapter 5 notes
 
Chap6 procedures & macros
Chap6 procedures & macrosChap6 procedures & macros
Chap6 procedures & macros
 
Chapter 5 notes new
Chapter 5 notes newChapter 5 notes new
Chapter 5 notes new
 
Notes aaa aa
Notes aaa aaNotes aaa aa
Notes aaa aa
 
Notes 8086 instruction format
Notes 8086 instruction formatNotes 8086 instruction format
Notes 8086 instruction format
 
Misc
MiscMisc
Misc
 
Copy of 8086inst logical
Copy of 8086inst logicalCopy of 8086inst logical
Copy of 8086inst logical
 
Chapter3 program flow control instructions
Chapter3 program flow control instructionsChapter3 program flow control instructions
Chapter3 program flow control instructions
 
Chapter3 8086inst stringsl
Chapter3 8086inst stringslChapter3 8086inst stringsl
Chapter3 8086inst stringsl
 
Chap3 program flow control instructions
Chap3 program flow control instructionsChap3 program flow control instructions
Chap3 program flow control instructions
 
Chap3 8086 data transfer
Chap3 8086 data transferChap3 8086 data transfer
Chap3 8086 data transfer
 
Chap 8086 string
Chap 8086 stringChap 8086 string
Chap 8086 string
 

Recently uploaded

Sachpazis:Terzaghi Bearing Capacity Estimation in simple terms with Calculati...
Sachpazis:Terzaghi Bearing Capacity Estimation in simple terms with Calculati...Sachpazis:Terzaghi Bearing Capacity Estimation in simple terms with Calculati...
Sachpazis:Terzaghi Bearing Capacity Estimation in simple terms with Calculati...
Dr.Costas Sachpazis
 
H.Seo, ICLR 2024, MLILAB, KAIST AI.pdf
H.Seo,  ICLR 2024, MLILAB,  KAIST AI.pdfH.Seo,  ICLR 2024, MLILAB,  KAIST AI.pdf
H.Seo, ICLR 2024, MLILAB, KAIST AI.pdf
MLILAB
 
Architectural Portfolio Sean Lockwood
Architectural Portfolio Sean LockwoodArchitectural Portfolio Sean Lockwood
Architectural Portfolio Sean Lockwood
seandesed
 
Water Industry Process Automation and Control Monthly - May 2024.pdf
Water Industry Process Automation and Control Monthly - May 2024.pdfWater Industry Process Automation and Control Monthly - May 2024.pdf
Water Industry Process Automation and Control Monthly - May 2024.pdf
Water Industry Process Automation & Control
 
addressing modes in computer architecture
addressing modes  in computer architectureaddressing modes  in computer architecture
addressing modes in computer architecture
ShahidSultan24
 
Quality defects in TMT Bars, Possible causes and Potential Solutions.
Quality defects in TMT Bars, Possible causes and Potential Solutions.Quality defects in TMT Bars, Possible causes and Potential Solutions.
Quality defects in TMT Bars, Possible causes and Potential Solutions.
PrashantGoswami42
 
Pile Foundation by Venkatesh Taduvai (Sub Geotechnical Engineering II)-conver...
Pile Foundation by Venkatesh Taduvai (Sub Geotechnical Engineering II)-conver...Pile Foundation by Venkatesh Taduvai (Sub Geotechnical Engineering II)-conver...
Pile Foundation by Venkatesh Taduvai (Sub Geotechnical Engineering II)-conver...
AJAYKUMARPUND1
 
Railway Signalling Principles Edition 3.pdf
Railway Signalling Principles Edition 3.pdfRailway Signalling Principles Edition 3.pdf
Railway Signalling Principles Edition 3.pdf
TeeVichai
 
DESIGN A COTTON SEED SEPARATION MACHINE.docx
DESIGN A COTTON SEED SEPARATION MACHINE.docxDESIGN A COTTON SEED SEPARATION MACHINE.docx
DESIGN A COTTON SEED SEPARATION MACHINE.docx
FluxPrime1
 
COLLEGE BUS MANAGEMENT SYSTEM PROJECT REPORT.pdf
COLLEGE BUS MANAGEMENT SYSTEM PROJECT REPORT.pdfCOLLEGE BUS MANAGEMENT SYSTEM PROJECT REPORT.pdf
COLLEGE BUS MANAGEMENT SYSTEM PROJECT REPORT.pdf
Kamal Acharya
 
LIGA(E)11111111111111111111111111111111111111111.ppt
LIGA(E)11111111111111111111111111111111111111111.pptLIGA(E)11111111111111111111111111111111111111111.ppt
LIGA(E)11111111111111111111111111111111111111111.ppt
ssuser9bd3ba
 
Student information management system project report ii.pdf
Student information management system project report ii.pdfStudent information management system project report ii.pdf
Student information management system project report ii.pdf
Kamal Acharya
 
Final project report on grocery store management system..pdf
Final project report on grocery store management system..pdfFinal project report on grocery store management system..pdf
Final project report on grocery store management system..pdf
Kamal Acharya
 
The role of big data in decision making.
The role of big data in decision making.The role of big data in decision making.
The role of big data in decision making.
ankuprajapati0525
 
WATER CRISIS and its solutions-pptx 1234
WATER CRISIS and its solutions-pptx 1234WATER CRISIS and its solutions-pptx 1234
WATER CRISIS and its solutions-pptx 1234
AafreenAbuthahir2
 
road safety engineering r s e unit 3.pdf
road safety engineering  r s e unit 3.pdfroad safety engineering  r s e unit 3.pdf
road safety engineering r s e unit 3.pdf
VENKATESHvenky89705
 
MCQ Soil mechanics questions (Soil shear strength).pdf
MCQ Soil mechanics questions (Soil shear strength).pdfMCQ Soil mechanics questions (Soil shear strength).pdf
MCQ Soil mechanics questions (Soil shear strength).pdf
Osamah Alsalih
 
Design and Analysis of Algorithms-DP,Backtracking,Graphs,B&B
Design and Analysis of Algorithms-DP,Backtracking,Graphs,B&BDesign and Analysis of Algorithms-DP,Backtracking,Graphs,B&B
Design and Analysis of Algorithms-DP,Backtracking,Graphs,B&B
Sreedhar Chowdam
 
CFD Simulation of By-pass Flow in a HRSG module by R&R Consult.pptx
CFD Simulation of By-pass Flow in a HRSG module by R&R Consult.pptxCFD Simulation of By-pass Flow in a HRSG module by R&R Consult.pptx
CFD Simulation of By-pass Flow in a HRSG module by R&R Consult.pptx
R&R Consult
 
Immunizing Image Classifiers Against Localized Adversary Attacks
Immunizing Image Classifiers Against Localized Adversary AttacksImmunizing Image Classifiers Against Localized Adversary Attacks
Immunizing Image Classifiers Against Localized Adversary Attacks
gerogepatton
 

Recently uploaded (20)

Sachpazis:Terzaghi Bearing Capacity Estimation in simple terms with Calculati...
Sachpazis:Terzaghi Bearing Capacity Estimation in simple terms with Calculati...Sachpazis:Terzaghi Bearing Capacity Estimation in simple terms with Calculati...
Sachpazis:Terzaghi Bearing Capacity Estimation in simple terms with Calculati...
 
H.Seo, ICLR 2024, MLILAB, KAIST AI.pdf
H.Seo,  ICLR 2024, MLILAB,  KAIST AI.pdfH.Seo,  ICLR 2024, MLILAB,  KAIST AI.pdf
H.Seo, ICLR 2024, MLILAB, KAIST AI.pdf
 
Architectural Portfolio Sean Lockwood
Architectural Portfolio Sean LockwoodArchitectural Portfolio Sean Lockwood
Architectural Portfolio Sean Lockwood
 
Water Industry Process Automation and Control Monthly - May 2024.pdf
Water Industry Process Automation and Control Monthly - May 2024.pdfWater Industry Process Automation and Control Monthly - May 2024.pdf
Water Industry Process Automation and Control Monthly - May 2024.pdf
 
addressing modes in computer architecture
addressing modes  in computer architectureaddressing modes  in computer architecture
addressing modes in computer architecture
 
Quality defects in TMT Bars, Possible causes and Potential Solutions.
Quality defects in TMT Bars, Possible causes and Potential Solutions.Quality defects in TMT Bars, Possible causes and Potential Solutions.
Quality defects in TMT Bars, Possible causes and Potential Solutions.
 
Pile Foundation by Venkatesh Taduvai (Sub Geotechnical Engineering II)-conver...
Pile Foundation by Venkatesh Taduvai (Sub Geotechnical Engineering II)-conver...Pile Foundation by Venkatesh Taduvai (Sub Geotechnical Engineering II)-conver...
Pile Foundation by Venkatesh Taduvai (Sub Geotechnical Engineering II)-conver...
 
Railway Signalling Principles Edition 3.pdf
Railway Signalling Principles Edition 3.pdfRailway Signalling Principles Edition 3.pdf
Railway Signalling Principles Edition 3.pdf
 
DESIGN A COTTON SEED SEPARATION MACHINE.docx
DESIGN A COTTON SEED SEPARATION MACHINE.docxDESIGN A COTTON SEED SEPARATION MACHINE.docx
DESIGN A COTTON SEED SEPARATION MACHINE.docx
 
COLLEGE BUS MANAGEMENT SYSTEM PROJECT REPORT.pdf
COLLEGE BUS MANAGEMENT SYSTEM PROJECT REPORT.pdfCOLLEGE BUS MANAGEMENT SYSTEM PROJECT REPORT.pdf
COLLEGE BUS MANAGEMENT SYSTEM PROJECT REPORT.pdf
 
LIGA(E)11111111111111111111111111111111111111111.ppt
LIGA(E)11111111111111111111111111111111111111111.pptLIGA(E)11111111111111111111111111111111111111111.ppt
LIGA(E)11111111111111111111111111111111111111111.ppt
 
Student information management system project report ii.pdf
Student information management system project report ii.pdfStudent information management system project report ii.pdf
Student information management system project report ii.pdf
 
Final project report on grocery store management system..pdf
Final project report on grocery store management system..pdfFinal project report on grocery store management system..pdf
Final project report on grocery store management system..pdf
 
The role of big data in decision making.
The role of big data in decision making.The role of big data in decision making.
The role of big data in decision making.
 
WATER CRISIS and its solutions-pptx 1234
WATER CRISIS and its solutions-pptx 1234WATER CRISIS and its solutions-pptx 1234
WATER CRISIS and its solutions-pptx 1234
 
road safety engineering r s e unit 3.pdf
road safety engineering  r s e unit 3.pdfroad safety engineering  r s e unit 3.pdf
road safety engineering r s e unit 3.pdf
 
MCQ Soil mechanics questions (Soil shear strength).pdf
MCQ Soil mechanics questions (Soil shear strength).pdfMCQ Soil mechanics questions (Soil shear strength).pdf
MCQ Soil mechanics questions (Soil shear strength).pdf
 
Design and Analysis of Algorithms-DP,Backtracking,Graphs,B&B
Design and Analysis of Algorithms-DP,Backtracking,Graphs,B&BDesign and Analysis of Algorithms-DP,Backtracking,Graphs,B&B
Design and Analysis of Algorithms-DP,Backtracking,Graphs,B&B
 
CFD Simulation of By-pass Flow in a HRSG module by R&R Consult.pptx
CFD Simulation of By-pass Flow in a HRSG module by R&R Consult.pptxCFD Simulation of By-pass Flow in a HRSG module by R&R Consult.pptx
CFD Simulation of By-pass Flow in a HRSG module by R&R Consult.pptx
 
Immunizing Image Classifiers Against Localized Adversary Attacks
Immunizing Image Classifiers Against Localized Adversary AttacksImmunizing Image Classifiers Against Localized Adversary Attacks
Immunizing Image Classifiers Against Localized Adversary Attacks
 

Copy of 8086inst logical

  • 1. Logical Instructions –These are the instructions used for basic logic operations such as AND, OR, NOT and XOR. –These are also used for carrying out bit by bit operations such as shift (SHR,SHL) or rotate (ROL,ROR,RCR,RCL). – One more Instruction under this category is TEST instruction.
  • 2. AND (Logical AND) Syntax :-- AND destination, source • This instruction is used to bit by bit AND the contents of source to the destination. •The result is stored in the destination. •The source operand can be a immediate, a register or a memory location. •The destination can be a register or a memory location, but not an immediate data. •Both operands cannot be immediate data or memory location. •Flags affected : OF = 0 ,CF = 0 , AF is undefined. • And other flags (SF, ZF, PF) are affected based on the AND operation.
  • 3. • Operation Performed :-- • Destination  Destination AND source • Examples :-- 1. AND BH,CL ;AND byte in CL with Byte in BH, result in BH. 2. AND BX,00FFH ;AND word in BX with immediate data 00ffH 3. AND [5000H], DX ;AND word in DX with a word in memory with offset 5000 in DS. AND (Logical AND) contd..
  • 4. Numeric Example If AX = 3F0F, After Instruction, AND AX,9078H ; AX  AX AND 0008H ;AX  3F0F AND 0008 3F0F  0011 1111 0000 1111 AND 9078  1001 0000 0111 1000 ------------------------------------- = 0001 0000 0000 1000 1008H in AX register
  • 5. OR (Logical OR) Syntax :-- OR destination, source • This instruction is used to bit by bit OR the contents of source to the destination. •The result is stored in the destination. •The source operand can be a immediate, a register or a memory location. •The destination can be a register or a memory location, but not an immediate data. •Both operands cannot be immediate data or memory location. •Flags affected : OF = 0 ,CF = 0 , AF is undefined. • And other flags (SF, ZF, PF) are affected based on the OR operation.
  • 6. • Operation Performed :-- • Destination  Destination OR source • Examples :-- 1. OR BH,CL ;OR byte in CL with Byte in BH, result in BH. 2. OR BX,00FFH ;OR word in BX with immediate data 00ffH 3. OR [5000H], DX ; OR word in DX with a word in memory with offset 5000 in DS. OR (Logical OR) contd..
  • 7. Numeric Example If AX = 3F0F, After Instruction, OR AX,9078H ; AX  AX OR 9078H ;AX  3F0F OR 9078 3F0F  0011 1111 0000 1111 OR 9078  1001 0000 0111 1000 ------------------------------------- = 1011 1111 0111 1111 BF7FH in AX register
  • 8. XOR (Logical XOR) Syntax :-- XOR destination, source • This instruction is used to bit by bit XOR the contents of source to the destination. •The result is stored in the destination. •The source operand can be a immediate, a register or a memory location. •The destination can be a register or a memory location, but not an immediate data. •Both operands cannot be immediate data or memory location. •Flags affected : OF = 0 ,CF = 0 , AF is undefined. • And other flags (SF, ZF, PF) are affected based on the XOR operation.
  • 9. • Operation Performed :-- • Destination  Destination XOR source • Examples :-- 1. XOR BH,CL ;XOR byte in CL with Byte in BH, result in BH. 2. XOR BX,00FFH ;XOR word in BX with immediate data 00ffH 3. XOR [5000H], DX ; XOR word in DX with a word in memory with offset 5000 in DS. XOR (Logical XOR) contd..
  • 10. Numeric Example If AX = 3F0F, After Instruction, XOR AX,9078H ; AX  AX XOR 0008H ;AX  3F0F XOR 0008 3F0F  0011 1111 0000 1111 XOR 9078  1001 0000 0111 1000 ------------------------------------- = 1010 1111 0111 0111 AF77H in AX register
  • 11. NOT (Logical Invert ) Syntax :-- NOT destination • This instruction complements (inverts) each bit of the byte or word stored in the destination. •The result is stored in the destination. •The destination can be a register or a memory location. •No Flags affected
  • 12. • Operation Performed :-- • Destination  NOT Destination • Examples :-- 1. NOT BH ;Complement byte in BH, result in BH. 2. NOT BX ; Complement word in BX, result in BX. 3. NOT BYTE PTR [5000H] ; Complement byte in memory with offset 5000 in DS. NOT (Logical Invert ) contd..
  • 13. Numeric Example If AX = 3F0F, After Instruction, NOT AX ; AX  NOT AX ;AX  NOT 3F0F 3F0F  0011 1111 0000 1111 Complement ------------------------------------- = 1100 0000 1111 0000 C0F0H in AX register
  • 14. TEST (Logical compare ) Syntax :-- TEST destination, source • This instruction is used to bit by bit AND the contents of source to the destination. •The result is not stored in the destination. •The source operand can be a immediate, a register or a memory location. •The destination can be a register or a memory location, but not an immediate data. •Both operands cannot be immediate data or memory location. •Flags affected : OF = 0 ,CF = 0 , SF, ZF, PF. •TEST instruction is used to set flags before a conditional jump instruction
  • 15. • Operation Performed :-- – Flags  set result of Destination AND source • Examples :-- 1. TEST BH,CL ;AND byte in CL with Byte in BH, no result but flags are affected. 2. TEST BX,00FFH ;AND word in BX with immediate data 00ffH, no result but flags are affected. 3. TEST DX, [5000H];AND word in DX with a word in memory with offset 5000 in DS, no result but flags are affected. TEST (Logical Compare) contd..
  • 16. SHL / SAL (Shift Logical/Arithmetic Left) Syntax :-- SHL/SAL destination, count • SHL & SAL are the opcodes for the same operation •This instruction shifts the destination bit by bit to the left and insert zeroes in the newly introduced least significant bits. •The shift operation is through carry. •The count can be either 1 or specified by CL register. •The destination can be a byte or a word in register or a memory location, but not an immediate data. •Flags affected : OF ,CF, SF, ZF, PF. •These instructions can be used to multiply an unsigned number by power of 2.
  • 17. CF BX 0 0 1 CF BX • Operation Performed :-- –CF  MSB ------------------ LSB  0 • Example :-- – If CF = 0, BX = E6D3H – After SAL BX, 1 ; Shift the contents of BX register by one towards left SHL / SAL (Shift Logical/Arithmetic Left)Cntd.. 1 1 1 0 0 1 1 0 1 1 0 1 0 0 1 1 1 1 0 0 1 1 0 1 1 0 1 0 0 1 1 0 BX = CDA6
  • 18. • Example :-- • Use of SHL instruction for Multiplication:- – If CF = 0, BH = 04H – MOV CL, 03 ; Load CL register for the count – SHL BH, CL ; Shift the contents of BX register by one towards left – BH = 20H (32D) [ 04 * 23 = 32 D] – Note :-- SHL can be used to multiply a number with powers of 2. SHL / SAL (Shift Logical/Arithmetic Left)Cntd..
  • 19. 0 0 0 1 0 0 0 0 CF BH 0 0 0 0 0 0 0 SHL / SAL (Shift Logical/Arithmetic Left)Cntd.. BH = 20H with CF = 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0
  • 20. SAR (Shift Arithmetic Right ) Syntax :-- SAR destination, count • This instruction shifts the destination bit by bit to the right and MSB position is kept in the old MSB position •The shift operation is through carry, LSB is shifted to CF. •The count can be either 1 or specified by CL register. •The destination can be a byte or a word in register or a memory location, but not an immediate data. •Flags affected : OF ,CF, SF, ZF, PF. •This instruction can be used to divide an unsigned number by power of 2.
  • 21. BX CF 0 1 BX CF 1 1 1 1 0 0 1 1 0 1 1 0 1 0 0 1 • Operation Performed :-- – MSB ----------------- LSB  CF • Example :-- – If CF = 0, BX = E6D3H – After SAR BX, 1 ; Shift the contents of BX register by one towards right SAR (Shift Arithmetic Right)Cntd.. 1 1 1 0 0 1 1 0 1 1 0 1 0 0 1 1 BX = F369H
  • 22. • Example :-- • Use of SAR instruction for Division:- – If CF = 0, BH = 14H – MOV CL, 02 ; Load CL register for the count – SAR BH, CL ; Shift the contents of BX register by one towards right – BH = 05H (20D) [ 20 / 22 = 5D] – Note :-- SAR can be used to divide a number with powers of 2 and get the quotient. SAR (Shift Arithmetic Right )Cntd..
  • 23. 0 0 0 0 0 1 0 1 BH CF 0 0 0 SAR (Shift Arithmetic Right)Cntd.. BH = 05H with CF = 0 0 0 0 1 0 1 0 0 0 0 0 0 1 0 1 0
  • 24. SHR (Shift Logical Right) Syntax :-- SHR destination, count •This instruction shifts the destination bit by bit to the right and insert zeroes in the newly introduced most significant bits. •The shift operation is through carry. •The count can be either 1 or specified by CL register. •The destination can be a byte or a word in register or a memory location, but not an immediate data. •Flags affected : OF ,CF, SF, ZF, PF.
  • 25. 1 1 1 1 0 0 1 1 0 1 1 0 1 0 0 1 BX CF 0 0 1 BX CF • Operation Performed :-- –0  MSB ------------------ LSB  CF • Example :-- – If CF = 0, BX = E6D3H – After SHR BX, 1 ; Shift the contents of BX register by one towards right SHR (Shift Logical Right)Cntd.. 1 1 1 0 0 1 1 0 1 1 0 1 0 0 1 1 BX = F369H