This document provides a summary of Layne David Orr's professional experience and qualifications. It outlines his educational background which includes a Master of Science in Electrical Engineering and Management from Santa Clara University. It also details his 25+ years of experience in the semiconductor industry, specializing in ATE and circuit design. His career history includes engineering leadership roles at companies such as Apple, Silvaco, and LTX-Credence where he managed teams, developed test programs, and provided technical support.

1. Layne David Orr
468 West Encinas Street, Gilbert, AZ 85233 • (480)861-9670 • Layne_Orr@hotmail.com
Professional
Summary
Highly motivated leader and electrical engineer specializing in ATE and circuit design for the semiconductor industry.
Proven ability to learn, apply newly acquired knowledge, and lead all aspects of new product developments that spur
business growth with minimum supervision. A team player who can quickly adapt and solve problems in dynamic
environments, contribute expertise as appropriate, provide technical guidance, and meet scheduled deadlines within budget.
Education
• MSEE; Engineering Management post-graduate study; Santa Clara University, Santa Clara, CA
Technical: DSP, FPGA, RF, Digital Communications, Analog, VLSI • Management: Leadership, Technical Marketing, New
Product Development, Manufacturing • STS: Ethics, Intellectual Property, Emerging Technologies; summa cum laude.
12/12-
6/15
• MSEM; Science, Technology, and Society (STS) Minor; Santa Clara University, Santa Clara, CA
Management: Systems Engineering, Technical Product Development, Project Management • Technical: Applied
Mathematics, Electronics, Control Systems • STS: Culture, Gender, Engineering’s societal relationships; summa cum laude.
8/10-
12/12
• B.S. Applied Physics; Mathematics Minor; Idaho State University, Pocatello, ID
Electronic Systems, Mathematics, Semiconductor Devices; summa cum laude.
9/85-
5/90
Technical Skills
Operating Systems • MS Windows, Linux, Unix
Software • MS Office, MS Project, Visio, MATLAB, Simulink, C, C++
IC Design and
Embedded Systems Tools
• Mentor Graphics: Design Architect IC Studio, Pyxis; Xilinx: Vivado, System Generator; Silvaco: Expert,
SmartSpice, SmartSpiceRF, Gateway; Texas Instruments: Code Composer Studio, TMS320C5505 eZdsp USB
Development System ; Linear Technology: LTSpice;
ATE and Languages • LTX-Credence: Fusion, X-series, Diamond, DiamondX, enVision, Unison
Career History & Accomplishments
Apple, Incorporated; Cupertino, CA
Engineering Program Manager (Touch & Sensor Hardware Technology Group)
• Develop budgets, schedules, resources and plans for new product development of touch & sense modules.
• Manage multiple vendors in Asia-Pacific region to produce and ship hardware modules throughout supply chain.
• Coordinate and execute daily status meetings with development engineers and senior management.
• Develop risk management strategies to coordinate new product development in large-scale volume environments.
11/15-
Present
Silvaco, Incorporated; Santa Clara, CA
Technical Intern EDA Simulation Group
• Verification, validation, and testing for Expert, SmartSpice, SmartSpiceRF, and Gateway EDA design tools.
• Develop ad-hoc test cases, provide applications support and debug customer-reported issues.
• Design and implement characterization and analysis examples for CLA 4-bit Adder with Manchester Carry Chain (0.18um),
Colpitts Oscillator, and Audio Power Amplifier.
• Verify and validate PDK demo kits (analog, digital, and RF) for Gateway, Expert, Guardian and Hipex EDA design tools.
• Software package and license manager installation, verification and validation.
6/15-
10/15
Santa Clara University; Santa Clara, CA
Lead Teaching Assistant
• Teach, instruct, and grade undergraduate courses in Electrical Engineering (Electric Circuits I, Electric Circuits II) and
General Engineering (Engineering Projects in the Community). Lead assigned EE TA staff for 3 sections.
• Develop Passive and Active filter designs (AP, LP, BP, HP) including frequency response and transient analysis solutions in
MATLAB and LTSpice.
• Develop Wheatstone Bridge, Optimal Power Delivery, Op-Amp, and RLC lab solutions using National Instruments’
ELVIS-II hardware.
• Develop lecture materials and solutions for all weekly labs and projects to support a typical class size of 18 students.
6/14-
6/15
LTX-Credence Corporation; Phoenix, AZ; Milpitas, CA
Cumulative Summary
Lead and manage permanent and project-assigned staff, chief, principal and senior engineers. Design, develop, integrate, debug, and
sustain test plans, hardware and programs for verification, validation, and characterization of new instruments, software, and feature
enhancements. Support Marketing and Engineering to establish and review new product requirements. Design, develop, integrate, debug,
and sustain Unison and enVision C++ test methods. Provide pre- and post- sales applications support to Engineering, Marketing, Sales,
Field Applications and Customers using Diamond-X, Diamond, X-series, Fusion HF/HFi, Delta 50/STE/100, and Trillium ATE test
systems.

2. Manager, Engineering Applications
• Lead and manage 4 staff, chief, principal and senior engineers.
• Lead, manage, develop and resource test plans and schedules for Unison development and deployment on Diamond-X,
Diamond, and X-series test systems.
• Design and develop load board fixtures to support Unison test plans on the Diamond-X, Diamond, and X-series test
systems.
1/14-
6/14;
7/10-
2/12
Principal, Engineering Applications
• Design and develop load board fixtures and Unison test program concepts to support Concurrent Test on the Diamond-X
test system.
• Design and develop test programs in Unison to verify Static and Dynamic Idd performance on all VI instrumentation for
the X-series test system.
• Design and develop test programs in Unison to verify DPIN96 digital performance in the Diamond-X test system.
2/12-
1/14
Principal, Systems Engineer
• Lead, manage and train project-assigned staff, chief, principal and senior engineers to deploy Unison software on the
Diamond test system.
• Co-design and develop Unison software test strategy for applications-based unit tests.
7/09-
7/10
Principal, Applications Engineering
• Lead and manage project-assigned staff, chief, principal and senior engineers to deploy FX2, FX-HS, and FX-HV digital on
the X-series test system with enVision software.
8/05-
7/09
Manager, Technology Applications Engineering
• Lead and manage 11 staff, chief and principal engineers to deploy FX1 digital on the X-series test system with enVision
software.
2/05-
8/05
Principal, Engineering Applications
• Responsible for installation and first-time delivery support for the Fusion HFi with VX4/VX5 digital and X-series test
systems deployed with enVision software to 2 Tier-1 customers.
2/04-
2/05
Manager, Digital Technology Applications Engineering
• Lead and manage 7 staff, chief and principal engineers.
• Responsible for installation and first-time delivery support for the X-series and Fusion HFi test systems deployed with
enVision software to multiple Tier-1 and Tier-2 customers.
3/03-
2/04
Senior, Engineering Applications
• Lead and manage project-assigned staff, chief, principal and senior engineers to deploy VX4 digital on the Fusion HFi test
system with enVision software.
• Projects include new test method design and coding for system/instrument-independent DC testing, Fractional Bus, ZRTD,
continual robustness improvements in run-time error checking, and throughput improvements with code centralization.
• Responsible for installation and first-time delivery applications support for the Fusion HF test systems deployed with
enVision software to 3 Tier-1 and Tier-2 customers.
2/02-
3/03
Supervisor, Applications Engineering
• Lead and manage 14 principal, senior and entry-level engineers.
• Quote new business applications support and orchestrate advanced training seminars.
• Responsible for entire western region, Tier-2 customer application support for the Fusion HF test system.
1/00-
2/02
Senior, Applications Engineering
• Responsible for installation and first-time delivery support for the Delta 50/STE/100 and Fusion HF test systems deployed
with enVision software to 8 Tier-1 customers.
• Projects include application benchmarks securing lucrative business opportunities in the European and North American
FireWire marketplace.
10/94-
1/00
American Microsystems (AMIS); Pocatello, ID
Cumulative Summary
Trillium and Sentry 7/21 test program and hardware development, debug, integration, and production release for gate arrays, and cell-
based custom digital devices used in commercial, industrial, and military applications. Perform component-level maintenance, repair,
calibration and troubleshooting of probers, handlers, and multiple ATE test systems.
Advanced ASIC Test Engineer
• Co-develop CAD-to-Test program generation tools and programs for Trillium and Sentry 7/21 test systems.
• Develop test programs and test methodologies for first-time cell designs.
• Develop product improvement and methodology training for new Test Engineers.
• Failure analysis for design defect and first-silicon developments.
5/93-
10/94
ASIC Test Engineer
• Co-developed quality improvements for test design methodologies resulting in first-silicon throughput growth from 50 to
300 starts using the same number of engineers.
• Develop, integrate, characterize, and release to production test programs and DUT interface hardware (wafer sort and test)
for the Trillium and Sentry 7/21 test systems.
6/90-
5/93

3. Test Maintenance Technician & Group Leader
• Lead and manage 4 test maintenance technicians.
• Calibration, repair, and maintenance of Electroglass probers, MCT, Symtek, Aseco, Delta-Design handlers, and GenRad,
Trillium, Sentry 2/6/7/21, Sentinel, Synchro, LTX-77, Teradyne, Kiethley, Lomax and Macrodata test systems.
5/83-
6/90
High-Reliability Test Technician
• Perform troubleshooting of failures in test hardware, fixture, and test equipment setups using wafer probers, final test
handlers and multiple ATE test systems.
5/82-
5/83
Test Finish Operator
• Operate wafer probers, final test handlers and multiple ATE test systems.
3/82-
5/82
Memberships, Affiliations, Achievements & Special Projects
Lifetime Member, The Physics Honor Society Sigma Pi Sigma • Member, Order of the Engineer since 2012 • Recipient, SCU Graduate Academic
Excellence in Engineering Award for highest G.P.A. in 2013 and 2016 • Co-developed a cataract diagnostic system concept for salaUno (a social
enterprise in Mexico) using cloud storage, solar power, smartphones, a clip-on lens, and scanning technology developed at MIT.