The document discusses methods for estimating interconnect capacitance and resistance in integrated circuits. It notes that interconnect wires have complex three-dimensional shapes and are surrounded by other lines, affecting their capacitance. The document provides that capacitance is estimated using a fringing-field factor that increases with smaller width-to-height ratios and can be 10-20 times larger than parallel-plate capacitance. It also presents a formula to estimate capacitance as a function of width-to-height and thickness-to-height ratios. Resistance is estimated based on the material, dimensions, and number/location of contacts on an interconnect line.

1. Interconnect Capacitance
Estimation
• Each wire is a three dimensional structure with
significant variations of shape, thickness, and
vertical distance from the substrate.
• Surrounded by a number of other lines

2. Interconnect Capacitance
Estimation
6 interconnect lines running on three different
levels

3. The section of a single interconnect

4. • The fringing-field factor FF =Ctotal /Cpp
• Influence of fringing fields increases with the
decreasing (w/h) ratio
• It can be as much as 10-20 times larger than the
parallel-plate capacitance

5. Variation of the fringing-field factor with the interconnect
geometry

6. Estimated Formula

7. Capacitance of a single interconnect, as a function of (w/h) and
(t/h)

8. Interconnect Resistance
Estimation
• The resistance of a line depends on the type of
material used, dimensions, the number and
locations of the contacts on it.

9. PARASITIC RESISTANCE: