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DO YOU STILL REMEMBER
DEFERENCE BETWEEN
SEQUENTIAL CIRCUIT AND
COMBINATION LOGIC
CIRCUIT?
A general block diagram of a sequential circuit
INTRODUCTION TO REGISTER
• FLIP FLOP IS 1 BIT MEMORY CELL
• TO INCREASE THE STORAGE CAPACITY , WE HAVE TO USE A GROUP OF FLIP
FLOP
• THIS FLIP FLOP IS KNOWN OF REGISTER.
• THE N BIT REGISTER CONSIST OF “N” NUMBER OF FLIP FLOP AND CAPABLE OF
STORING “N BIT” WORD.
• ONE FLIP FLOP IS USED TO STORE 1 BIT OF DATA WHILE THE GROUP OF FLIP
FLOP WILL USE TO STORE MORE THAT 1 BIT DATA. FOR EXAMPLE IF WE WANT
TO DESIGN 4 BIT REGISTER , SO WE HAVE TO USED 4 FLIP FLOPS.
EXAMPLE : DESIGN 4 BIT REGISTER
- ONLY FOR STORING THE DATA NOT TOGGLING
D3 D2 D1 D0
Q Q Q Q
CLK
Clock is internally
connected and applied at
same time.
Clock connected to all four
flip flops.
Clock is not generated
individually for every
operation but generated at
same time .
DATA FORMAT AND REGISTER
CLASSIFICATION
•DATA CAN BE ENTERER IN SERIAL OR PARALLEL FORM
•SERIAL – 1 BIT AT A TIME
•PARALLEL -- ALL BITS AT A TIME ( MULTIPLE BITS)
FF3
FF2 FF1 FF0
FF3 FF2 FF1 FF0
Register
Serial
D
1011
D
1 0 1 1
Serial method
Output Q
Parallel method
FF3 FF2 FF1 FF0
D0
D3 D2 D1 D0
1 0 1 1
Parallel
Q3 Q2 Q1 Q0
CLASSIFICATION OF REGISTER
• CLASSIFICATION OF REGISTER IS DEPENDING ON:
a) INPUT /OUTPUT
i. SISO ( SERIAL INPUT SERIAL OUTPUT)
ii. SIPO (SERIAL INPUT PARALLEL OUTPUT)
iii. PISO ( PARALLEL INPUT SERIAL INPUT)
iv. PIPO (PARALLEL INPUT PARALLEL OUTPUT)
b) APPLICATION
i. SHIFT REGISTER
ii. STORAGE REGISTER
SISO ( serial input serial output)
FF3 FF2 FF1 FF0
Register
Input
D
1011
Output Q
Serial output
Serial input
SIPO (Serial input Parallel output)
FF3 FF2 FF1 FF0
Register
input
D
1011 Q3 Q2 Q1 Q0
Parallel output
Serial input
PISO ( Parallel input Serial Input)
FF3 FF2 FF1 FF0
D3 D2 D1 D0
1 0 1 1
Parallel input
Output Q
Serial output
PIPO (Parallel input Parallel Output)
FF3 FF2 FF1 FF0
D0
D3 D2 D1 D0
1 0 1 1
Parallel input
Q3 Q2 Q1 Q0
Parallel output
SHIFT REGISTER
APPLICATION 1:
IF YOU WANT DATA TO BE SHIFTED FROM FF3  FF2 FF1 
FF0, THEN PRODUCE OUTPUT Q.
FF3 FF2 FF1 FF0
Register
Input
D
1011
Output Q
Serial output
Serial input
SISO
With each clock pulse, data are shifted to the right one
position, and the rightmost bit is transferred out.
STORAGE REGISTER
• APPLICATION 2:
• IF YOU WANT YOUR DATA JUST TO BE STORE AND THEN USE IT WHEN YOU
NEED IT AND NO SHIFTING OF THAT DATA.
DESCRIBE MEMORY
ORGANISATION
PRACTICE
• EXPLAIN MEMORY ORGANIZATION DEPENDING ON SIZE , SPEED AND PRICE.

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Describe the register

  • 1.
  • 2. DO YOU STILL REMEMBER DEFERENCE BETWEEN SEQUENTIAL CIRCUIT AND COMBINATION LOGIC CIRCUIT?
  • 3. A general block diagram of a sequential circuit
  • 4. INTRODUCTION TO REGISTER • FLIP FLOP IS 1 BIT MEMORY CELL • TO INCREASE THE STORAGE CAPACITY , WE HAVE TO USE A GROUP OF FLIP FLOP • THIS FLIP FLOP IS KNOWN OF REGISTER. • THE N BIT REGISTER CONSIST OF “N” NUMBER OF FLIP FLOP AND CAPABLE OF STORING “N BIT” WORD. • ONE FLIP FLOP IS USED TO STORE 1 BIT OF DATA WHILE THE GROUP OF FLIP FLOP WILL USE TO STORE MORE THAT 1 BIT DATA. FOR EXAMPLE IF WE WANT TO DESIGN 4 BIT REGISTER , SO WE HAVE TO USED 4 FLIP FLOPS.
  • 5. EXAMPLE : DESIGN 4 BIT REGISTER - ONLY FOR STORING THE DATA NOT TOGGLING D3 D2 D1 D0 Q Q Q Q CLK Clock is internally connected and applied at same time. Clock connected to all four flip flops. Clock is not generated individually for every operation but generated at same time .
  • 6. DATA FORMAT AND REGISTER CLASSIFICATION •DATA CAN BE ENTERER IN SERIAL OR PARALLEL FORM •SERIAL – 1 BIT AT A TIME •PARALLEL -- ALL BITS AT A TIME ( MULTIPLE BITS) FF3 FF2 FF1 FF0
  • 7. FF3 FF2 FF1 FF0 Register Serial D 1011 D 1 0 1 1 Serial method Output Q
  • 8. Parallel method FF3 FF2 FF1 FF0 D0 D3 D2 D1 D0 1 0 1 1 Parallel Q3 Q2 Q1 Q0
  • 9. CLASSIFICATION OF REGISTER • CLASSIFICATION OF REGISTER IS DEPENDING ON: a) INPUT /OUTPUT i. SISO ( SERIAL INPUT SERIAL OUTPUT) ii. SIPO (SERIAL INPUT PARALLEL OUTPUT) iii. PISO ( PARALLEL INPUT SERIAL INPUT) iv. PIPO (PARALLEL INPUT PARALLEL OUTPUT) b) APPLICATION i. SHIFT REGISTER ii. STORAGE REGISTER
  • 10. SISO ( serial input serial output) FF3 FF2 FF1 FF0 Register Input D 1011 Output Q Serial output Serial input
  • 11. SIPO (Serial input Parallel output) FF3 FF2 FF1 FF0 Register input D 1011 Q3 Q2 Q1 Q0 Parallel output Serial input
  • 12. PISO ( Parallel input Serial Input) FF3 FF2 FF1 FF0 D3 D2 D1 D0 1 0 1 1 Parallel input Output Q Serial output
  • 13. PIPO (Parallel input Parallel Output) FF3 FF2 FF1 FF0 D0 D3 D2 D1 D0 1 0 1 1 Parallel input Q3 Q2 Q1 Q0 Parallel output
  • 14. SHIFT REGISTER APPLICATION 1: IF YOU WANT DATA TO BE SHIFTED FROM FF3  FF2 FF1  FF0, THEN PRODUCE OUTPUT Q. FF3 FF2 FF1 FF0 Register Input D 1011 Output Q Serial output Serial input
  • 15. SISO With each clock pulse, data are shifted to the right one position, and the rightmost bit is transferred out.
  • 16. STORAGE REGISTER • APPLICATION 2: • IF YOU WANT YOUR DATA JUST TO BE STORE AND THEN USE IT WHEN YOU NEED IT AND NO SHIFTING OF THAT DATA.
  • 18.
  • 19. PRACTICE • EXPLAIN MEMORY ORGANIZATION DEPENDING ON SIZE , SPEED AND PRICE.