Ever since the beginning of the microelectronics era there has been an eternal quest to reduce the characteristic features on the devices: some devices are now in qualification states on the sub 40nm gate oxide range for an scheduled commercial release towards the end of the year, and there are a lot of efforts in the sub 30nm range.

1. Enabling 3D microelectronics platforms: MCMs http://dev.emcelettronica.com/print/51794
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Enabling 3D microelectronics platforms: MCMs
By froa0112
Created 13/05/2008 - 01:20
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The ever decreasing scale in microelectronics
Ever since the beginning of the microelectronics era there has been an eternal quest to reduce the characteristic
features on the devices: some devices are now in qualification states on the sub 40nm gate oxide range for an
scheduled commercial release towards the end of the year, and there are a lot of efforts in the sub 30nm range. But
Moore’s Law, as this continuous drive to reduce sizes has come to be called, applies not only to the dimensions on the
silicon. It spreads down through the whole microelectronic supply chain, into pcb packages, system integration and final
devices.
[1]
A diagram showing integration of different logic components on a device
We are all surrounded by this minimization process: the devices we use, handsets, cell phones, MP3 players, cameras,
radios, etc. all have gone through tremendous transformation in sizes and enhancement in productivity and features in
the course of a few years.
To illustrated this, I’d like this analogy that I extracted from the Intel site [2]: If the transportation industry would have
kept the same pace of development as has the semiconductor industry, today it would cost a few pennies to fly around
the globe, cars would run for years on end with a single thankful of gas and we wouldn’t have to be paying gas at the
prices of today. Food for thought, huh!
Anyway, this article is about one of such strategies that the industry has devised to enable its relentless pursue of
infinitesimally small: quot;Multi Chip Modules or MCMquot;. This is rather a simple concept with very radical consequences. In
the past most components on a typical motherboard had a single function: they were defined as processor or logic,
memory, baseband, RF, etc. The reason for this is differentiation: it's easier to gain and mantain a stable market if you
specialize in that niche application, so you fine tune your organization to acquire core competencies in design and
manufacturing for that particular logic block. Not to mention that to spread in different areas is costly and risky.
By far, this is the approach most foundries and IDMs have chosen to follow. The exception, of course, are those
houses with cash to spare that have integrated functions or building blocks as they are called, that are complementary
to their main business objective and didn't require significant divestures. A typical example would be to include
processing cores and flash memory for a processor unit. This approach is normally known as System in a Chip (SIP).
Some clear advantages are elimination of buss lines and packaging, increase performance and high frequency; a
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2. Enabling 3D microelectronics platforms: MCMs http://dev.emcelettronica.com/print/51794
caveat is longer design cycle times and the obvious issue of lack of flexibility if a new market trend emerges that
requires a change in one component but not in the others; or different combinations that you designed.
[1]
For the rest of the industry it is simply to costly to design a lot of functions in one single piece of silicon. However, no
one has said that more than one singulated building block can be used in each device. That is the trick on MCMs: By
definition, MCM, isn’t really a new semiconductor technology node in the same sense as for example 45nm is, however
it has enabled significant savings in investment, development and deployment costs.
The basic idea is to combine in one single device different functions, which typically have been handled independently
so that the resulting “module” provides a combined solution. Some of the advantages of this focus are:
1. Improvements in performance as there is elimination of bus lines conducting signals back and forth.
2. Rapid design: for many OEMs is just a matter of taking off-the-shelf components (memory, RF, processor) and put
them together in one single package; so this leads to decoupling of new device development from milestone node
technology achievement. This also enables the developer to be a third party away from the predominant model today
that dominated by the IDMs (the ST Micro, Infineon, NXP, Qimonda, Toshiba of the world) and has lead a fables
revolution.
3. Significant cost savings associated with minimal investment in development (aside from design)
4. Quicker development time and time to money.
A picture that clearly brings home the idea of MCMs is this: In a typical 2G cell phone, like the one below, there were
about 440 peripheral devices mounted on a 10 layer PCB.
[3]
Many of these components have been replaced by modules that combine many of the features shown above. Take a
look for example at this 3G UMTS Radio: 86 embedded peripheral components, 36 surface mounted peripheral
components for a grand total of 122 components mounted on a 4 layer PCB.
[4]
There is definitively a lot of space and cost reduction in between these two scenarios. So how are they doing it you
might ask? There is obviously some gains associated with migrating components from higher gate notes into the 90, 65
or 45nm technologies; there is also integration happening inside the chip by using system-in-chip designs. But really
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3. Enabling 3D microelectronics platforms: MCMs http://dev.emcelettronica.com/print/51794
what’s achieving the most significant savings is that many of the packages are now including multiple functions that in
the old days used to be packaged individually.
MCMs are quickly becoming the dominating technology for applications were space is at a premium and you’ll see
them accross the microelectronics landscape: in processors, like in the Intel Centrino Duo, where the duo clearly
stands for two as in the picture below:
[1]
GPUs/Baseband processors: People are becoming more imaginative with assembly and stacking techniques to include
many parts using the same space that was used before: In these pictures you can see clearly the number of chips that
are being stacked (one on top of the other): 4 on the top picture and 3 in the lower picture.
[5]
Obviously, this requires very aggressive design rules, a lot of expertise in electrical design and in manufacturing to deal
with issues like handling multichip parts without impacting quality or reliability there.
The manufacturing aspect of this equation is very challenging: extending the envelopes on certain technologies is
pushing the equipment to achieve ever increasing capability targets and yield sometimes suffer.
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4. Enabling 3D microelectronics platforms: MCMs http://dev.emcelettronica.com/print/51794
In summary, MCMs are here to stay as they provide obvious savings in space and costs that enable cheaper platforms
for highly competitive markets (cellphones, handsets, portable computers). They have also revolutionized the
landscape of the microelectronics industry by enabling design houses to become dominant providers of solutions,
outsorcing all manufacturing aspects to specialized vendors: fab to IDMs, assy and test to OSATs, etc. which has free
them to explore more market opportunities with minimal risk and maximum exposure.
Here are some resources to explore more on these technologies.
http://sst.pennnet.com/Articles/Article_Display.cfm?Section=ARTCL&ARTICLE_ID=224942&dcmp=SSTGlobal_ARCH
[6]
http://www.amkor.com/EnablingTechnologies/3D/index.cfm [7]
http://edageek.com/2007/07/16/imec-3d-sip/ [1]
http://electronicdesign.com/Articles/Index.cfm?ArticleID=11179 [8]
http://arri.uta.edu/micromanufacturing/micropackaging/3D_packaging.html [9]
http://ap.pennnet.com/ [10] http://www.imaps.org/DevicePackaging/3d08.htm [11]
Trademarks
Source URL: http://dev.emcelettronica.com/enabling-3d-microelectronics-platforms-mcms
Links:
[1] http://edageek.com/2007/07/16/imec-3d-sip/
[2] http://www.intel.com
[3] http://www.qualcomm.com/
[4] http://www.broadcom.com
[5] http://www.amkor.com/
[6] http://sst.pennnet.com/Articles/Article_Display.cfm?Section=ARTCL&ARTICLE_ID=224942&dcmp=SSTGlobal_ARCH
[7] http://www.amkor.com/EnablingTechnologies/3D/index.cfm
[8] http://electronicdesign.com/Articles/Index.cfm?ArticleID=11179
[9] http://arri.uta.edu/micromanufacturing/micropackaging/3D_packaging.html
[10] http://ap.pennnet.com/
[11] http://www.imaps.org/DevicePackaging/3d08.htm
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