This document provides an overview of considerations for PCB manufacturing including: - PCB layers, stack-ups, copper weight, material selection, and surface finish which impact cost and performance. - The PCB fabrication process involves creating the substrate, photoresist lamination, laser imaging, development, etching, stripping, inspection, hole drilling, solder mask application, and surface finishing. - Signal integrity is impacted by factors like ringing, crosstalk, EMI, and material properties at high frequencies. Minimizing trace length and maintaining consistent impedance can help reduce these effects.

1. Insights on PCB
manufacturing
Presented by : Vihari Andukuri

2. Agenda
1) PCB Pre-order checklist
2) PCB Fabrication process
3) DFM Guidelines
4) PCB Cost Drivers
5) Insertion loss in PCB

3. PCB Pre – Order checklist
1) PCB Layers
2) PCB Stack-ups
3) Copper weight
4) PCB Material
5) Surface finish
6) Minimum tracing and
spacing
7) Minimum Annular Ring
8) Soldermask & Color

4. PCB Layers
A printed circuit board can have any where between 1 layer to 20 layers depending
upon the application.
Consider the following factors
How will my printed circuit board be used?
What operation frequency is needed?
What is my budget for the project?
TEC 3000 – 6 Layers
UCB Controller – 6 Layers
MR5 – 6 Layers
SnapOn – 4 Layers
SMARC – 10 Layers

5. PCB Stack - up
A general rule is to have Ground planes adjacent to Signal layers, so as to provide a
return path for the currents.
Layers Type
1 Signal
2 Full Gnd Plane
3 Full Pwr Plane
4 Signal
Layers Type
1 Signal
2 Full Gnd Plane
3 Critical Signals
4 Full Gnd Plane
5 Full Pwr Plane
6 Signal
4 Layer Stack up
6 Layer Stack up

6. Copper weight
The Copper in a PCB is rated in ounces (oz). It is the resulting thickness when ‘n’ ounces
of copper is spread evenly over one squarefoot area.
Current
(Amps)
Width for 1 oz(in mils) Width for 2 oz (in mils)
1 10 5
2 30 15
3 50 25
4 80 40
5 110 55
6 150 75
7 180 90
*Source : PCB Design Tutorial by David L. Jones

7. PCB Material
There exists a vast range of substrates to fabricate printed circuit boards. We need to
select the material according to the requirements of our application.
Classification Material Type Df value Data Rate (Gbps)
Standard loss FR4 0.02 < 3.0
Mid loss GETEK 0.01 3.0 – 6.125
Low loss ISOLA 370HR 6.125 – 12.5
Very low loss Megtron 6 0.009 12.5 – 25.0
Ultra low loss Nelco 4000 0.008 25.0 – 56.0
Extreme low loss Rogers 4350B 0.0037 56.0 – 112.0
If the PCB board will operate below 3 GHz, just use FR4!

8. Minimum Tracing and Spacing
V pk-pk Internal Layers External Layer
15 2 mil 4 mil
30 2 mil 4 mil
50 4 mil 24 mil
100 4 mil 24 mil
170 8 mil 50 mil
250 8 mil 50 mil
300 8 mil 50 mil
Current
(Amps)
Width for 1
oz(in mils)
Width for 2 oz
(in mils)
1 10 5
2 30 15
3 50 25
4 80 40
5 110 55
6 150 75
7 180 90
Minimum Track Width Minimum Track Spacing
Johnson Controls recommendations:-
• 8 mil width where possible
• 5 mil spacing where possible

9. Surface Finish
Default selection
The Surface finish is a protection
against the elements.
It is designed to protect soldering
pads and contact pads from
oxidation or becoming
contaminated.

10. PCB Fabrication process
1. Creating the Substrate - Resin stage 2. Photoresist lamination 3. Laser direct imaging
4. Develop, Etch, Strip5. Automated visual inspection

11. PCB Fabrication process
6. Hole drilling 7. Applying solder mask 8. Surface Finish

12. DFM Guidelines - Traces
Always use wide traces. It makes life easier for the PCB House.
As a bonus – Low Resistance!

13. DFM Guidelines – Stack Up
Use Symmetric Stack Up along the Z – axis
It keeps the board from wrapping.

14. DFM Guidelines – Via Configuration
Keep Vias as balanced as possible.
Avoid Via overlap to get good mechanical
strength.

15. DFM Guidelines – Teardrop
Keep Vias as balanced as possible.
Avoid Via overlap to get good mechanical strength.

16. DFM Guidelines – Copper Balancing
Avoid having unbalanced pattern on inner layer.
Otherwise, there is a risk of creating a low pressure
area during lamination.
It is recommended to add dummy copper feature to
facilitate lamination.

17. DFM Guidelines – Hole Size
DHS = FHS + 4mil
If the board needs to be IPC Class 2, then the annular ring
must be at least 4 mil larger than the drilled hole at every
point.
For example, if your hole is 6 mil, then the minimum pad
size for the mechanically drilled hole would be 14 mil.

18. Cost Drivers
1. Material selection
Tier Classification Df Range Example Materials Data Rate (Gbps) Relative Laminate Cost Factor
4 Ultra Low Loss <0.0050 Megtron 7 25.0 – 50.0 4.0 – 8.5
3 Very Low Loss 0.0050 – 0.0099 DS7409DV 12.5 – 25.0 3 – 5
2 Low Loss 0.0100 – 0.0149 Megtron 4 6.125 – 12.5 1.5 – 2
1.5 Mid Loss 0.0150 – 0.020 High Tg FR4 3.0 – 6.125 1.1
1 Standard Loss >0.020 FR4 < 3.0 1

19. Cost Drivers
PCB cost -
2. Board layers
3. Inner copper weight impact
Materials Overhead Labor
1 oz 2 oz 3 oz 4 oz
X 1.3 X 1.8 X 2.1 X
2 layer to 4 layer 4 layer to 6 layer 6 layer to 8 layer
42% 22% 14%
60%25%
15%

20. 4. Inner layer line width & spacing
5. Board thickness and tolerance
6. Min finished hole size
7. Avg Hole density
FHS > 12 mil 12 mil > FHS > 8 mil
0 % 4 %
10 % <8 %
Baseline 4 %
3/3 mil 4/4 mil 5/5 mil
5 % 1 % 0 %
50 holes/sq in 60 holes/sq in 100 holes/sq in
0 % 1 % 5 %
Cost Drivers

21. 8. Surface finishes of PCB
9. Solder mask color
10. Min finished hole size
Solder mask tent over pad Solder mask cap over Via Conductive Via in pad
3 % 5 % 5 %
Green Other colors
Baseline 2 %
Immersion silver Immersion tin HASL ENIG
0 % 2 % 8 % 14 %
Cost Drivers

22. Minimizing Insertion Loss in PCB
To maintain optimum performance for High Speed Signals we must minimize PCB
Insertion Loss.
Distorted output waveform due to delay Distorted output waveform due to attenuation

23. Minimizing Insertion Loss in PCB
Signal Attenuation = Copper Loss + Dielectric Loss
Low Frequency : Copper Loss
High Frequency : Dielectric Loss
Some of the Signal Integrity problems that arise are:
1. Ringing
2. Crosstalk
3. Electromagnetic Interference (EMI)
4. Ground Bounce
5. Reflection

24. Signal Integrity : Ringing The oscillation of a signal in response to a
change, such as switching.
The signal will usually return to its normal
state after some “settling time.” While in
this state, the signal is unreliable and may
propagate to other devices.
Causes
1. For short traces, ringing is caused by parasitic
inductance / capacitance effects.
2. For long traces, it can be caused by impedance
mismatch.
Solution
1. To minimize parasitic capacitance make the
critical traces as narrow as the PCB process can
handle, keep a good distance from nearby traces.
2. Do not have other traces or ground plane
underneath the trace.
3. Use controlled impedances and Series
terminations.

25. Signal Integrity : Crosstalk
Crosstalk is the unintentional
electromagnetic coupling between traces on
a Printed Board.
These signals may cause unexpected
behavior of your devices or
system.
Causes
1. Crosstalk is usually thought of as happening
between two parallel traces running next to each
other on the same layer.
2. Crosstalk can also occur between two parallel
traces running next to each other on adjacent
layers
Solution
1. Keep as large of a difference as possible between
clock routing and other signal routing. The same
gap = 3 times the trace width rule of thumb
works here as well – the 3W rule.
2. Make sure that two signal layers adjacent to
each other in the board stack-up will alternate
horizontal and vertical routing directions.
3. Signals like RESET, INTERRUPT, etc. should be
routed away from busses and high speed signals.

26. Signal Integrity : EMI
The unwanted interference with a
propagating signal by an external radiating
device.
Causes
1. Mixing noisy circuits, such as switching power
converter with digital and sensitive analog
circuits.
2. Poor trace routing which leads to cross-talk.
3. Incorrect layer stack-ups.
4. Locating clock drivers too close to board edges or
near sensitive circuits.
Solution
1. Every signal and power trace (or plane) on a PC
board should be considered a transmission line.
2. Using good board stack-up for improved EMI to
keep the signals and routed power near the
ground reference planes.
3. Partitioning the Analog, Digital and High speed
components.
4. Providing a proper return path for the current.

27. Signal Integrity : PCB Materials
At High Frequencies (> 3 GHz), the material properties of the PCB plays a huge role in
Signal Integrity.
• Material
• Glass Style / Prepreg
• Copper Profile (Surface Roughness)
• Back Drilling
• Surface Finish

28. Signal Integrity : Glass style
As frequency increases and wavelength decreases, dielectric properties
become dependent on the orientation and density of the glass fabric altering
the electrical properties of the transmission line.

29. Signal Integrity : Backdrill
As frequency increases and wavelength decreases, dielectric properties
become dependent on the orientation and density of the glass fabric altering
the electrical properties of the transmission line.

30. To Conclude …
Trace width – As wide as possible
Trace length – As short as possible
Df – As low as possible
Copper Thickness – 1 oz is sufficient (Width>>Thickness)
Copper Profile – As smooth as possible