The document discusses the precise analysis of various configurations of active inductors using PMOS and NMOS transistors, highlighting the consistent results obtained in both directions. It emphasizes the boosting factor and the impact of load poles in cascading stages, with a focus on high-frequency applications. Additionally, it notes the insertion loss of 2-4 dB that must be equalized by the continuous time linear equalizer (CTLE).

1. Pmos,inductorCTLE pole zero
precise analysis

2. Different configurations of active
inductor with just nmos and pmos
Looking in both directions yields same
results !!!!!!!!
Look at a and b

3. Boosting factor : 1+gmRs/2

4. Effect of load pole
Issue with cascading stages
Wp/wz is only 2 or 3
Effect of load pole

5. Effect of inductor

6. A 16 Gbps 10:1 Serializer with Active Inductor Based CTLE for High Frequency Boosting
CTLE being used in driver

7. Give an example of ss corner

9. Also, insertion loss to ctle itself is 2-4db which ctle has to equalize