16. Layout of vco • 4,1,3,2 are drawn and capacitively matched
• 8 wires are present vertically
• Pmos small is on the left and nmos (larger) on the right
• All vgnd and vssa connections are symmetric
• Sufficient distance so that wires can run vertically
• Capacitively matched until ac caps
17. Big cap layout • No clock signals on it
• Reference signals ok
• Strong grid
• Have to meet density rules
• Star connection to all important cells
• Ldi/dt not an issue since difference for delay
cells
• What about loop filter capacitor node ?
18. One more arrangement of ring oscillator
Our ring oscillator looked better
Effect of ground bounce