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COMPUTER ORGANIZATION
& ASSEMBLY LANGUAGE
LECTURE # 1 WEEK 11 THEORY
BY MUHAMMAD JAFER
1
MEMORY
• 1946 Burks,
Goldstine, and Von
Neuman
• Random Access Vs
Sequential Access
• solid-state
semiconductor
material
• access type,
capacity, cycle time,
latency, bandwidth,
and cost
2
MEMORY PARAMETERS
• Access type
• action that physically takes place during a read or write
operation
• Capacity
• measured in bytes
• Cycle time
• the time elapsed from the start of a read operation to the
start of a subsequent read
• Latency
• the time interval between the request for information and
the access to the first bit of that information
• Bandwidth
• number of bits per second
• Cost
• dollars per megabytes
3
LOCALITY OF REFERENCE
• Move Information from slower to fast Memory
• Spatial locality
• Temporal locality
• Sequence of events that takes place when the
processor makes a request for an item
• Hit Ratio H
• Miss Ratio 1-H
4
CACHE MEMORY
• 1965 Wilks
• Conventional Memory & Slave Memory
• Cache Hit Ratio Hc
• Cache Miss Ration 1-Hc
• Block of Memory
• Memory interleaving
5
CACHE MEMORY ASPECTS
• Impact of Temporal Locality
• Impact of Spatial Locality
• Impact of Combined Temporal and Spatial Locality
6
CACHE-MAPING FUNCTION
• Memory Management Unit (MMU)
7
CACHE-MEMORY ORGANIZATION
• Three Main Organization
• Difference
• The criterion used to place, in the cache, an
incoming block from the main memory.
• The criterion used to replace a cache block by
an incoming block (on cache full).
8
DIRECT MAPING
• Simples of three
• The placement is done based on a fixed relation
between the incoming block number, i, the cache
block number, j, and the number of cache blocks, N
• j = i mod N
• Many to One Mapping Technique
9
MMU INTERPRET DIRECT MAPING
10
MMU INTERPRET DIRECT MAPING
11
MMU INTERPRET DIRECT MAPING
12
CHAPTER REVIEW
• Fundamentals of Computer Organization and
Architecture by Mostafa Abd-Al-Barr & Hesham
AlRewini
• Chapter # 6
• Basic Concepts
• Cache Memory
13

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Coal 15 memory in Assembly Programming

  • 1. COMPUTER ORGANIZATION & ASSEMBLY LANGUAGE LECTURE # 1 WEEK 11 THEORY BY MUHAMMAD JAFER 1
  • 2. MEMORY • 1946 Burks, Goldstine, and Von Neuman • Random Access Vs Sequential Access • solid-state semiconductor material • access type, capacity, cycle time, latency, bandwidth, and cost 2
  • 3. MEMORY PARAMETERS • Access type • action that physically takes place during a read or write operation • Capacity • measured in bytes • Cycle time • the time elapsed from the start of a read operation to the start of a subsequent read • Latency • the time interval between the request for information and the access to the first bit of that information • Bandwidth • number of bits per second • Cost • dollars per megabytes 3
  • 4. LOCALITY OF REFERENCE • Move Information from slower to fast Memory • Spatial locality • Temporal locality • Sequence of events that takes place when the processor makes a request for an item • Hit Ratio H • Miss Ratio 1-H 4
  • 5. CACHE MEMORY • 1965 Wilks • Conventional Memory & Slave Memory • Cache Hit Ratio Hc • Cache Miss Ration 1-Hc • Block of Memory • Memory interleaving 5
  • 6. CACHE MEMORY ASPECTS • Impact of Temporal Locality • Impact of Spatial Locality • Impact of Combined Temporal and Spatial Locality 6
  • 7. CACHE-MAPING FUNCTION • Memory Management Unit (MMU) 7
  • 8. CACHE-MEMORY ORGANIZATION • Three Main Organization • Difference • The criterion used to place, in the cache, an incoming block from the main memory. • The criterion used to replace a cache block by an incoming block (on cache full). 8
  • 9. DIRECT MAPING • Simples of three • The placement is done based on a fixed relation between the incoming block number, i, the cache block number, j, and the number of cache blocks, N • j = i mod N • Many to One Mapping Technique 9
  • 10. MMU INTERPRET DIRECT MAPING 10
  • 11. MMU INTERPRET DIRECT MAPING 11
  • 12. MMU INTERPRET DIRECT MAPING 12
  • 13. CHAPTER REVIEW • Fundamentals of Computer Organization and Architecture by Mostafa Abd-Al-Barr & Hesham AlRewini • Chapter # 6 • Basic Concepts • Cache Memory 13