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Buck converter
- 1. BUCK CONVERTER SUBSYSTEM BY: TROYSTAHLEY 1
- 2. OBJECTIVE • To efficientlyreduce DC voltage by also reducing the ripples in the waveforms so have a smooth output DC voltage. • Efficiently apply a current sensor or a current sensing technique to measure the current for the inductor. 2
- 3. SUBSYSTEM OF BUCK(STEP DOWN) CONVERTER • Circuit Configuration • Simulink Circuit Schematic • Circuit Components • Design Equations • Current Waveforms • Finding the slopes to get ∆𝑖 𝐿 • Current Sensing Technique • Simplified and Advanced Techniques 3
- 4. SIMULINK CIRCUIT CONFIGURATION •Regular Buck Converter Simulink Simulation with Measurements: • Currents: iL and Iout • Voltage: Vout • Adjustable Voltage, Step-down from 12V to 5V • Insertion of low-pass filter to remove switching harmonics and pass only dc component 4
- 5. CIRCUIT COMPONENTS • IRF540N-Channel power MOSFET • Max Voltages: • VDS=100V • VGS=±20V • Max power dissipation • PD=150W • TC4428 gate driver IC • Low impedances in ON & OFF states • MOSPEC S10A60 Schottky Diode • Blocks the conduction of the voltage gate source MOSFET Gate Driver Schottky Diode 5
- 6. DESIGN EQUATIONS Desired voltageVout 𝑉𝑜𝑢𝑡 = 𝐷𝑉𝑖𝑛 𝐷 = 𝑉𝑜𝑢𝑡 𝑉𝑖𝑛 D => duty cycle of the switch: 𝐷 = 𝑡 𝑜𝑛 𝑇 = 𝑡 𝑜𝑛 𝑡 𝑜𝑛 + 𝑡 𝑜𝑓𝑓 Switching frequency: 𝑓𝑠 = 1 𝑇 Choosing an inductor L by: 𝐿 = 𝑉𝑜𝑢𝑡(𝑉𝑖𝑛 − 𝑉𝑜𝑢𝑡) ∆𝑖 𝐿 𝑓𝑠 𝑉𝑖𝑛 6
- 7. DESIGN EQUATIONS CONTINUED •The inductor current changes with an essentially constant slope so solving for both slopes (ON and OFF states) and simplified we get: ∆𝑖 𝐿 = 𝑉𝑖𝑛 − 𝑉𝑜𝑢𝑡 2𝐿 𝐷𝑇𝑠 𝐿 = 𝑉𝑖𝑛 − 𝑉𝑜𝑢𝑡 2∆𝑖 𝐿 𝐷𝑇𝑠 • Equivalent Series Resistance (ESR) due to the capacitance • reduced by adding capacitors in parallel • Adding ceramic capacitor in parallel with the input dc voltage supply, thus 𝐶𝑖𝑛 = 𝐼 𝑜𝑢𝑡 𝐷 1 − 𝐷 1000 𝑓𝑠 𝑉𝑝𝑚𝑎𝑥 • Where 𝑉𝑝𝑚𝑎𝑥 is maximum allowed peak−to peak ripple voltage, the minimum output capacitance, Cout is given by 𝐶 𝑜𝑢𝑡 = ∆𝑖 𝐿 8𝑓𝑠∆𝑉𝑜𝑢𝑡 7
- 8. CURRENT WAVEFORMS • Thecurrent Iout = Iavg,L • ∆iL= pk-pk I change during ton • (change in iL) = (slope)(length of subinterval) • L must be able to handle the peak switching current without saturating the core. • Higher output-voltage ripple, small-value inductors result in a higher output current slew rate, improving the load transient response of the converter • Large-value inductors lower the ripple current and reduce the core magnetic hysteresis losses 8
- 9. A CURRENT SENSINGTECHNIQUE • Simplified model: ideal L in series with an RL and Rs are used for sensing the inductor current. • Advanced model: Could model inductor behavior between << f (10 kHz) & >> f (1 GHz) • RL = inductor parasitic resistance used to model inductor core losses • RS = Senses the inductor current • CS = Parasitic capacitance across the inductor • Z(s) = ESR–frequency-dependent. • Advanced model: The resonance of Cp with the inductor changes the effective inductance of the L with frequency & reduces inductance above resonance frequency. fs is limited to frequencies (10 kHz-1 MHz), which is the self-resonant f of the power L, thus Cp can be neglected in power L models. 9 Simplified L Model Advanced L Model
- 10. ADVANCED CURRENT SENSINGMODEL (SIMULINK) 10
- 11. ADVANCED CURRENT SENSING TECHNIQUE •The voltage across the ceramic capacitor, VCS is the sensor’s output. 𝐿 𝑅 𝐿 ≫ 𝑇 • One can determine the capacitor voltage that is directly proportional to the inductor current that is: 𝑉𝐶𝑆 = 𝑖 𝐿 𝑅 𝐿 • Thus, one can use the capacitor voltage VCS for over current protection • Assumptions for advanced current sensing: • R has 5% accuracy • L has a value with possible max at2.5µH at low current and a min of 1.1µH at high current • Cs has 10% tolerance, and RL is 3mΩ at 20°C 11