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Digital Logic Circuits, Digital
Component and Data
Representation
Course: B.Sc-CS-II
Subject: Computer Organization
And Architecture
Unit-1
1
Basic Logic Gates
and Basic Digital Design[1]
• NOT, AND, and OR Gates
• NAND and NOR Gates
• DeMorgan’s Theorem
• Exclusive-OR (XOR) Gate
• Multiple-input Gates
NOT Gate -- Inverter
X Y
0
1
1
0
NOT
• Y = ~X (Verilog)
• Y = !X (ABEL)
• Y = not X (VHDL)
• Y = X’
• Y = X
• Y = X (textook)
• not(Y,X) (Verilog)
NOT
X ~X ~~X = X
X ~X ~~X
0 1 0
1 0 1
AND Gate
AND
X
Y
Z
Z = X & Y
X Y Z
0 0 0
0 1 0
1 0 0
1 1 1
AND
• X & Y (Verilog and ABEL)
• X and Y (VHDL)
• X Y
• X Y
• X * Y
• XY (textbook)
• and(Z,X,Y) (Verilog)
U
V
OR Gate
OR
X
Y
Z
Z = X | Y
X Y Z
0 0 0
0 1 1
1 0 1
1 1 1
OR
• X | Y (Verilog)
• X # Y (ABEL)
• X or Y (VHDL)
• X + Y (textbook)
• X V Y
• X U Y
• or(Z,X,Y) (Verilog)
Basic Logic Gates
and Basic Digital Design[1]
• NOT, AND, and OR Gates
• NAND and NOR Gates
• DeMorgan’s Theorem
• Exclusive-OR (XOR) Gate
• Multiple-input Gates
NAND Gate
NAND
X
Y
Z
X Y Z
0 0 1
0 1 1
1 0 1
1 1 0
Z = ~(X & Y)
nand(Z,X,Y)
NAND Gate
NOT-AND
X
Y
Z
W = X & Y
Z = ~W = ~(X & Y)
X Y W Z
0 0 0 1
0 1 0 1
1 0 0 1
1 1 1 0
W
NOR Gate
NOR
X
Y
Z
X Y Z
0 0 1
0 1 0
1 0 0
1 1 0
Z = ~(X | Y)
nor(Z,X,Y)
NOR Gate
NOT-OR
X
Y
W = X | Y
Z = ~W = ~(X | Y)
X Y W Z
0 0 0 1
0 1 1 0
1 0 1 0
1 1 1 0
Z
W
Basic Logic Gates
and Basic Digital Design
• NOT, AND, and OR Gates
• NAND and NOR Gates
• DeMorgan’s Theorem
• Exclusive-OR (XOR) Gate
• Multiple-input Gates
NAND Gate
X
Y
X
Y
Z Z
Z = ~(X & Y) Z = ~X | ~Y
=
X Y W Z
0 0 0 1
0 1 0 1
1 0 0 1
1 1 1 0
X Y ~X ~Y Z
0 0 1 1 1
0 1 1 0 1
1 0 0 1 1
1 1 0 0 0
De Morgan’s Theorem-1
~(X & Y) = ~X | ~Y
• NOT all variables
• Change & to | and | to &
• NOT the result
NOR Gate
X
Y
Z
Z = ~(X | Y)
X Y Z
0 0 1
0 1 0
1 0 0
1 1 0
X
Y
Z
Z = ~X & ~Y
X Y ~X ~Y Z
0 0 1 1 1
0 1 1 0 0
1 0 0 1 0
1 1 0 0 0
De Morgan’s Theorem-2
~(X | Y) = ~X & ~Y
• NOT all variables
• Change & to | and | to &
• NOT the result
De Morgan’s Theorem
• NOT all variables
• Change & to | and | to &
• NOT the result
• --------------------------------------------
• ~X | ~Y = ~(~~X & ~~Y) = ~(X & Y)
• ~(X & Y) = ~~(~X | ~Y) = ~X | ~Y
• ~X & !Y = ~(~~X | ~~Y) = ~(X | Y)
• ~(X | Y) = ~~(~X & ~Y) = ~X & ~Y
Basic Logic Gates
and Basic Digital Design[1]
• NOT, AND, and OR Gates
• NAND and NOR Gates
• DeMorgan’s Theorem
• Exclusive-OR (XOR) Gate
• Multiple-input Gates
Exclusive-OR Gate
X Y Z
XOR
X
Y
Z 0 0 0
0 1 1
1 0 1
1 1 0
Z = X ^ Y
xor(Z,X,Y)
XOR
• X ^ Y (Verilog)
• X $ Y (ABEL)
• X @ Y
• xor(Z,X,Y) (Verilog)
X Y (textbook)⊕g
Exclusive-NOR Gate
X Y Z
XNOR
X
Y
Z 0 0 1
0 1 0
1 0 0
1 1 1
Z = ~(X ^ Y)
Z = X ~^ Y
xnor(Z,X,Y)
XNOR
• X ~^ Y (Verilog)
• !(X $ Y) (ABEL)
• X @ Y
• xnor(Z,X,Y) (Verilog)
X Yg e
Basic Logic Gates
and Basic Digital Design[1]
• NOT, AND, and OR Gates
• NAND and NOR Gates
• DeMorgan’s Theorem
• Exclusive-OR (XOR) Gate
• Multiple-input Gates
Multiple-input Gates[2]
Z 1 2
3 4Z Z
Z
Multiple-input AND Gate
Z 1
Output is HIGH only if all inputs are HIGHZ1
An open input will float HIGH
Multiple-input OR Gate
Output is LOW only if all inputs are LOWZ2
2Z
Multiple-input NAND Gate
Output is LOW only if all inputs are HIGHZ3
3Z
Multiple-input NOR Gate
Output is HIGH only if all inputs are LOWZ4
4Z
References
1. Computer Organization and Architecture,
Designing for performance by William Stallings,
Prentice Hall of India.
2. Modern Computer Architecture, by Morris Mano,
Prentice Hall of India.
3. Computer Architecture and Organization by John P.
Hayes, McGraw Hill Publishing Company.
4. Computer Organization by V. Carl Hamacher,
Zvonko G. Vranesic, Safwat G. Zaky, McGraw Hill
Publishing Company.

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B.sc cs-ii-u-1.6 digital logic circuits, digital component

  • 1. Digital Logic Circuits, Digital Component and Data Representation Course: B.Sc-CS-II Subject: Computer Organization And Architecture Unit-1 1
  • 2. Basic Logic Gates and Basic Digital Design[1] • NOT, AND, and OR Gates • NAND and NOR Gates • DeMorgan’s Theorem • Exclusive-OR (XOR) Gate • Multiple-input Gates
  • 3. NOT Gate -- Inverter X Y 0 1 1 0
  • 4. NOT • Y = ~X (Verilog) • Y = !X (ABEL) • Y = not X (VHDL) • Y = X’ • Y = X • Y = X (textook) • not(Y,X) (Verilog)
  • 5. NOT X ~X ~~X = X X ~X ~~X 0 1 0 1 0 1
  • 6. AND Gate AND X Y Z Z = X & Y X Y Z 0 0 0 0 1 0 1 0 0 1 1 1
  • 7. AND • X & Y (Verilog and ABEL) • X and Y (VHDL) • X Y • X Y • X * Y • XY (textbook) • and(Z,X,Y) (Verilog) U V
  • 8. OR Gate OR X Y Z Z = X | Y X Y Z 0 0 0 0 1 1 1 0 1 1 1 1
  • 9. OR • X | Y (Verilog) • X # Y (ABEL) • X or Y (VHDL) • X + Y (textbook) • X V Y • X U Y • or(Z,X,Y) (Verilog)
  • 10. Basic Logic Gates and Basic Digital Design[1] • NOT, AND, and OR Gates • NAND and NOR Gates • DeMorgan’s Theorem • Exclusive-OR (XOR) Gate • Multiple-input Gates
  • 11. NAND Gate NAND X Y Z X Y Z 0 0 1 0 1 1 1 0 1 1 1 0 Z = ~(X & Y) nand(Z,X,Y)
  • 12. NAND Gate NOT-AND X Y Z W = X & Y Z = ~W = ~(X & Y) X Y W Z 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 W
  • 13. NOR Gate NOR X Y Z X Y Z 0 0 1 0 1 0 1 0 0 1 1 0 Z = ~(X | Y) nor(Z,X,Y)
  • 14. NOR Gate NOT-OR X Y W = X | Y Z = ~W = ~(X | Y) X Y W Z 0 0 0 1 0 1 1 0 1 0 1 0 1 1 1 0 Z W
  • 15. Basic Logic Gates and Basic Digital Design • NOT, AND, and OR Gates • NAND and NOR Gates • DeMorgan’s Theorem • Exclusive-OR (XOR) Gate • Multiple-input Gates
  • 16. NAND Gate X Y X Y Z Z Z = ~(X & Y) Z = ~X | ~Y = X Y W Z 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 X Y ~X ~Y Z 0 0 1 1 1 0 1 1 0 1 1 0 0 1 1 1 1 0 0 0
  • 17. De Morgan’s Theorem-1 ~(X & Y) = ~X | ~Y • NOT all variables • Change & to | and | to & • NOT the result
  • 18. NOR Gate X Y Z Z = ~(X | Y) X Y Z 0 0 1 0 1 0 1 0 0 1 1 0 X Y Z Z = ~X & ~Y X Y ~X ~Y Z 0 0 1 1 1 0 1 1 0 0 1 0 0 1 0 1 1 0 0 0
  • 19. De Morgan’s Theorem-2 ~(X | Y) = ~X & ~Y • NOT all variables • Change & to | and | to & • NOT the result
  • 20. De Morgan’s Theorem • NOT all variables • Change & to | and | to & • NOT the result • -------------------------------------------- • ~X | ~Y = ~(~~X & ~~Y) = ~(X & Y) • ~(X & Y) = ~~(~X | ~Y) = ~X | ~Y • ~X & !Y = ~(~~X | ~~Y) = ~(X | Y) • ~(X | Y) = ~~(~X & ~Y) = ~X & ~Y
  • 21. Basic Logic Gates and Basic Digital Design[1] • NOT, AND, and OR Gates • NAND and NOR Gates • DeMorgan’s Theorem • Exclusive-OR (XOR) Gate • Multiple-input Gates
  • 22. Exclusive-OR Gate X Y Z XOR X Y Z 0 0 0 0 1 1 1 0 1 1 1 0 Z = X ^ Y xor(Z,X,Y)
  • 23. XOR • X ^ Y (Verilog) • X $ Y (ABEL) • X @ Y • xor(Z,X,Y) (Verilog) X Y (textbook)⊕g
  • 24. Exclusive-NOR Gate X Y Z XNOR X Y Z 0 0 1 0 1 0 1 0 0 1 1 1 Z = ~(X ^ Y) Z = X ~^ Y xnor(Z,X,Y)
  • 25. XNOR • X ~^ Y (Verilog) • !(X $ Y) (ABEL) • X @ Y • xnor(Z,X,Y) (Verilog) X Yg e
  • 26. Basic Logic Gates and Basic Digital Design[1] • NOT, AND, and OR Gates • NAND and NOR Gates • DeMorgan’s Theorem • Exclusive-OR (XOR) Gate • Multiple-input Gates
  • 28. Multiple-input AND Gate Z 1 Output is HIGH only if all inputs are HIGHZ1 An open input will float HIGH
  • 29. Multiple-input OR Gate Output is LOW only if all inputs are LOWZ2 2Z
  • 30. Multiple-input NAND Gate Output is LOW only if all inputs are HIGHZ3 3Z
  • 31. Multiple-input NOR Gate Output is HIGH only if all inputs are LOWZ4 4Z
  • 32. References 1. Computer Organization and Architecture, Designing for performance by William Stallings, Prentice Hall of India. 2. Modern Computer Architecture, by Morris Mano, Prentice Hall of India. 3. Computer Architecture and Organization by John P. Hayes, McGraw Hill Publishing Company. 4. Computer Organization by V. Carl Hamacher, Zvonko G. Vranesic, Safwat G. Zaky, McGraw Hill Publishing Company.