This is an expectation PPT that has been used for creating interest among the students about the subject.

1. Expectation Setting Overview (Day-1)
BCS302-Digital Design and Computer
Organization
Semester : III Semester (A &B Section)
Course Instructor: Ciyamala Kushbu S
Assistant Professor
ISE Dept.

2. Agenda
Day-01
 Introduction
 Student perspective
 Introduction to subject
 Why subject is important
 Real World Applications
 Course Objectives
 Pre-requisites
 Course Outcomes
 CO-PO mapping
 Quiz
2
Day-02
 Textbooks and Reference books
 Lesson Plan
 Assessment Plan
 Expected classroom behavior
 Some useful links

3. Students perspective
 Students introducing themselves
 Expectations – Questions
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4. Introduction to subject
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5. Computer System Level Hierarchy
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Level 6 User Executable Programs
Level 5 High Level Language C++, Java
Level 4 Assembly Language Assembly code
Level 3 System Software Operating System
Level 2 Machine Instruction Set Architecture
Level 1 Control Microcode
Level 0 Digital Logic Circuits, Gates

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21. Some of the basic real-life examples of digital
devices are as follows:-
 Personal computers/ Laptops/Notebooks
 Smartphones/tablets
 Digital Weighing Machine
 Kiosk Check-in at Airport
 Automated Teller Machine – ATM
 Calculators
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22. Why Python programming is important?
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24. VHDL
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• The Very High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL) is a language that
describes the behavior of electronic circuits, most commonly digital circuits.
• VHDL is defined by IEEE standards.
• There are two common variants: VHDL-1987 and VHDL-1993. VHDL can be used for designing hardware and
for creating test entities to verify the behavior of that hardware.
• VHDL is used as a design entry format by a variety of EDA tools, including synthesis tools such
as Quartus Prime Integrated Synthesis, simulation tools, and formal verification tools.

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26. Scope-Higher Studies Perspective
 Masters in India/Abroad
 Online Degree programs
 Digital Electronics - Complete Course | Udemy
 Free Course: Digital Electronics from Neso Academy
 MOOC courses
 Digital Electronic Circuits-https://onlinecourses.nptel.ac.in/noc22_ee55/preview
 Computer Organization-https://archive.nptel.ac.in/courses/106/106/106106092/
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27. What does a Digital Design Engineer do?
 Digital design engineers create, develop, and improve digital systems and tools, taking a lead role in overseeing
the entire process from concept to implementation.
 They configure and evaluate system architecture, and use modeling and testing to assess and refine designs.
 They take an active role in leading validation and verification processes and developing testing programs.
 They regularly use coding and programming languages, and customize designs for real-world use settings.
 Digital design engineers typically have at least a bachelor’s degree in engineering, although some employers
require a master’s degree or other advanced training.
 Must be comfortable working with digital design architecture and related tools and technologies.
 Requires proficiency with standard programming and coding languages, and hands-on experience with modeling
tools, along with excellent analytical and problem-solving skills.
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28. What responsibilities are common for
Digital Design Engineer jobs?
 Provide assignments, direction and manage priorities for team members.
 Partner with graphics researchers and silicon designers on IP development and implementation.
 Perform architectural, design, and RTL reviews that improve and enable more efficient and effective research.
 Contribute to project scope and schedule goal-setting and consistently meet and exceed those goals.
 Design for maintainability, manufacturability, ease of use, and overall quality.
 Provide technical leadership towards the goals of research IP simulation and test chip development, and people
management and support for your team.
 Drive development progress through task identification, scheduling, and monitoring.
 Responsible for defining and optimizing overall system level block diagrams, communication pathways, and
measurement performance.
 Work with software/firmware manager and program manager to perform assigned development tasks.
 Assume technical leadership responsibilities for small- to medium-size projects.
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29. What are the typical qualifications for
Digital Design Engineer jobs?
 Bachelor's or Graduate's Degree in computer engineering, computer science,
electrical engineering or science Degree.
 Experience with FPGA, ASIC Design, SOV, C, Python, FPGA Design, FPGA
VHDL, C# and PERL software and systems.
 Comfortable interfacing, scripting, and debugging.
 Experience with firmware and algorithmic design.
 An eye for task and project closure.
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30. Feedback about
the subject by
Senior Batch
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31. Course Objectives
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Course Objectives/
Expectations
To demonstrate the functionalities of binary logic system
To explain the working of combinational and sequential logic system
To realize the basic structure of computer system
To illustrate the working of I/O operations and processing unit

32. Course Outcomes
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By the end of this course, students will be able to
1: Apply the K–Map techniques to simplify various Boolean expressions.
2: Design different types of combinational and sequential circuits along with Verilog programs.
3: Describe the fundamentals of machine instructions, addressing modes and Processor
performance.
4: Explain the approaches involved in achieving communication between processor and I/O
devices.
5:Analyze internal Organization of Memory and Impact of cache/Pipelining on Processor
Performance.

33. CO-PO Mapping
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34. Text books and Reference Books
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Suggested Learning Resources:
Books
1. M. Morris Mano & Michael D. Ciletti, Digital Design With an Introduction to Verilog Design, 5e,
Pearson Education.
2. Carl Hamacher, ZvonkoVranesic, SafwatZaky, Computer Organization, 5th Edition, Tata McGraw Hill.
Web links and Video Lectures (e-Resources):
https://cse11-iiith.vlabs.ac.in/

35. Lesson Plan-Modules
Module – 1
 Introduction to Digital Design
 Binary Logic
 Basic Theorems And Properties Of
Boolean Algebra
 Boolean Functions,
 Digital Logic Gates,
 The Map Method,
 Four-Variable Map,
 Don’t-Care Conditions, NAND and NOR
Implementation,
 Other Hardware Description Language –
Verilog Model of a simple circuit.
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Module – 2
Combinational Logic:
Combinational Circuits,
 Design Procedure,
Binary Adder- Subtractor,
Decoders, Encoders,
Multiplexers.
HDL Models of Combinational Circuits –
Adder, Multiplexer, Encoder.
Sequential Logic:
Sequential Circuits,
 Storage Elements: Latches, Flip-Flops.
Module – 3
Basic Structure of Computers:
Functional Units,
Basic Operational Concepts,
Bus structure,
Performance – Processor Clock,
Basic Performance Equation,
Clock Rate,
Performance Measurement.
Machine Instructions and Programs:
Memory Location and Addresses,
Memory Operations,
Instruction and Instruction sequencing,
Addressing Modes.

36. Lesson Plan-Modules
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Module 4
Input/output Organization:
 Accessing I/O Devices,
 Interrupts – Interrupt Hardware,
 Enabling and Disabling Interrupts,
 Handling Multiple Devices,
Direct Memory Access:
 Bus Arbitration,
 Speed,
 Size and Cost of memory systems.
 Cache Memories – Mapping Functions.
Module 5
Basic Processing Unit:
Some Fundamental Concepts: Register Transfers,
Performing ALU operations,
fetching a word from Memory,
Storing a word in memory.
Execution of a Complete Instruction.
Pipelining: Basic concepts,
Role of Cache memory,
Pipeline Performance.

37. Assessment plan 37
CIE-50 marks (20 out of 50 )
SEE-50 marks (18 out of 50)
Total-100 marks( 40 out of 100)
CIE-Continuous Internal Evaluation
20 (IAT)+20 (Practical IAT)+10 (Assignment)
Each IAT is for 50 marks whose average will be scaled down to 20 marks
Each Practical Exam is for 50 marks whose average will be scaled down to 20 marks
Minimum 2 Assignments will be given with 10 marks each whose average will be scaled down to 10 marks
SEE-Semester End Exam
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum of 3
sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored by the student shall be proportionally scaled down to 50 Marks.

38. Expected Classroom Behaviour
 Active, Hands on based Interactive Learning
 Quizzes
 Attendance: 85%
 Hand written assignments (no plagiarism etc),
 Sticking to deadlines for submissions
 No disruption
 Strict action against Abusers
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39. Some Useful Links
 https://archive.nptel.ac.in/courses/108/105/108105113/
 https://nptel.ac.in/courses/106/103/106103068/
 https://nptel.ac.in/content/storage2/courses/106103068/pdf/coa.pdf
 https://nptel.ac.in/courses/106/105/106105163/
 https://nptel.ac.in/courses/106/106/106106092/
 https://nptel.ac.in/courses/106/106/106106166/
 http://www.nptelvideos.in/2012/11/computer-organization.html
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