Chip designing

1. Semiconductor Chip
Design Training
Introduction

2. Universities
Lay the foundation of a successful
career for the students
In practical terms
Prepare students to land good jobs and be
successful in their core areas of study

3. Indian Semiconductor Opportunity

4. Collaboration
proposal
Finishing school for selected students
Industry like project, and personality
development
A student coordinator to help students
post lecture hours
Significantly improved recruitment
results for the institute in VLSI

5. LEARN BY DESIGNING
YOUR FIRST CHIP
TAUGHT BY INDUSTRY
EXPERTS
INTEGRATED PERSONALITY
DEVELOPMENT
HOLISTIC ANALOG &
DIGITAL CURRICULUM
(FIRST OF ITS KIND)

6. Program:
Chip Design
Essentials
(6 weeks)
Timeline: May 1st to June 15th tentative (6 weeks)
Target students: 3rd year students (after 6th semester) or 4th year (8th sem)
Selection: Through written test and interview
Duration:
Monday 6pm-8pm (online)
Wednesday 6pm-8pm (online)
Friday 6pm-8pm (online)
Saturday 4 hrs (offline bi-weekly on Campus)
Program features:
 Weekly assignments
 Research paper reading and presentation
 “my first chip” design as Team project, “my first IP”, individual ownership
 Understanding semiconductor industry career opportunities
 3 credits accounted in 7th semester possibility (to be confirmed by Univ)
 Completion certificate and high confidence to apply for core jobs
 High chances of securing scholarships and better ranked univs for MS
Fee details:
INR: 50,000/- + GST

7. Chip
Design
Essentials
Project Design project (IP + Team project “Chip”)
Review of HDL/Verilog
Verilog fundamentals; FSMs; do’s and don’ts
for synthesizable HDL
Key IP for System-on-Chip
Survey of all common IPs, design to
fabrication
Boot/power up sequence
Designing proper power-up/down
sequencing, power on reset, hard/soft reset
Biasing Techniques
Reliably in saturation invariant across PVT,
common pitfalls
Communication port AXI/AHB, UART, I2C, SPI…
Noise, Linearity and Stability
Corner, Montecarlo simulations, offset and
mismatch reduction techniques
Advanced topics
Clock domain crossing, Set-up and hold times,
variation, mismatch, cost-benefit analysis

8. Detailed 6-Week
Training Plan for Chip
Design Essentials
Additional Training Elements:
• Regular Assignments: Weekly
assignments to practice each week’s
topics, reinforcing learning and ensuring
practical competence.
• Peer Reviews: Conduct peer review
sessions where students evaluate each
other's work, encouraging collaborative
learning and critical thinking.
• Documentation Practice: Emphasize
the importance of thorough
documentation throughout the design
process, mirroring industry standards to
prepare students for professional
environments.
Week Topics Covered Activities Learning Outcomes
1
Introduction to CMOS IC
Design
Lecture: Overview of CMOS technology and
introduction to IC design flow.
Understand basic CMOS technology and the
steps involved in IC design.
IP Project assignments
and review of Verilog,
FSM
Project assignment, workflow and
expectations
Review of Verilog and HW assignments
Literature research, project planning, Verilog
refresher.
2
Basic Analog
Components
Lecture: Design of basic analog components
(resistors, capacitors, MOS transistors).
Understand the characteristics and design
considerations of basic analog components.
Basic digital IP
development.
Work together with the class on sample IP
development. Lint checks, simple test
benches. HW assignments, project review
Comfortable with determining requirements,
then translating them to and architecture and
then develop in Verilog.
3 Simulation and Analysis
Lab: Simulate basic components using spice
tools. Introduce parameter sweeps for PVT
variations.
Practice simulation of analog components
under various PVT conditions.
Bootup sequence and
the I2C IP development.
Work out a sample boot-up sequence and I2C
slave IP. HW assignments, project review
Based on specific examples, understanding
design of bigger IP
4 Basic IP Building Blocks
Lecture: Design of fundamental IP blocks
(current mirrors, differential pairs, voltage
references).
Learn about the design and function of key IP
building blocks in analog ICs.
Advanced Concepts
Setup and hold times and Clock domain
crossing. HW assignments, project review
Deeper understanding, now extending
beyond functionality to timing and CDC.
5
Layout Design, matching
and DRC/LVS
Lecture: Introduction to layout design, DRC,
LVS and their importance in IC design.
Introduction to packaging considerations.
Understand layout design principles and the
critical nature of DRC and LVS checks in
fabrication readiness.
Timing closure, testing.
Timing closure, ATPG, on-demand topics
HW assignments, project review
Understanding timing closure and how
designs are tested.
6
Final Project and
Presentation
Project: Finalize designs, prepare for
hypothetical submission to a fabrication
facility. Present final project.
Integrate all learning aspects into a final
project; enhance presentation and technical
reporting skills.
Review and Feedback
Peer and instructor feedback on projects,
discuss potential improvements and real-
world considerations.
Receive valuable feedback to refine
understanding and designs, preparing for
real-world applications.

9. Sample Analog design focused IP projects
PROJECT DETAILS
Basic Operational
Amplifier
Design a CMOS operational amplifier from scratch. Start with correct way of biasing transistors, do small signal analysis, understand
about stability.
Bandgap Voltage and
current reference
Design a bandgap reference, its key specifications and applications in a SOC. Start-up circuits, trimming, understanding curvature
and temp drift.
Voltage Regulator
(LDO)
Create a linear voltage regulator for stable DC output. Understanding voltage reference design, importance of dropout, quiescent
and load current, line and load regulation, importance of external components on the performance and cost.
Active Filter Circuit
Design a low-pass or a band-pass active filter using opamps. Understand importance of loading between stages, stability, filter
response, PVT variations.
Temperature Sensor
Circuit
Design an analog circuit interfaced with a temperature sensor. Key learning skills are Sensor interfacing and analog signal
processing.
LED Driver Circuit
Build a circuit to control LED brightness, understand methods to build a stable current source, trimming, voltage headroom and
switchable current sources.
Comparator for
Decision Making
Design a comparator to make decisions at specific voltage levels. Key skills would be high speed comparator design, hysteresis, kick-
back minimization, digital-analog interfacing.
CMOS Oscillator Design Create a stable oscillator for use as a clock or input for PLLs in SOC designs. Understanding start-up, PVT variations, trimming.
Programmable Gain
Amplifier
Design a digitally-controlled variable gain amplifier, Key skills will be to understand Gain control, digital-analog interaction, amplifier
design. Understand linearity and PVT variations.

10. Sample Digital design focused IP projects
PROJECT DETAILS
RISC-V Processor
Implementation
Design and implement a simplified version of a RISC-V processor in Verilog. Start with basic components such as ALU, registers, and control logic, and gradually build up to a
complete processor capable of executing simple instructions. You can extend the project by adding support for additional RISC-V instructions and incorporating pipeline stages
for improved performance.
VGA Controller
Create a VGA controller module that generates video signals compatible with VGA monitors. Implement features such as resolution selection, color generation, and
synchronization with vertical and horizontal blanking intervals. You can further enhance the project by adding support for displaying graphics and text on the screen.
Digital Signal Processing
(DSP) Module
Design a DSP module capable of performing common signal processing operations such as filtering, convolution, and Fourier transforms. Use Verilog to implement algorithms
for signal processing and optimize the design for high performance and resource efficiency. You can explore different DSP algorithms and optimize the design for specific
applications such as audio processing or image filtering.
UART Communication
Module
Create a UART (Universal Asynchronous Receiver-Transmitter) communication module that enables serial communication between devices. Implement features such as baud
rate generation, framing, error detection, and flow control. You can use the UART module to establish communication between FPGA boards, microcontrollers, and other
external devices.
Advanced Memory
Controller
Design a memory controller module that interfaces with external memory devices such as DDR RAM or Flash memory. Implement features such as memory addressing, data
transfer, and error correction. You can optimize the memory controller for high-speed data transfers and explore techniques for improving memory access efficiency.
Graphics Processing Unit
(GPU) Accelerator
Develop a GPU accelerator module that offloads graphics processing tasks from the CPU and improves the performance of graphics-intensive applications. Implement features
such as vertex processing, rasterization, and pixel shading using Verilog. You can explore parallel processing techniques and optimize the GPU accelerator for real-time
rendering and gaming applications.
Digital Audio Processor
Design a digital audio processor module capable of processing audio signals in real time. Implement features such as audio encoding and decoding, filtering, equalization, and
digital effects processing. You can use the audio processor module to build audio applications such as music synthesizers, audio effects processors, and digital audio
workstations.
Cryptographic
Accelerator
Create a cryptographic accelerator module that accelerates common cryptographic algorithms such as AES, RSA, and SHA. Implement features such as encryption, decryption,
key generation, and secure hash computation. You can optimize the cryptographic accelerator for high-speed data encryption and explore hardware security features such as
side-channel attack mitigation.
Neural Network
Accelerator
Develop a neural network accelerator module that accelerates deep learning inference tasks using hardware acceleration techniques. Implement features such as matrix
multiplication, activation functions, and neural network layer operations. You can optimize the neural network accelerator for low-latency inference and explore techniques
for efficient hardware implementation of neural network models.

11. Rajesh Gupta’s Journey
26 years of industry experience
• 26 years in the Industry, Last 12 as country head; 14 yrs in US, 12yrs in India
• Business, people and technical leader
• 25+ Patents, Innovation council chairman
Summary
• B. Tech. IIT, Madras(EEE), AIR 127, Ramasarma Kolluri Medallion
• M.S. Rensselaer, NY USA, Henry J. Nolte Award for best academics
Academics
• Developed Advanced memory cells and solutions
• TRAM, Micron: TRAM, DRAM, and NAND designs and NAND, Xpoint SoCs
• Sensing chips: ALS, Flicker, Proximity, dToF, and Temperature sensors
• Battery management Chips, PMICs and automotive sensors
VLSI expertise
• DELL, Microsoft, Amazon, Google, Facebook … memory solutions for data centers
• Sensors and memory to Apple
• Samsung, One+ and several others Android phone manufacturers
• Tesla, BMW, Hyundai, Continental and others for automotive chips
Customers @past companies

12. Dr. Krishna Kanth Avalur's Journey
22 years of industry experience
• 22 years in the Industry, Last 3 as Director Analog Mixed-Signal R&D
• Business, people and technical leader
• 12+ Patents, 10 IEEE publication, Associate Editor TCAS-II (2024-25), Si Chip Design Techfield
owner in ams OSRAM
• Responsible for training, hiring and mentoring several fresh college graduates into VLSI domain
Summary
• B. Tech & M. Tech (Dual Degree) from IIT Bombay 2002
• Shankar Dayal Sharma Gold Medal and Student Roll of Honour IIT Bombay 2002
• PhD from IIIT Hyderabad, Adjunct professor at IIT Hyderabad, Digital University Kerala, BOS
member in ~15 universities in India
• Vice-chair, IEEE CAS/EDS Chapter, Hyderabad & PhD review panelist at several universities
• Associate Editor – Transactions on Circuits and Systems II (express briefs) 2024-2025
Academics
• Developed several high-performing analog mixed-signal and Power management ICs (in
production)
• Sensing chips: ALS, Flicker, Proximity, IVT, Biosensors and Temperature sensors
• Battery management Chips, PMICs and automotive sensors
VLSI expertise
• Conti, Bosch, Hyundai Mobis, Magneto Marelli for Automotive ICs
• CMOS Optical and temperature sensors to Apple
• CMOS Optical sensors for Samsung, OnePlus and several others Android phone manufacturers
Customers @past companies

13. Please fill the google form below for pre-registration details:
https://forms.gle/GHauBXBS9DPR4FCU7