8051,chapter1,architecture and peripherals

8051 Microcontroller
Chapter 1
BY
Amruta Chintawar
(Asst.Prof at RAIT, Navi Mumbai)
Thursday, September 03, 2015 1By AMRUTA CHINTAWAR

Topics Covered
• Comparison Between Microprocessors and
Microcontroller
• Features, Architecture & Pin configuration
• CPU Timing and Machine cycle
• I/P and O/P Ports
• Memory Organization
• Counters and Timers
• Interrupts
• Serial data I/P &O/P

Comparison Between P & C
P C
CPU is stand-alone, RAM, ROM, I/O,
timer are separate
CPU, RAM, ROM, I/O and timer are all
on a single chip
Designer can decide on the amount of
ROM, RAM and I/O ports
fix amount of on-chip ROM, RAM, I/P
O/P ports (internal h/w is fixed)
general-purpose single-purpose
Instructions are mainly to move large
volume of data
Many bit handling instructions along
with byte processing
More access time for peripherals-system
slower
Less access time on On-chip devices-
system faster
In contrast, similar system that builds
from uP would require a lot of
additional units
Only single chip can be a complete
system

Comparison Between P & C
P C
Implementation is complicated Implementation is easy
Bulkier, costly, less reliable and consume
more power
Compact, Cheaper, more reliable and
consume less power
S/W protection not possible - external
code memory
Possible –On chip memory
uPs are suitable to processing
information in computer systems.
uCs are suitable to control of I/O devices
in designs requiring a minimum
component

Features of 8051
• 12Mhz/ (11.0592Mhz to support standard baud rate for serial
port)
• 4K bytes ROM
• 128 bytes RAM
• Four 8-bit I/O ports (32 I/O pins)
• Two 8/16 bit timers
• Serial port-Asynchronous
• 64K external code memory space
• 64K data memory space
• Multiple internal and external interrupt sources (5 srcs)

Features of 8051

Blocks of Architecture
• ALU
• Memory
• Peripherals
• Timing and Control Unit
• Oscillator

ALU
• 8-bit
• Performs all arithmetic and
logical operations
• Updates status flags(PSW)

Memory
• Separate On-chip Data and Code memor
• Code Memory-Programs instructions (ROM-4KB)
• Data memory-various Data (RAM-128B)
• Few RAM locations used to program control
various on-chip peripherals and features-SFRs

Peripherals
• 2, 16 bit Timers T0,T1
SFRs- TCON,TMOD,T0,T1
PINs-T0, T1
• 4,I/O ports P0,P1,P2,P3
SFRs-P0,P1,P2,P3
PINs-P0.0-P0.7 ,P1.0-P1.7
• Serial Port
 SFRs-SCON,SBUF,PCON (1-bit)
 PINs-Rxd,Txd
• Interrupts
SFRs-IP,IE,TCON
PINs-INT0,INT1 (H/W)Thursday, September 03, 2015 10By AMRUTA CHINTAWAR

Timing and Control
• Generate time and Control signal
• Necessary for Execution
• Synchronizes all activities with clock

Oscillator
• Onchip oscillator circuit – generates clock
pulses.
• External resonant ckt connected (complete
oscillator)
• 12Mhz

Pin Configuration

Pin Configuration
• 40 pins DIP package
• Four 8-bit I/O port pins-has two functions
1. Vcc (pin 40): Power supply ,+5v
2. GND(pin 20) : supply is connected wrp to
ground

Pin Configuration
3. XTAL1 &XTAL2: The external resonant circuit is
connected to on-chip oscillator circuit .
• NORMALLY Quartz crystal and capacitor are
connected with XTAL1(pin 19) & XTAL2 (pin
18)
• Works at a frequency of crystal oscillator
• If clock signal external oscillator is used,its
onne ted to XTAL …XTAL is left
unconnected.

Pin Configuration
3. XTAL1 &XTAL2: The external resonant circuit
is connected to on-chip oscillator circuit .
• NORMALLY Quartz crystal and capacitor are
connected with XTAL1(pin 19) & XTAL2 (pin
18)
• Works at a frequency of crystal oscillator
• If clock signal external oscillator is used,its
onne ted to XTAL …XTAL is left
unconnected.

Pin Configuration
Crystal connections:

Pin Configuration
Machine Cycle:

Pin Configuration
4.ALE/PROG#: Address latch Enable
• Used to Demultiplex address and data
• ALE=1,indicates presence of lower address bits on
P0,thus enable latch to store address.
• ALE=0, contents are latched, it retains till next ALE.
• ALE=0, P0 act as data bus
PROG#
• for on-chip flash memory programming
• After reset if this pin is low ,uC enters into
programming mode

Pin Configuration, ALE

Pin Configuration
5.RST: Reset
• Active high I/P
• Terminates all the activities
• Clears the contents of all the registers
• Default values will be loaded in SFRs
• Reset signal must be held high for at least 2
m/c cycles

Pin Configuration
RESET:

Pin Configuration
6.PSEN#: Program store Enable
• Active low
• Activate external ROM/EPROM/EEPROM
• Connected to OE# of ROM chip
• not activated when On-chip ROM is accessed

Pin Configuration
7.EA#/VPP: External Access
• Active low, External Access, complete code on external ROM
• If high fetch code from on-chip ROM
• Connected to OE# of ROM chip
• not activated when On-chip ROM is accessed
• However any reference to program address outside the address range of
on-chip memory will automatically access External memory

Pin Configuration
8.PORT 0:
• 8-bit open drain bidirectional I/O port
• Occupies 8-pins
• Open drain external pull-up resistor of 10Kohm must be connected to each pin
• To program P0 as I/P, write 1 to lacth register
• It also has alternate function of ADD/DATA
• However any reference to program address outside the address range of on-chip
memory will automatically access External memory

Pin Configuration
9.PORT 1:
• 8-bit bidirectional I/O port
• Occupies 8-pins
• Has Internal pull-up resistor
• To program P1 as I/P, write 1 to latch register

Pin Configuration
9.PORT 2:
• Occupies 8-pins
• Act as Higher order address bus A8-A15 while accessing external memory

Pin Configuration
9.PORT 3:
• Occupies 8-pins
• Has alternate functions
• TXD & RXD , INT0# & INT1# , T0 & T1 ,WR# and Rd#

Programming Model
• H/W which is available for Programmer to
directly use it through S/W
• It is a collection of 8 and 16 bit register and 8
bit memory locations.
• Can be operated using software instructions
• Each register with exception of PC, has an
internal one byte address assigned to it.
Thursday, September 03, 2015 By AMRUTA CHINTAWAR 29

Programming Model
• Some registers such as TCON, SCON, IP, IE, A,
B, PSW and ports are all bit addressable and
are marked with * mark.
• These types have provision for reading or
writing the entire byte of data and also each
individual bits may be read or altered
• operations can be done by software
instructions that are generally able to specify a
register by its address or its symbolic name or
both
Thursday, September 03, 2015 By AMRUTA CHINTAWAR 30

Programming Model

SFRs Memory Mapping

PSW Structure

I/P and O/P Port
• Ports can be accessed directly by instructions
during program execution
• I/O ports are memory mapped, they are
treated as memory locations
• All ports are bit addressable
• Each PIN consists of a D latch, I/P buffer and
O/P driver
• SFRs for each port is made of 8-latches
• Accessed by SFRs address or name of that port

Port 0

Port 1

Port 2

Port 3

Timer Structure

TMOD Register

TCON Register

Timer Modes
• It operates in 4 different modes
1. Mode0: 13-bit Timer /Counter
2. Mode1: 16-bit Timer/Counter
3.Mode2: 8-bit Auto-reload
4.Mode3: 8-bit split timer(TL0,TH0)

Timer Modes

Serial Port
• Slow Process
• To tie-up with valuable processor time serial
data flags are included
• Transmission is under control of program
• Reception unpredictable
• Many a times beyond control of program
• Programmers must write routine to clear flags

Serial Port
• Support full-duplex serial communication
• Transmit and receive buffer register with shift
register
• Logic for generating timing signal
• Status bit showing that data byte has been
sent
• Status bit to indicate data bytes has been
received
• Controlled by SBUF & SCON

Serial Port

Serial Data Transmission

SCON

Serial Modes
MODE 0 MODE 1,2,3
Fixed baud rate Variable by T1 and SMOD bit of
PCON

Serial Mode 0
• 8-bit half Duplex
• START/STOP Bit not required
• TRN and REN is on RxD
• TxD-provides shift clock for data transfer
-data shifted out at S6P2
-data shifted in after Rxd is sampled S5P2
-signal is square wave
-high for S6,S1,S2
-low for S3,S4,S5
• Timer1 baud rate f/12
• For high speed data collection

Serial Mode 0

Serial Mode 1
• 10-bits per character, full duplex
• 1-start(0),8-data,1-stop bit(1)
• Start and stop bit -----discard
• RxD-receives
• TxD-Transmit
• TI=1-after all 10-bits transmitted
• RI=1-if SM2=0 unconditional
RB8=1 condition satisfies

Serial Mode 1
• Reception- START bit discarded
-8-Bit SBUF
-stop bit RB8
• Data received at programmed baud rate
fbaud =2smod /32 xT1
1/32 x T1 ----SMOD=0
1/16xT1 ----SMOD=1

Serial Mode 1

Serial Mode 2
• 11-bits per character
• 1-start(0),8-data,9th-programmable,1-stop
bit(1)
 9th- RB8 and 8-SBUF ------reception
 9th -TB8 and 8-SBUF------transmission
• Start and stop bit -----discard
• Baud rate controlled by oscillator frequency
fbaud =2smod /64,1/64,1/32 x OSC freq

Serial Mode 3
• Operates like Mode 2
only
• Baud rate is variable

Serial Mode 2 & 3

Interrupts
• It’s a signal generated y an event that auses
the controller to stop temporarily its current
program
• Performs ISR to service that event(Interrupt
handler)
• These events are asynchronous generated by
peripherals
• It allows most efficient utilization of resources
and time
• It’s a H/W generated all

Interrupts of 8051
• The source may be internal peripheral or
external devices
• Total 5---3 internal & 2 H/W
• Internal– Timer0 (TF0),Timer1(TF1),serial
port(TI/RI)
• External--INT0#,INT1#,also referred as IE0,IE1
• Each interrupt has fixed memory location that
contains its ISR
• ISRs are stored in IVT
Thursday, September 03, 2015 64Thursday, September 03, 2015 64By AMRUTA CHINTAWAR

Interrupts of 8051
• All flags auto clear except RI/TI it has to be
cleared manually

IP

IE

Power Saving Modes
• Two Power saving modes activated by
programming PCON
• IDLE and POWER DOWN mode
• Most important factor to save powe
consumption is to use crystal frequency just
sufficient for application
• Operating with higher frequency will consume
more power

IDLE Mode
• By setting IDLE bit in PCON =1
• Stops program execution and contents of
internal RAM are preserved
• Oscillator continues to run,but clock is
disconnected from CPU
• Timer and serial port operates normally
• Come out by activation of any Interrupt or
RESET,this will make IDLE=0
• After execution of ISR,program resume from
instruction after set idle.

Power Down Mode
• By setting PWDN=1
• Stops on chip oscillator
• Program execution, timers and serial port
operation also stops
• Content of internal RAM are preserved
• Come out of by RESET

Power Saving Modes

PCON
• Not bit addressable

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