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Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
1. Introduction to Embedded System
Design
© Lothar Thiele
ETH Zurich, Switzerland
1 - 2
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Contents of Lectures (Lothar Thiele)
1. Introduction to Embedded System Design
2. Software for Embedded Systems
3. Real-Time Scheduling
4. Design Space Exploration
5. Performance Analysis
The slides contain material from the “Embedded System Design”
Book and Lecture of Peter Marwedel and from the “Hard
Real-Time Computing Systems” Book of Giorgio Buttazzo.
1 - 3
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Topics
General Introduction to Embedded Systems
Hardware Platforms and Components
! System Specialization
! Application Specific Instruction Sets
• Micro Controller
• Digital Signal Processors and VLIW
! Programmable Hardware
! ASICs
! System-on-Chip
1 - 4
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Main reason for buying is not information processing
Embedded systems (ES) = information processing
systems embedded into a larger product
Examples:
Embedded Systems
1 - 5
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Embedded Systems
external process
embedded system
human interface
sensors, actuators
1 - 6
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Examples of Embedded Systems
Car as an integrated control-, communication and information
system.
ABS
gear box
motor control
climate control
information
1 - 7
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Examples of Embedded Systems
Consumer electronics, for example MP3 Audio, digital camera, home
electronics, … .
sensors
actuators
user interface
processor
1 - 8
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Examples of Embedded Systems
Production systems
1 - 9
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Examples of Embedded Systems
Information systems, for example wireless communication (mobile
phone, Wireless LAN, …), end-user equipment, router, …
1 - 10
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Communicating Embedded Systems
Example: BTnodes (http://www.btnode.ethz.ch)
! complete platform including OS
! especially suited for pervasive computing applications
Sensor
Actuator
1 - 11
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
BTnode Platform
generic platform
for ad-hoc
computing
complete
platform
including OS
especially suited
for pervasive
computing
applications
Communication via
Bluetooth
Transceiver
Data
Interfaces
Microprocessor
and Memory
Batteries
2nd Radio
1 - 12
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Communicating Embedded Systems
! sensor networks (civil engineering, buildings, environmental
monitoring, traffic, emergency situations)
! smart products, wearable/ubiquitous computing
MICSMICS
1 - 13
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Characteristics of Embedded Systems (1)
Must be dependable:
! Reliability: R(t) = probability of system working correctly
provided that is was working at t=0
! Maintainability: M(d) = probability of system working
correctly d time units after error occurred.
! Availability: probability of system working at time t
! Safety: no harm to be caused
! Security: confidential and authentic communication
Even perfectly designed systems can fail if the assumptions
about the workload and possible errors turn out to be wrong.
Making the system dependable must not be an after-thought, it
must be considered from the very beginning.
1 - 14
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Characteristics of Embedded Systems (2)
Must be efficient:
! Energy efficient
! Code-size efficient (especially for systems on a chip)
! Run-time efficient
! Weight efficient
! Cost efficient
Dedicated towards a certain application: Knowledge about
behavior at design time can be used to minimize resources
and to maximize robustness.
Dedicated user interface (no mouse, keyboard and screen).
1 - 15
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Characteristics of Embedded Systems (3)
Many ES must meet real-time constraints:
! A real-time system must react to stimuli from the controlled
object (or the operator) within the time interval dictated by the
environment.
! For real-time systems, right answers arriving too late (or even
too early) are wrong.
„A real-time constraint is called hard, if not meeting that
constraint could result in a catastrophe“ [Kopetz, 1997].
! All other time-constraints are called soft.
! A guaranteed system response has to be explained without
statistical arguments.
1 - 16
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Characteristics of Embedded Systems (4)
Frequently connected to physical environment through
sensors and actuators,
Hybrid systems (analog + digital parts).
Typically, ES are reactive systems:
„A reactive system is one which is in continual interaction
with is environment and executes at a pace determined by
that environment“ [Bergé, 1995]
! Behavior depends on input and current state.
" automata model often appropriate,
1 - 17
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Comparison
Embedded Systems
! Few applications that are
known at design-time.
! Not programmable by end
user.
! Fixed run-time requirements
(additional computing power
not useful).
! Criteria:
• cost
• power consumption
• predictability
• …
General Purpose Computing
! Broad class of applications.
! Programmable by end user.
! Faster is better.
! Criteria:
• cost
• average speed
1 - 18
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Topics
General Introduction to Embedded Systems
Hardware Platforms and Components
! System Specialization
! Application Specific Instruction Sets
• Micro Controller
• Digital Signal Processors and VLIW
! Programmable Hardware
! ASICs
! System-on-Chip
1 - 19
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Embedded System Hardware
Embedded system hardware is frequently used in a loop
(„hardware in a loop“):
actuators
embedded system
this course
1 - 20
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Typical Architecture
Microprocessor
• 4, 8, 16, 32, 4 bit bus
• CISC, RISC, DSP
• Integrated peripherals
• Debug/Test Port
• Caches
• Pipeline
• Multiprocessing Systems
DEBUG Port
Non-volatile memory
• EPROM, FLASH, DISK
• Hybrid
Volatile Memory
• DRAM, SRAM
• Hybrid
Custom Devices
• ASIC
• FPGA
• PAL
Standard Devices
• I/O Ports
• Peripheral Controllers
Communication Devices
• Ethernet
• RS-232
• SCSI
• Centronics
• Proprietary
Microprocessor Bus
• Custom
• PCI
• VME
• PC-102
System Clocks
• RTC circuitry
• System clocks
• Integrated in uC
• Imported/Exported
Peripheral Bus
Software
• Application Code
• Driver Code / BIOS
• Real Time Operating System
• User Interface
• Communications Protocol Stacks
• C, C++, Assembly Language, ADA
• Legacy Code
ToOutsideWorld
1 - 21
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Topics
General Introduction to Embedded Systems
Hardware Platforms and Components
! System Specialization
! Application Specific Instruction Sets
• Micro Controller
• Digital Signal Processors and VLIW
! Programmable Hardware
! ASICs
! System-on-Chip
1 - 22
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Implementation Alternatives
Performance
Power Efficiency Flexibility
Application-specific integrated circuits (ASICs)
Application-specific instruction set processors
(ASIPs)
• Microcontroller
• DSPs (digital signal processors)
General-purpose processors
Programmable hardware
• FPGA (field-programmable gate arrays)
1 - 23
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
General-purpose Processors
High performance
! Highly optimized circuits and technology
! Use of parallelism
• superscalar: dynamic scheduling of instructions
• super-pipelining: instruction pipelining, branch prediction,
speculation
! complex memory hierarchy
Not suited for real-time applications
! Execution times are highly unpredictable because of
intensive resource sharing and dynamic decisions
Properties
! Good average performance for large application mix
! High power consumption
1 - 24
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Pentium P4
1 - 25
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
System Specialization
The main difference between general purpose highest
volume microprocessors and embedded systems is
specialization.
Specialization should respect flexibility
! application domain specific systems shall cover a class of
applications
! some flexibility is required to account for late changes,
debugging
System analysis required
! identification of application properties which can be used for
specialization
! quantification of individual specialization effects
1 - 26
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Example: Code-size Efficiency
CISC machines: RISC machines designed for run-time-,
not for code-size-efficiency.
Compression techniques: key idea
(de)compressor
1 - 27
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Example: Multimedia-Instructions
Multimedia instructions exploit that many registers, adders etc are
quite wide (32/64 bit), whereas most multimedia data types are
narrow
(e.g. 8 bit per color, 16 bit per audio sample per channel)
" 2-8 values can be stored per register and added. E.g.:
+
4 additions per instruction;
carry disabled at word
boundaries.
1 - 28
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Example: Heterogeneous registers
MR
MF
MX MY
*
+,-AR
AF
AX AY
+,-,..
D
P
Address
generation
unit (AGU)
Address-
registers
A0, A1, A2 ..
Different functionality of registers An, AX, AY, AF,MX, MY, MF, MR
Example (ADSP 210x):
1 - 29
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Example: Multiple memory banks or memories
MR
MF
MX MY
*
+,-AR
AF
AX AY
+,-,..
D
P
Address
generation
unit (AGU)
Address-
registers
A0, A1, A2 ..
Simplifies parallel fetches
1 - 30
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Example: Address generation units
• Data memory can only be fetched
with address contained in A,
• but this can be done in parallel with
operation in main data path (takes
effectively 0 time).
• A := A ± 1 also takes 0 time,
• same for A := A ± M;
Example (ADSP 210x):
1 - 31
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Example: Modulo addressing
Modulo addressing:
Am++ ≡ Am:=(Am+1) mod n
(implements ring or circular
buffer in memory)
..
x[t1-1]
x[t1]
x[t1-n+1]
x[t1-n+2]
..
Memory, t=t1 Memory, t2=t1+1
sliding window
x
t1
t
n most
recent
values
..
x[t1-1]
x[t1]
x[t1+1]
x[t1-n+2]
..
1 - 32
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Topics
General Introduction to Embedded Systems
Hardware Platforms and Components
! System Specialization
! Application Specific Instruction Sets
• Micro Controller
• Digital Signal Processors and VLIW
! Programmable Hardware
! ASICs
! System-on-Chip
1 - 33
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Control Dominated Systems
Reactive systems with event driven behavior
Underlying semantics of system description (“input model
of computation”) typically (coupled) Finite State Machines
I/O
signals
output
signals
output
signals
1 - 34
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Microcontroller
control-dominant applications
! supports process scheduling
and synchronization
! preemption (interrupt),
context switch
! short latency times
low power consumption
peripheral units often
integrated
suited for real-time
applications
8051 core
SIECO51 (Siemens)
Major System Components
1 - 35
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Topics
General Introduction to Embedded Systems
Hardware Platforms and Components
! System Specialization
! Application Specific Instruction Sets
• Micro Controller
• Digital Signal Processors and VLIW
! Programmable Hardware
! ASICs
! System-on-Chip
1 - 36
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Data Dominated Systems
Streaming oriented systems with mostly periodic
behavior
Underlying semantics of input description e.g. flow
graphs (“input model of computation”)
Application examples: signal processing, control
engineering
BBf1 f2 f3
f2
B B
B
B: buffer
1 - 37
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Digital Signal Processor
optimized for data-flow applications
suited for simple control flow
parallel hardware units (VLIW)
specialized instruction set
high data throughput
zero-overhead loops
specialized memory
suited for real-time
applications
Major System Components
1 - 38
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
MAC (multiply & accumulate)
sum = 0.0;
for (i=0; i<N; i++)
sum = sum + a[i]*b[i];
LDF 0, R0
LDF 0, R1
RPTS N
MPYF3 *(AR0)++, *(AR1)++, R0
|| ADDF3 R0, R1, R1
TMS320C3x Assembler
(Texas Instruments)
MAC - Instruktion
zero-overhead loop
(repeat next instruction N times)
1 - 39
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Very Long Instruction Word (VLIW)
Key idea: detection of possible parallelism to be done by
compiler, not by hardware at run-time (inefficient).
VLIW: parallel operations (instructions) encoded in one long
word (instruction packet), each instruction controlling one
functional unit. E.g.:
Key idea: detection of possible parallelism to be done by
compiler, not by hardware at run-time (inefficient).
VLIW: parallel operations (instructions) encoded in one long
word (instruction packet), each instruction controlling one
functional unit. E.g.:
1 - 40
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Example: Philips TriMedia TM1000
Audio Out
I2C Interface
VLIW
CPU
32K
I$
16K
D$
VLD
Coprocessor
Video Out
Timers
Synchronous
Serial
Interface
Image
Coprocessor
PCI Interface
TM - 1000
Main Memory
Interface
SDRAM
Video In
Audio In
PCI (32 bits, 33 MHz)
Down & up scaling
YUV → RGB
50 Mpix/sec
V.34 or ISDN
Front End
CCIR60/656
YUV 4:2:2
80 MHz (40 Mpix/sec)
Huffman decoder
Slice-at-a-time
MPEG-1 & 2
32 bits data
400 MB/sec
CCIR601/656
YUV 4:2:2
38 MHz (19 Mpix/sec)
Stereo digital audio
I2S DC-100 kHz
2/4/6/8 ch. digital audio
I2S DC-100 kHz
I2C bus to
camera, etc.
©Rolf Ernst
1 - 41
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Topics
General Introduction to Embedded Systems
Hardware Platforms and Components
! System Specialization
! Application Specific Instruction Sets
• Micro Controller
• Digital Signal Processors and VLIW
! Programmable Hardware
! ASICs
! System-on-Chip
1 - 42
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
FPGA – Basic Strucutre
Logic Units
I/O Units
Connections
1 - 43
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
FPGA - Classification
Granularity of logic units:
! Gate, tables, memory, functional blocks (ALU, control, data
path, processor)
Communication network:
! Crossbar, hierarchical mesh, tree
Reconfiguration:
! fixed at production time, once at design time, dynamic during
run-time
1 - 44
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Floor-plan of VIRTEX II FPGAs
1 - 45
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Virtex
Logic Cell
[© and source: Xilinx Inc.: Virtex-II
Pro™ Platform FPGAs:
Functional Description, Sept.
2002, //www.xilinx.com]
1 - 46
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Virtex II Pro
Devices include
up to 4 PowerPC
processor cores
[© and source: Xilinx Inc.: Virtex-II Pro™ Platform
FPGAs: Functional Description, Sept. 2002,
//www.xilinx.com]
1 - 47
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Topics
General Introduction to Embedded Systems
Hardware Platforms and Components
! System Specialization
! Application Specific Instruction Sets
• Micro Controller
• Digital Signal Processors and VLIW
! Programmable Hardware
! ASICs
! System-on-Chip
1 - 48
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Application Specific Circuits (ASICS)
Custom-designed circuits necessary
! if ultimate speed or
! energy efficiency is the goal and
! large numbers can be sold.
Approach suffers from
! long design times,
! lack of flexibility
(changing standards) and
! high costs
(e.g. Mill. $ mask costs).
1 - 49
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Topics
General Introduction to Embedded Systems
Hardware Platforms and Components
! System Specialization
! Application Specific Instruction Sets
• Micro Controller
• Digital Signal Processors and VLIW
! Programmable Hardware
! ASICs
! System-on-Chip
1 - 50
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
Configurable System-On-Chip
1 - 51
Swiss Federal
Institute of Technology
Computer Engineering
and Networks Laboratory
System-on-a-Chip
Tensilica synthesized and
Confgurable microprocessor
(Soft IP)
[NTNU]

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1 es introduction

  • 1. 1 - 1 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory 1. Introduction to Embedded System Design © Lothar Thiele ETH Zurich, Switzerland
  • 2. 1 - 2 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Contents of Lectures (Lothar Thiele) 1. Introduction to Embedded System Design 2. Software for Embedded Systems 3. Real-Time Scheduling 4. Design Space Exploration 5. Performance Analysis The slides contain material from the “Embedded System Design” Book and Lecture of Peter Marwedel and from the “Hard Real-Time Computing Systems” Book of Giorgio Buttazzo.
  • 3. 1 - 3 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Topics General Introduction to Embedded Systems Hardware Platforms and Components ! System Specialization ! Application Specific Instruction Sets • Micro Controller • Digital Signal Processors and VLIW ! Programmable Hardware ! ASICs ! System-on-Chip
  • 4. 1 - 4 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Main reason for buying is not information processing Embedded systems (ES) = information processing systems embedded into a larger product Examples: Embedded Systems
  • 5. 1 - 5 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Embedded Systems external process embedded system human interface sensors, actuators
  • 6. 1 - 6 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Examples of Embedded Systems Car as an integrated control-, communication and information system. ABS gear box motor control climate control information
  • 7. 1 - 7 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Examples of Embedded Systems Consumer electronics, for example MP3 Audio, digital camera, home electronics, … . sensors actuators user interface processor
  • 8. 1 - 8 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Examples of Embedded Systems Production systems
  • 9. 1 - 9 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Examples of Embedded Systems Information systems, for example wireless communication (mobile phone, Wireless LAN, …), end-user equipment, router, …
  • 10. 1 - 10 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Communicating Embedded Systems Example: BTnodes (http://www.btnode.ethz.ch) ! complete platform including OS ! especially suited for pervasive computing applications Sensor Actuator
  • 11. 1 - 11 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory BTnode Platform generic platform for ad-hoc computing complete platform including OS especially suited for pervasive computing applications Communication via Bluetooth Transceiver Data Interfaces Microprocessor and Memory Batteries 2nd Radio
  • 12. 1 - 12 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Communicating Embedded Systems ! sensor networks (civil engineering, buildings, environmental monitoring, traffic, emergency situations) ! smart products, wearable/ubiquitous computing MICSMICS
  • 13. 1 - 13 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Characteristics of Embedded Systems (1) Must be dependable: ! Reliability: R(t) = probability of system working correctly provided that is was working at t=0 ! Maintainability: M(d) = probability of system working correctly d time units after error occurred. ! Availability: probability of system working at time t ! Safety: no harm to be caused ! Security: confidential and authentic communication Even perfectly designed systems can fail if the assumptions about the workload and possible errors turn out to be wrong. Making the system dependable must not be an after-thought, it must be considered from the very beginning.
  • 14. 1 - 14 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Characteristics of Embedded Systems (2) Must be efficient: ! Energy efficient ! Code-size efficient (especially for systems on a chip) ! Run-time efficient ! Weight efficient ! Cost efficient Dedicated towards a certain application: Knowledge about behavior at design time can be used to minimize resources and to maximize robustness. Dedicated user interface (no mouse, keyboard and screen).
  • 15. 1 - 15 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Characteristics of Embedded Systems (3) Many ES must meet real-time constraints: ! A real-time system must react to stimuli from the controlled object (or the operator) within the time interval dictated by the environment. ! For real-time systems, right answers arriving too late (or even too early) are wrong. „A real-time constraint is called hard, if not meeting that constraint could result in a catastrophe“ [Kopetz, 1997]. ! All other time-constraints are called soft. ! A guaranteed system response has to be explained without statistical arguments.
  • 16. 1 - 16 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Characteristics of Embedded Systems (4) Frequently connected to physical environment through sensors and actuators, Hybrid systems (analog + digital parts). Typically, ES are reactive systems: „A reactive system is one which is in continual interaction with is environment and executes at a pace determined by that environment“ [Bergé, 1995] ! Behavior depends on input and current state. " automata model often appropriate,
  • 17. 1 - 17 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Comparison Embedded Systems ! Few applications that are known at design-time. ! Not programmable by end user. ! Fixed run-time requirements (additional computing power not useful). ! Criteria: • cost • power consumption • predictability • … General Purpose Computing ! Broad class of applications. ! Programmable by end user. ! Faster is better. ! Criteria: • cost • average speed
  • 18. 1 - 18 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Topics General Introduction to Embedded Systems Hardware Platforms and Components ! System Specialization ! Application Specific Instruction Sets • Micro Controller • Digital Signal Processors and VLIW ! Programmable Hardware ! ASICs ! System-on-Chip
  • 19. 1 - 19 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Embedded System Hardware Embedded system hardware is frequently used in a loop („hardware in a loop“): actuators embedded system this course
  • 20. 1 - 20 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Typical Architecture Microprocessor • 4, 8, 16, 32, 4 bit bus • CISC, RISC, DSP • Integrated peripherals • Debug/Test Port • Caches • Pipeline • Multiprocessing Systems DEBUG Port Non-volatile memory • EPROM, FLASH, DISK • Hybrid Volatile Memory • DRAM, SRAM • Hybrid Custom Devices • ASIC • FPGA • PAL Standard Devices • I/O Ports • Peripheral Controllers Communication Devices • Ethernet • RS-232 • SCSI • Centronics • Proprietary Microprocessor Bus • Custom • PCI • VME • PC-102 System Clocks • RTC circuitry • System clocks • Integrated in uC • Imported/Exported Peripheral Bus Software • Application Code • Driver Code / BIOS • Real Time Operating System • User Interface • Communications Protocol Stacks • C, C++, Assembly Language, ADA • Legacy Code ToOutsideWorld
  • 21. 1 - 21 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Topics General Introduction to Embedded Systems Hardware Platforms and Components ! System Specialization ! Application Specific Instruction Sets • Micro Controller • Digital Signal Processors and VLIW ! Programmable Hardware ! ASICs ! System-on-Chip
  • 22. 1 - 22 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Implementation Alternatives Performance Power Efficiency Flexibility Application-specific integrated circuits (ASICs) Application-specific instruction set processors (ASIPs) • Microcontroller • DSPs (digital signal processors) General-purpose processors Programmable hardware • FPGA (field-programmable gate arrays)
  • 23. 1 - 23 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory General-purpose Processors High performance ! Highly optimized circuits and technology ! Use of parallelism • superscalar: dynamic scheduling of instructions • super-pipelining: instruction pipelining, branch prediction, speculation ! complex memory hierarchy Not suited for real-time applications ! Execution times are highly unpredictable because of intensive resource sharing and dynamic decisions Properties ! Good average performance for large application mix ! High power consumption
  • 24. 1 - 24 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Pentium P4
  • 25. 1 - 25 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory System Specialization The main difference between general purpose highest volume microprocessors and embedded systems is specialization. Specialization should respect flexibility ! application domain specific systems shall cover a class of applications ! some flexibility is required to account for late changes, debugging System analysis required ! identification of application properties which can be used for specialization ! quantification of individual specialization effects
  • 26. 1 - 26 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Example: Code-size Efficiency CISC machines: RISC machines designed for run-time-, not for code-size-efficiency. Compression techniques: key idea (de)compressor
  • 27. 1 - 27 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Example: Multimedia-Instructions Multimedia instructions exploit that many registers, adders etc are quite wide (32/64 bit), whereas most multimedia data types are narrow (e.g. 8 bit per color, 16 bit per audio sample per channel) " 2-8 values can be stored per register and added. E.g.: + 4 additions per instruction; carry disabled at word boundaries.
  • 28. 1 - 28 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Example: Heterogeneous registers MR MF MX MY * +,-AR AF AX AY +,-,.. D P Address generation unit (AGU) Address- registers A0, A1, A2 .. Different functionality of registers An, AX, AY, AF,MX, MY, MF, MR Example (ADSP 210x):
  • 29. 1 - 29 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Example: Multiple memory banks or memories MR MF MX MY * +,-AR AF AX AY +,-,.. D P Address generation unit (AGU) Address- registers A0, A1, A2 .. Simplifies parallel fetches
  • 30. 1 - 30 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Example: Address generation units • Data memory can only be fetched with address contained in A, • but this can be done in parallel with operation in main data path (takes effectively 0 time). • A := A ± 1 also takes 0 time, • same for A := A ± M; Example (ADSP 210x):
  • 31. 1 - 31 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Example: Modulo addressing Modulo addressing: Am++ ≡ Am:=(Am+1) mod n (implements ring or circular buffer in memory) .. x[t1-1] x[t1] x[t1-n+1] x[t1-n+2] .. Memory, t=t1 Memory, t2=t1+1 sliding window x t1 t n most recent values .. x[t1-1] x[t1] x[t1+1] x[t1-n+2] ..
  • 32. 1 - 32 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Topics General Introduction to Embedded Systems Hardware Platforms and Components ! System Specialization ! Application Specific Instruction Sets • Micro Controller • Digital Signal Processors and VLIW ! Programmable Hardware ! ASICs ! System-on-Chip
  • 33. 1 - 33 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Control Dominated Systems Reactive systems with event driven behavior Underlying semantics of system description (“input model of computation”) typically (coupled) Finite State Machines I/O signals output signals output signals
  • 34. 1 - 34 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Microcontroller control-dominant applications ! supports process scheduling and synchronization ! preemption (interrupt), context switch ! short latency times low power consumption peripheral units often integrated suited for real-time applications 8051 core SIECO51 (Siemens) Major System Components
  • 35. 1 - 35 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Topics General Introduction to Embedded Systems Hardware Platforms and Components ! System Specialization ! Application Specific Instruction Sets • Micro Controller • Digital Signal Processors and VLIW ! Programmable Hardware ! ASICs ! System-on-Chip
  • 36. 1 - 36 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Data Dominated Systems Streaming oriented systems with mostly periodic behavior Underlying semantics of input description e.g. flow graphs (“input model of computation”) Application examples: signal processing, control engineering BBf1 f2 f3 f2 B B B B: buffer
  • 37. 1 - 37 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Digital Signal Processor optimized for data-flow applications suited for simple control flow parallel hardware units (VLIW) specialized instruction set high data throughput zero-overhead loops specialized memory suited for real-time applications Major System Components
  • 38. 1 - 38 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory MAC (multiply & accumulate) sum = 0.0; for (i=0; i<N; i++) sum = sum + a[i]*b[i]; LDF 0, R0 LDF 0, R1 RPTS N MPYF3 *(AR0)++, *(AR1)++, R0 || ADDF3 R0, R1, R1 TMS320C3x Assembler (Texas Instruments) MAC - Instruktion zero-overhead loop (repeat next instruction N times)
  • 39. 1 - 39 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Very Long Instruction Word (VLIW) Key idea: detection of possible parallelism to be done by compiler, not by hardware at run-time (inefficient). VLIW: parallel operations (instructions) encoded in one long word (instruction packet), each instruction controlling one functional unit. E.g.: Key idea: detection of possible parallelism to be done by compiler, not by hardware at run-time (inefficient). VLIW: parallel operations (instructions) encoded in one long word (instruction packet), each instruction controlling one functional unit. E.g.:
  • 40. 1 - 40 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Example: Philips TriMedia TM1000 Audio Out I2C Interface VLIW CPU 32K I$ 16K D$ VLD Coprocessor Video Out Timers Synchronous Serial Interface Image Coprocessor PCI Interface TM - 1000 Main Memory Interface SDRAM Video In Audio In PCI (32 bits, 33 MHz) Down & up scaling YUV → RGB 50 Mpix/sec V.34 or ISDN Front End CCIR60/656 YUV 4:2:2 80 MHz (40 Mpix/sec) Huffman decoder Slice-at-a-time MPEG-1 & 2 32 bits data 400 MB/sec CCIR601/656 YUV 4:2:2 38 MHz (19 Mpix/sec) Stereo digital audio I2S DC-100 kHz 2/4/6/8 ch. digital audio I2S DC-100 kHz I2C bus to camera, etc. ©Rolf Ernst
  • 41. 1 - 41 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Topics General Introduction to Embedded Systems Hardware Platforms and Components ! System Specialization ! Application Specific Instruction Sets • Micro Controller • Digital Signal Processors and VLIW ! Programmable Hardware ! ASICs ! System-on-Chip
  • 42. 1 - 42 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory FPGA – Basic Strucutre Logic Units I/O Units Connections
  • 43. 1 - 43 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory FPGA - Classification Granularity of logic units: ! Gate, tables, memory, functional blocks (ALU, control, data path, processor) Communication network: ! Crossbar, hierarchical mesh, tree Reconfiguration: ! fixed at production time, once at design time, dynamic during run-time
  • 44. 1 - 44 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Floor-plan of VIRTEX II FPGAs
  • 45. 1 - 45 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Virtex Logic Cell [© and source: Xilinx Inc.: Virtex-II Pro™ Platform FPGAs: Functional Description, Sept. 2002, //www.xilinx.com]
  • 46. 1 - 46 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Virtex II Pro Devices include up to 4 PowerPC processor cores [© and source: Xilinx Inc.: Virtex-II Pro™ Platform FPGAs: Functional Description, Sept. 2002, //www.xilinx.com]
  • 47. 1 - 47 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Topics General Introduction to Embedded Systems Hardware Platforms and Components ! System Specialization ! Application Specific Instruction Sets • Micro Controller • Digital Signal Processors and VLIW ! Programmable Hardware ! ASICs ! System-on-Chip
  • 48. 1 - 48 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Application Specific Circuits (ASICS) Custom-designed circuits necessary ! if ultimate speed or ! energy efficiency is the goal and ! large numbers can be sold. Approach suffers from ! long design times, ! lack of flexibility (changing standards) and ! high costs (e.g. Mill. $ mask costs).
  • 49. 1 - 49 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Topics General Introduction to Embedded Systems Hardware Platforms and Components ! System Specialization ! Application Specific Instruction Sets • Micro Controller • Digital Signal Processors and VLIW ! Programmable Hardware ! ASICs ! System-on-Chip
  • 50. 1 - 50 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Configurable System-On-Chip
  • 51. 1 - 51 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory System-on-a-Chip Tensilica synthesized and Confgurable microprocessor (Soft IP) [NTNU]