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MODULE IV
Digital signal processor: Digital signal processor and its design
issues, evolving architecture of DSP, next generation DSP.
Customizable processors: Customizable
processors and processor customization, A
benefit analysis of processor customization,
use of microprocessor cores in SOC design,
benefits of microprocessor extensibility.
 Design effort:
◦ Silicon capacity and design-automation tools:
 Past, 100K gates to Blocks of 500K gates
 Recently, many millions of gates
 Verification difficulty:
◦ internal complexity of a typical logic block
◦ 90% of development effort on verification
 Cost of fixing bugs:
◦ The cost of fixing an SOC design bug is rising.
◦ Higher staff costs caused by growing design teams,
bigger NRE fees, and lost profitability and market
share make show-stopper design bugs intolerable.
 Late hardware/software integration:
◦ overall program delays
 Complexity and change in standards:
◦ Standard communication protocols are growing
rapidly in complexity.
◦ The need to conserve scarce communications
spectrum plus the inventiveness of modern
protocol designers has resulted in the creation of
complex new standards such as the
 IPv6 Internet Protocol packet forwarding,
 G.729 voice coding,
 JPEG2000 image compression,
 MPEG4 video,
 and Rjindael AES encryption.
 The general-purpose, firmware-programmable
embedded processor cores with fixed ISAs can
handle many tasks, they often lack the
bandwidth needed to perform complex data-
processing tasks such as
◦ network packet processing, video processing, and
encryption.
 To meet aggressive performance goals, chip
designers have long turned to hardwired logic
to implement these key functions.
 As the complexity and bandwidth
requirements of electronic systems increase,
the total amount of logic rises steadily.
 To develop system designs with
significantly fewer resources by making it
much easier to design the chips in those
systems
 Making SOCs sufficiently flexible so every
new system design doesn’t require a new
SOC design.
 Solution : Using microprocessor cores in
SOC design
◦ Single processor challenges
◦ Preferable Multi core
 Make the SOC sufficiently flexible so that one
chip design will efficiently serve 10, or 100,
or 1000 different system designs while giving
up none or, at most, a few of the benefits of
integration.
 The specialized nature of individual
embedded applications creates two issues for
general-purpose embedded processor cores
executing data intensive tasks.
 First, there is a poor match between the
critical functions of many embedded
applications (e.g. image, audio, and protocol
processing) and a processor’s basic integer
ISA (instruction set and register file).
 Second, specialized embedded devices
cannot take full advantage of a general-
purpose processor’s broad capabilities.
 A fully featured configurable and extensible
processor consists of a processor design and a
design-tool environment.
 Adding major processor functions, thus tuning
the processor core to specific application
requirements.
 An important superset of configurable
processors is the extensible processor – a
processor whose functions, especially its
instruction set, can be extended by the SOC
design team to include features never considered
or imagined by processor’s original designers.
 Changing the processor’s instruction set,
memories and interfaces can significantly
improve the core’s efficiency and
performance, particularly for the data-
intensive applications that represent the
“heavy lifting” for many embedded systems.
 Configurable:
◦ Its features can be pruned or augmented by
parametric selection.
◦ Configurable processors can be implemented in
many different hardware forms, ranging from
ASICs to FPGAs
 Extensible processors :
◦ Processors whose functions, especially the
instruction set, can be extended by the
application developer to include features never
considered by the original processor designer –
are an important superset of configurable
processors.
 For both configurable and extensible processors, the
usefulness of the configurability and extensibility is
strongly tied to the automatic availability of both
hardware implementation and the software
environment.
 Configuration or extension of the processor’s
hardware are without synchronized enhancement of
the
◦ compiler, assembler, simulator, debugger, real-time
operating systems, and other software support tools
 Violates the promises of performance and flexibility
through configurability unfulfilled, because the new
enhanced processor could not be programmed very
easily.
 Extensible processor
 Additions, deletions, and modifications to
memories,
 To external bus widths and handshake
protocols, and
 To commonly used processor peripherals.
 Changing the processor’s instruction set,
memories and interfaces can significantly
improve the core’s efficiency and
performance, particularly for the data-
intensive applications

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Lect3_ customizable.pptx

  • 1. MODULE IV Digital signal processor: Digital signal processor and its design issues, evolving architecture of DSP, next generation DSP. Customizable processors: Customizable processors and processor customization, A benefit analysis of processor customization, use of microprocessor cores in SOC design, benefits of microprocessor extensibility.
  • 2.
  • 3.  Design effort: ◦ Silicon capacity and design-automation tools:  Past, 100K gates to Blocks of 500K gates  Recently, many millions of gates  Verification difficulty: ◦ internal complexity of a typical logic block ◦ 90% of development effort on verification
  • 4.  Cost of fixing bugs: ◦ The cost of fixing an SOC design bug is rising. ◦ Higher staff costs caused by growing design teams, bigger NRE fees, and lost profitability and market share make show-stopper design bugs intolerable.
  • 5.  Late hardware/software integration: ◦ overall program delays  Complexity and change in standards: ◦ Standard communication protocols are growing rapidly in complexity. ◦ The need to conserve scarce communications spectrum plus the inventiveness of modern protocol designers has resulted in the creation of complex new standards such as the  IPv6 Internet Protocol packet forwarding,  G.729 voice coding,  JPEG2000 image compression,  MPEG4 video,  and Rjindael AES encryption.
  • 6.  The general-purpose, firmware-programmable embedded processor cores with fixed ISAs can handle many tasks, they often lack the bandwidth needed to perform complex data- processing tasks such as ◦ network packet processing, video processing, and encryption.  To meet aggressive performance goals, chip designers have long turned to hardwired logic to implement these key functions.
  • 7.  As the complexity and bandwidth requirements of electronic systems increase, the total amount of logic rises steadily.
  • 8.  To develop system designs with significantly fewer resources by making it much easier to design the chips in those systems  Making SOCs sufficiently flexible so every new system design doesn’t require a new SOC design.  Solution : Using microprocessor cores in SOC design ◦ Single processor challenges ◦ Preferable Multi core
  • 9.  Make the SOC sufficiently flexible so that one chip design will efficiently serve 10, or 100, or 1000 different system designs while giving up none or, at most, a few of the benefits of integration.  The specialized nature of individual embedded applications creates two issues for general-purpose embedded processor cores executing data intensive tasks.
  • 10.  First, there is a poor match between the critical functions of many embedded applications (e.g. image, audio, and protocol processing) and a processor’s basic integer ISA (instruction set and register file).  Second, specialized embedded devices cannot take full advantage of a general- purpose processor’s broad capabilities.
  • 11.  A fully featured configurable and extensible processor consists of a processor design and a design-tool environment.  Adding major processor functions, thus tuning the processor core to specific application requirements.  An important superset of configurable processors is the extensible processor – a processor whose functions, especially its instruction set, can be extended by the SOC design team to include features never considered or imagined by processor’s original designers.
  • 12.  Changing the processor’s instruction set, memories and interfaces can significantly improve the core’s efficiency and performance, particularly for the data- intensive applications that represent the “heavy lifting” for many embedded systems.
  • 13.  Configurable: ◦ Its features can be pruned or augmented by parametric selection. ◦ Configurable processors can be implemented in many different hardware forms, ranging from ASICs to FPGAs  Extensible processors : ◦ Processors whose functions, especially the instruction set, can be extended by the application developer to include features never considered by the original processor designer – are an important superset of configurable processors.
  • 14.
  • 15.  For both configurable and extensible processors, the usefulness of the configurability and extensibility is strongly tied to the automatic availability of both hardware implementation and the software environment.  Configuration or extension of the processor’s hardware are without synchronized enhancement of the ◦ compiler, assembler, simulator, debugger, real-time operating systems, and other software support tools  Violates the promises of performance and flexibility through configurability unfulfilled, because the new enhanced processor could not be programmed very easily.
  • 16.  Extensible processor  Additions, deletions, and modifications to memories,  To external bus widths and handshake protocols, and  To commonly used processor peripherals.  Changing the processor’s instruction set, memories and interfaces can significantly improve the core’s efficiency and performance, particularly for the data- intensive applications