SOC Design Challenges and Practices


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Keynote Speaker Slides
SoC Design Challenges and Practices
VGST-VTU Sponsored Workshop
MS Engineering College
July 10th 2013

Published in: Education, Technology, Business

SOC Design Challenges and Practices

  1. 1. India’s first college-preparatory school Keynote Address SoC Challenges and Practices Prof Shivananda R Koteshwar
  2. 2. IBM Simon (1993) The first SMART Phone! IBM's Simon predates the term "smartphone" (it was coined by Ericsson's GS88 prototype), but it's widely considered the first true smartphone. And Big Blue's mobile device was BIG -- the comically (by today's standards) large mobile phone-PDA combination stretched 8 inches long and featured a 4.5-inch black- and-white touchscreen display (yes, a touchscreen!). Additionally, the device ran familiar applications: email, calendar, address book, calculator, note pad and a stylus input for handwritten notes. The Simon was first introduced at 1992's Comdex, but with a whopping price tag of $899 and a target audience that hadn't fully embraced the laptop computer, IBM's smartphone failed to take off. But it certainly set the stage for future innovation. Dimensions: 8 inches by 2.5 inches by 1.5 inches thick Weight : 18 ounces Processor : 16 MHz Vadem processor Memory : 1 MB Storage : 1 MB Battery Life: 1 hour, if you were lucky
  3. 3. Samsung Galaxy S4 Just the beginning! Who needs quad core when you can jump right to a whopping eight cores? Samsung's Galaxy S4 is the first smartphone with an octo-core processor. The international version of the device runs Samsung's own Exynos 5 Octa chip, which comes with a faster 1.6 quad-core ARM Cortex-A15 cluster for heavy lifting and a slower 1.2 quad-core Cortex-A7 cluster for more energy efficiency, which reportedly gives the device longer battery life. (North American versions of the Galaxy S4 run on a 1.9 GHz quad-core processor from Qualcomm). To support that processing power, the Galaxy S4 gets more than double the RAM most phones have. Plus, the smartphone also has a Super AMOLED touchscreen display with 1080-x-1920 resolution and full HD video support. These are the kind of specs we used to see in laptops just a few years ago. Dimensions: 5.38 inches by 2.75 inches by 0.31 inch Weight : 4.6 ounces Processor : 1 GHz Nvidia Tegra 2 (dual core) Memory : 2 GB Storage : 16, 32 or 64 GB Battery Life: 14 hours of talk time
  4. 4. SoC It’s a complete Embedded System on a chip. The basic concept is to integrate more components into the same piece of silicon to reduce size and cost while enhancing performance. •  SoC stands for System on a Chip. Its not just an ASIC! •  Other closer definitions are System in Package (SIP), System on Silicon, System on a board, System on a Programmable Chip (SoPC) •  System here refers to Hardware and Software –  Hardware: •  Analog : ADC/DAC, PLL, TxRx, RF •  Digital : Processor, Interface, Accelerator •  Storage : SRAM, DRAM, FLASH, ROM –  Software •  RTOS, IP Device Driver, Application •  An SoC contains: Portable / reusable IP, Embedded CPU, Embedded Memory, Real World Interfaces (USB, PCI, Ethernet) Software (both on- chip and off) •  An SoC may contain: Programmable HW (FPGAs, Flash), Mixed-signal Blocks, Sensors
  5. 5. SoC vs. SiP System on a Chip vs. System in Package SiP •  Single package that includes one or more ICs •  Provides the option of combining different die technologies and applications •  Includes logic, memory and, possibly, analog or RF functions •  Packaging technology is used to minimize the size and maximize the functionality •  Chips of dissimilar materials and processes can be integrated relatively easily SoC •  IC dedicated to a specific application •  Includes a compute engine (microprocessor core, digital signal processor core or graphics core), memory and logic on a single chip •  There are two types of SOC devices: application specific integrated circuits (ASICs), which are sold to a single user; and application specific standard products (ASSPs), which are sold to more than one user
  6. 6. SoC vs. SiP
  7. 7. SoC vs. SoPC System on a Chip vs. System on a Programmable Chip •  Traditional system-on-a-chip (SoC) designs require the development of a custom IC or Application Specific Integrated Circuit (ASIC). •  Unfortunately, ASIC costs have risen dramatically in recent years along with the vast improvements in VLSI technology feature size and transistor counts. •  Only a few high volume embedded products can support long ASIC development times and high costs. As a consequence, the number of new traditional ASIC designs has fallen dramatically in recent years. •  A promising new alternative technology has emerged that enables designers to utilize a large FPGA that contains both memory and logic elements along with an intellectual property (IP) processor core to rapidly implement a computer and custom hardware for SoC embedded systems •  This new FPGA-based methodology is called system-on-a programmable- chip (SoPC).
  8. 8. Today’s Complexity
  9. 9. Success Metrics for transistors The silicon transistor continues to be at the heart of products •  Phase 1 PC Era –  Frequency (clock-speed) was the primary metric •  Phase 2 Consumer Era –  Central processing unit (CPU) was the primary chip that drove advancements in semiconductor technology for decades –  Multi Processor and Multi Core was the driver •  Phase 3 Mobile Era –  There wasn’t as much of a drive to integrate system-level functionality either on-chip (SoC) or in-package (SiP) –  Form-factor, cost and power for a given function are now critical drivers in the mobile market –  This in turn has increased the importance of on-chip integration of functional hardware (e.g. power management, computing, audio/video, graphics, GPS and radio) This shift from performance-centric chips to power-constrained chips and the focus on lowering cost and increasing system-level integration is poised to disrupt the traditional semiconductor landscape.
  10. 10. Benefits of using a SoC Cost, Performance, Power and Size! •  Reduce overall system cost •  Increase performance •  Lower power consumption •  Reduce size
  11. 11. Difference between ASIC & SoC ASIC Design Flow SoC Design Flow
  12. 12. SoC Design Flow
  13. 13. SoC Design Requirements •  Price, Performance and Power •  System Support & Portability –  IP reuse (Pre designed component) –  Architecture reuse (Using known platform) •  Open Industry Standard –  Standardization around data management and IP •  Testability •  Process Dependency •  Design Methodology –  Partition based on functionality –  Partition based on Hardware and Software components •  Modeling - Consistency and accuracy at different levels –  Continuum from a virtual prototype model to simulation, emulation and rapid prototyping –  Models used by software developers should be directly tied to implementation –  Simulators are only as good as the models •  Robustness of Tools
  14. 14. Challenges in SoC Era •  Complexity –  Silicon Complexity •  Impact of process scaling and new materials and architectures previously ignorable phenomena now have impact –  System complexity •  Reuse, Verification and test. cost-driven design optimization embedded software design, reliable implementation platforms, design process management together •  Deep submicron effects - Crosstalk electron migration, wire delays, mask costs etc •  Power Management •  System-level integration of heterogeneous technologies •  Development of SoC test methodology •  Verification
  15. 15. Needs of SoC Design Innovations that enable SoC integration which requires re-optimization of system, design and process technology
  16. 16. One of the Drivers
  17. 17. Cellphone, the main driver!
  18. 18. Cellphone, the main driver!
  19. 19. Cellphone, the main driver! •  Cell Phone is an integrated platforms providing seemingly disparate technologies that have come together to provide a new user experience •  There are about 6 billion mobile subscriptions today, growing to 9.1 billion in 2018, and about one billion smartphones, growing to 4.5 billion in 2018. •  The expected growth of network capacity in five years is expected to be 12X over what you have today, and 46% of that will be mobile traffic."
  20. 20. SoC Design Challenges IP Quality Testing equipment Limitations Verification IP Updates Integration Simulation Models Architecture Advance Process IP Completeness Deep submicron effects Time to Market Tools system partitioning IP reuse IP verification Test Methodology Power Management
  21. 21. Credits •  SoC Design Notes – Prof Anish Goel • • • • • • • • d_ID=3732 • 5%20Hamblen%20and%20Hall%20IJCA%20Sept %2006.pdf •  Images: – –
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  23. 23. 24 Thank You! Facebook: shivoo.koteshwar / Twitter: @shivookoteshwar