UNIT I.pptx

ITEL01 - EMBEDDED SYSTEMS
UNIT-I:
Introduction to Embedded Computing - Complex Systems and Microprocessors, The
EmbeddedSystemDesignProcess,FormalismsforSystemDesign,ModelTrainController.
InstructionSets-Preliminaries,ARMProcessor,TIC55xDSP
TEXTBOOKS
1. Wayne Wolf, “Computers as Components - Principles of Embedded Computing
System Design”
, Morgan Kaufmann Publisher (An imprint from Elsevier), Second
Edition ,2008.
REFERENCE BOOK(s):
1. David E.Simon, An Embedded Software Primer, Pearson Education Asia., 2000.
2. Sriram V.Iyer, Pankaj Gupta, Embedded Real‐time Systems Programming, Tata
McGraw Hill publishers, 2004.
3. D.Gajski, F.Vahid, S.Narayan, J.Gong, Specification and Design of Embedded
Systems, Prentice Hall of India Pvt. Ltd.
4. Raj Kamal, Embedded Systems Architecture & Programming, Tata McGraw-Hill.
1

Definition of an Embedded System
 An Embedded system is a system designed to perform one or few
dedicated functions often with real time computing constraints. It is
embedded as a part of a complete device often including hardware
(mechanical parts, electronic devices) and softwares.
Human
Interface
Processing
Unit
Actuator Sensors
RTOS
3

History of Embedded Computers
 Whirlwind- First computer designed to support real-time
operation at MIT
, USA in early 1950. It contains over 4000 vacuum
tubes.
Very Large Scale Integration (VLSI) technology allowed us to
as
embed a complete CPU on a single chip in 1970’s and termed
microprocessor.
 Intel 4004- First microprocessor designed to be used as
calculator.
an
Hp-35- First handheld calculator (Several chips are used to
implement the CPU).
Automobiles- Determining when spark plugs fire, controlling the
fuel/air mixture and so on. A high-end automobile may have 100
microprocessors,
microprocessors.
but even inexpensive cars today use 40
4

EMBEDDED SYSTEM = HARDWARE + SOFTWARE
Hardware Supply
Processor
Digital
I/O lines
Peripherals
ADC/DAC
Processor
1.
2.
3.
Microcontroller (C)
Digital signal processors (DSP)
FPGA core (VLSI)
SPI,I2C,SCI
PWM
Timer
Peripherals
MEMORY
, Serial Ports (SCI,SPI,CAN,USB),Parallel
Port, ADC (8/12/16/24bit), DAC, PWM etc..
5
+3 to 5 V
ALU
Memory

Classification of Microprocessors
 A 8-bit microcontroller- designed for low-cost applications and
includes on-board memory and I/O devices.
Eg: Atmel-
68HC11
AT89C51, Microchip-PIC 16F877, Motorolla-
 A 16-bit microcontroller- more sophisticated applications that
may require either longer word lengths or off-chip I/O and memory.
Eg: DsPIC, PIC24 Series
 A 32-bit RISC microprocessor- offers very high performance for
computation-intensive applications.
Eg: PIC 32 Series, ARM Processors (Series 7 and 9)
6

Advantage of Programmable CPU to Hardwired
Unit
 It is easier to design and debug.
 It allows the possibility of upgrades and using the CPU for other
purposes.
Why use Microprocessors?
 Microprocessors are a very efficient way to implement digital
systems.
 Microprocessors make it easier to design families of products.
Faster implementation of your application than designing your
own custom logic (Overhead in fetching, decoding and executing the
program is overcome by a single clock cycle instruction execution
and pipelining strategy).
 Many different algorithms can be implemented by simply
changing the program it executes.
 Low power consumption. 7

Functionality of Embedded Computing Systems
 Complex algorithms: Operations performed by the microprocessor
may be very sophisticated. Eg: In automobiles, microprocessor needs
to perform complicated filtering functions to optimize the
fuel
performance
utilization.
of the car while minimizing pollution and
 User interface: Multiple menus , displays, input terminals
(Keyboard, Touch screen). Eg: Moving maps in Global Positioning
System (GPS) navigation.
 Real time: Embedded computing operations must be performed to
meet deadlines. Failure to meet a deadline is unsafe and can even
endanger lives (Eg: Controlling brakes on wheel)
 Multirate: Embedded computing systems needs to support
different operational speeds (The audio and video portions of a
multimedia stream run at very different rates, but they must remain
closely synchronized)
8

Functionality of Embedded Computing Systems
 Manufacturing cost: Determined by many factors such as type of
microprocessor used, the amount of memory required and the type
of I/O devices.
 Power and energy: Power consumption directly affects the cost of
the hardware. Energy consumption affects battery life.
9

Challenges in Embedded Computing System Design
 How much hardware do we need?
Too little hardware and the system fails to meet its deadlines,
too much hardware and it becomes too expensive.
 How do we meet deadlines?
Speed up the hardware-makes system more expensive
Increasing the CPU clock rate may not make enough
difference to execution time, since the program speed may be limited
by the memory system.
 How do we minimize power consumption?
Excessive power consumption can increase heat dissipation.
Careful design is required to slow down the noncritical parts of the
machine for power consumption while still meeting necessary
performance goals.
10

Challenges in Embedded Computing System Design
 How do we design for upgradability?
Hardware platform may be used for different versions of a
product, with few or no changes. However we want to be able to add
features by changing software.
 Does it really work?
Reliability is especially important in some applications, such
as safety-critical systems.
Complex testing.
Limited observability and controllability- it is more difficult to
see what is going on inside the system (watch the values of electrical
signals if the embedded system does not come with keyboard and
screen).
Restricted
programming the
development environments-debugging and
embedded system is carried out using PC.
11

Performance in Embedded Computing
 The program must meet its deadline (is the time at which a
computation must be finished).
 Heart of embedded computing is real-time computing.
 A large, complex program running on a sophisticated
microprocessor, may or may not meet the deadline.
 Analyze the system at several different levels of abstraction. These
levels include,
CPU (pipelined processor with cache).
Platform (includes the bus and I/O devices).
Program (Programs are very large and the CPU sees only a
small window of the program at a time).
Multitasking (Task interaction with each other).
Multiprocessor (Interaction between the processors adds yet
more complexity to the analysis of overall system performan
12ce).

Embedded System Design Process-Design
Methodology
13

Methodology
 In bottom-up design approach, we start with components to build
a system. Decisions at one stage of design are based upon estimates
of what will happen later.
At each step in the design,
• We
• We
• We
must analyze the design (How we can meet the specifications).
must refine the design to add detail.
must verify the design to ensure that it still meets all system goals, such
as cost, speed and so on.
14

Methodology
 Requirement: What is needed? Or what we are designing.
Requirements may be functional or non-functional (performance,
cost- Manufacturing cost (components and assembly) and
nonrecurring engineering (NRE) costs (personnel and other costs of
designing the system), Physical size and weight and power
consumption-Battery powered systems).
 Specification: More detailed description of what we want. It does
not describe about, how the system is built (contains enough
information to begin designing the system architecture).
 Architecture: System’s internals begin to take shape.
 Components: Component identification with respect
architecture built.
 System integration: Connecting the components to
to the
build a
hardware and an
the hardware.
appropriate software needs to be integrated with
15

Methodology-Requirement
 Requirement: What is needed? Or what we are designing.
Requirements may be functional or non-functional (performance,
cost- Manufacturing cost (components and assembly) and
nonrecurring engineering (NRE) costs (personnel and other costs of
designing the system), Physical size and weight and power
consumption-Battery powered systems).
 Sample requirement form :
• Name (crystallize the purpose of the machine)
•Purpose (one or two line description of what the system is supposed to do)
• Inputs and Outputs (Type of data-Analog or Digital or Mechanical inputs,
Data characteristics- Periodic or occasional arriving of data and data size,
Types of I/O devices-Buttons or ADC or video displays)
• Functions (more detailed description of what the system does)
• Performance (computations must be performed within a time frame)
• Manufacturing cost (to have an idea of the eventual cost range)
16

 Sample requirement form (continued):
• Power (estimate the power consumed by the device, System will be battery
powered or plugged into the wall, Battery powered machines must be much
more careful about how they spend energy)
• Physical size and weight (give some indication of
system to help guide certain architectural decisions)
 Example 1: Requirement analysis of a GPS moving
navigation system
the physical size of the
map, a satellite based
17

 Functionality: for highway driving and similar uses, not nautical or
aviation uses that require more specialized databases and functions.
The system should show major roads and other landmarks available
in standard topographic databases.
 User Interface: The screen should have at least 400x600 pixel
resolution. The device should be controlled by no more than three
buttons. A menu system should pop up on the screen when buttons
are pressed to allow the user to
system.
make selections to control the
 Performance: The map should scroll smoothly. Upon power-up, a
display should take no more than one second to appear
, and the
system should be able to verify its position and display the current
map within 15 s.
18

 Cost: The selling cost (street price) of the unit should be no more
than $100.
 Physical size and weight: The device should fit comfortably in the
palm of the hand.
 Power consumption: The device should run for at least eight hours
on four AA batteries.
19

Methodology-Specification
 more specific (contracts between the customer and the architects)
 no faulty assumptions
 it should be understandable enough so that someone can verify
that it meets system requirements and overall expectations of the
customer.
Designers can run into several different types of problems caused
by unclear specifications like implementing the wrong functionality.
20

Methodology-Specification
 A specification of the GPS system would include several
components:
Data received from the GPS satellite constellation
 map data
 User interface
 Operations that must be performed to satisfy customer requests
 Background actions required to keep the system running, such as operating
the GPS receiver
21

Methodology-Architecture Design
 Describing how the system implements those functions
(specifications) is the purpose of the architecture
 The architecture is a plan for the overall structure of the system
 Architectural descriptions must be designed to satisfy both
functional and non functional (cost,
 Block diagram of the GPS moving
speed,
map
power) requirements.
22

23

 In hardware block diagram, a CPU is surrounded by memory and
I/O devices
 Two memories: a frame buffer for the pixels to be displayed and a
separate program/data memory for general use by the CPU
 In software block diagram, a timer has been added to control
when we read the buttons on the user interface and render data onto
the screen.
24

ESD Process-Design Methodology-Designing
Hardware and Software Components
 The component design effort builds those components in conformance
to the architecture and specification.
 The components will in general include both hardware-FPGAs, boards
and so on- and software modules.
 We can make use of standard components and software modules (Eg:
Standard topographic database- not only is the data in a predefined format,
but it is highly compresses to save storage)-saves us design time.
 We will also have to design some components (Eg: PCB design), custom
programming.
 We also must ensure that the system runs properly in real time and does
not occupy a large memory space than is allowed.
 The power consumption of moving map software is very important
(Memory accesses
transactions must
several times).
are a major source of power consumption, memory
be carefully planned to avoid reading the same data
25

ESD Process-Design Methodology-System
Integration
 Interconnect the components to build a system.
 Identify the bugs and rectify it.
 Building up the system in phases and running properly chosen
tests, we can often find bugs more easily.
Careful attention to inserting appropriate debugging facilities
during design can help ease system integration problems, but the
nature of embedded computing means that this phase will always be
a challenge.
26

Formalisms for System Design
 Unified Modeling Language (UML) is a visual language to
represent design tasks such as creating requirements, specifications,
architecting the system, designing code and designing tests.
 UML is useful because it encourages design by successive
refinement and progressively adding detail to the design, rather than
rethinking the design at each new level of abstraction.
 UML is an object-oriented modeling language. Two concepts of
importance are,
• encourages the design to be described as a number of interacting objects,
rather than a few large monolithic blocks of code.
• at least some of those objects will correspond to real pieces of software or
hardware in the system.
 UML is so rich, there are many graphical elements in a UML diagram.
27

Formalisms for System Design
 Object-oriented (OO) specification can be seen in two
complementary ways,
• allows a system to be described in a way that closely models real-world
objects and their interactions.
• provides a basic set of primitives that can
the
be used to describe systems with
particular attributes, irrespective of relationships of those systems
components to real world objects.
 UML can be of two categories,
•
•
Structural Description
Behavioral Description
28

 Basic components of the system.
 An object includes a set of attributes that define its internal state.
 UML for describing a display (CRT screen)
 Note: folded corner page icon- It does not correspond to an object
in the system and only serves a comment.
 The object is identified in two ways: It has a unique name, and it is
a member of a class
29

 A class is a form of type definition-all objects derived from the
same class have the same characteristics, although their attributes
may have different values. A class defines the attributes than an
object may have. It also defines the operations that determine how
the object interacts with the rest of the world.
30

 A class defines both the interface for a particular type of object
and that objects implementation.
 Several types of relationships that can exist between objects and
classes,
 Association occurs between objects that communicate with each other but
have no ownership relationship between them.
 Aggregation describes a complex object made of smaller objects.
 Composition is a type of aggregation in which the owner does not allow
access to the component objects.
 Generalization allows us to define one class in terms of another.
 UML allows to define one class in terms of another.
 A derived class inherits all the attributes and operations from its
base class.
31

 Inheritance has two purposes,
 allows us to succinctly describe one class that shares some characteristics
with another class.
 it captures those relationships between classes and documents.
 UML also allows us to define multiple inheritance, in which a class
is derived from more than one base class.
33

 A link describes a relationship between objects.
 Association is to link as class is to object.
34

 One way to specify the behavior of an operation is a state machine.
 State machines will not rely on the operation of a clock, as in
hardware, rather, changes from one state to another are triggered by
the occurrence of events.
 An event may originate from outside (pressing a button) or from
inside (when one routine finishes its computation and passes the
result on to another routine).
35

 Three types of events defined by UML,
 A signal is an asynchronous occurrence (<<signal>>- defined in UML).
 A call event follows the model of a procedure call in a programming
language.
 A time-out event causes the machine to leave a state after a certain amount
of time (tm(time-value)- defined in UML). The time-out is generally
implemented with an external timer.
36

38
 A sequence diagram is somewhat similar to a hardware timing diagram,
although the time flows vertically in a sequence diagram, whereas time typically
flows horizontally in a timing diagram.
 A sequence diagram is designed to show a particular scenario or choice of
events.

 The sequence shows what happens when a mouse click is on the menu region.
Processing includes three objects shown at the top of the diagram. Extending
below each object is its lifeline, a dashed line that shows how long the object is
alive.
 Focus of control in the sequence, that is, when the object is actively processing.
39

Instruction Sets
1. Preliminaries
2. ARM Processor
1/18/2023 42

1. Preliminaries
 In this we learn some style of computer architecture and
nature of assembly language
1. Computer Architecture Taxonomy
2. Assembly Language
1/18/2023 43

Computer Architecture Taxonomy
 The computing system consists of a central processing unit
(CPU) and a memory.
 The memory holds both data and instructions, and can be
read or written when given an address
1/18/2023 44

 A computer whose memory holds both data and instructions is
known as a von Neumann machine
 Registers
 Program counter (PC)
 stored-program computer
Harvard architecture
 Separate memories for data and program
 The PC points to program memory, not data memory
 It is harder to write self-modifying programs
1/18/2023 45

 Harvard architectures are widely used today for one very
simple reason:
 provides higher performance for digital signal
processing(Data memory and program memory)
 Processing signals in real-time places great strains on the
data access system in two ways:
1. Large amounts of data flow through the CPU
2. That data must be processed at precise intervals.
1/18/2023 46

 Data sets that arrive continuously and periodically are called
streaming data
 Having two memories with separate ports provides higher
memory bandwidth
 computer architectures relates to their instructions and how
they are executed
 CISC
 RISC
 Pipelined Processor
 Instructions can have a variety of characteristics, including:
1. Indexed versus variable length.
2. Addressing modes.
3. Numbers of operands.
4. Types of operations supported.
1/18/2023 47

• The set of registers available for use by programs is called the
programming model, also known as the programmer
model
• All the architectures must serve to define those
characteristics, but implementation may vary from
implementation to implementation.
• Different CPUs may offer different clock speeds, different
cache configurations, changes to the bus or interrupt lines,
and many other changes that can make one model of CPU
more attractive than another for any given application.
1/18/2023 48

Assembly Language
 Assembly languages usually share the same basic features:
1. One instruction appears per line.
2. Labels, which give names to memory locations, start in the
first column.
3. Instructions must start in the second column
4. Comments run from some designated comment character
1/18/2023 49

 Assembler
 Figure shows the format of an ARM data processing
instruction such as an ADD
ADDGT r0,r3,#5
1/18/2023 50

 The cond field would be set according to the GT condition
(1100)
 The opcode field would be set to the binary code for the ADD
instruction (0100)
 The first operand register Rn would be set to 3 to represent r3
 The destination register Rd would be set to 0 for r0,
 The operand 2 field would be set to the immediate value of 5
1/18/2023 52

 Assemblers must also provide some pseudo-ops
 A pseudo-op is one that allows data values to be loaded into
memory locations
 The ARM % pseudo-op allocates a block of memory of the
size specified by the operand and initializes those locations to
zero
1/18/2023 53

2 ARM PROCESSOR
 ARM is actually a family of RISC architectures that have been
developed over many years
 The textual description of instructions, as opposed to their
binary representation, is called an assembly language
 ARM instructions are written one per line, starting after the
first column
 Comments begin with a semicolon and continue to the end of
the line
 A label, which gives a name to a memory location,
 Here is an example:
LDR r0,[r8]; a comment
label ADD r4,r0,r1
1/18/2023 54

Processor and Memory Organization
 The ARM architecture are identified by different numbers
 ARM7 is a von Neumann architecture machine
 ARM9 uses a Harvard architecture
 The ARM architecture supports two basic types of data:
1. The standard ARM word is 32 bits long.
2. The word may be divided into four 8-bit bytes.
1/18/2023 55

 The ARM processor can be configured
1. little-endian mode (with the lowest-order byte residing in the
low-order bits of the word)
2. big-endian mode (the lowest-order byte stored in the highest
bits of the word)
1/18/2023 56

Data Operations
 ARM processor do operations (Arithmetic, logical) but not
directly on memory location
 ARM is a load-store architecture ( load in CPU then store
back to main memory)
 Figure shows the registers in the basic ARM programming
model
 ARM has 16 general-purpose registers, r0 through r15
 Except for r15, they are identical
 The r15 register has the same capabilities as the other registers,
but it is also used as the program counter
1/18/2023 57

1/18/2023 59
R0 to R12 are the general-purpose registers.
R13 is reserved for the programmer to use it as the stack pointer.
R14 is the link register which stores a subroutine return address.
R15 contains the program counter and is accessible by the
programmer.
CPSR: current program status register (32 bit)
Stores the status of the previous ALU operation.
4 flags
N = 1, if result was negative
Z = 1, if result was zero
C = 1, if result had a carry-out
V = 1, if result was an overflow These can be used to make decisions
later on.

 The other important basic register in the programming model
is the current program status register (CPSR)
 This register is set automatically during every operation
 The top four bits of the CPSR hold the following useful
information about the results of that arithmetic/logical
operation:
1. The negative (N)
2. The zero (Z)
3. The carry (C)
4. The overflow(V)
1/18/2023 60

Example 2.1 illustrates the computation of CPSR bits.
1/18/2023 61

 The basic form of a data instruction is simple
ADD r0,r1,r2
 Instructions may also provide immediate operands
 For example,
ADD r0,r1,#2
 The major data operations are summarized in Figure
1/18/2023 62

Arithmetic
 The arithmetic operations perform addition and subtraction
 The with-carry versions include the current value of the
carry bit in the computation
 RSB performs a subtraction with the order of the two operands
reversed
 RSB r0, r1,r2; sets r0 to be r2- r1
 The MLA instruction performs a multiply accumulate
operation, particularly useful in matrix operations and signal
processing
MLA r0,r1,r2,r3
 sets r0 to the value r1r2r3.
1/18/2023 64

Logical
 The bit-wise logical operations perform logical AND, OR,
and XOR operations
 The BIC instruction stands for bit clear
 BIC r0, r1, r2 sets r0 to r1 and not r2
 This instruction uses the second source operand as a mask
 Where a bit in the mask is 1, the corresponding bit in the first
source operand is cleared
1/18/2023 65

Shift / Rotate
 The shift modifier is always applied to the second source
operand
 A left shift moves bits up toward the MSB bits,
 while a right shift moves bits down to the LSB bit in the word
 The LSL and LSR modifiers perform left and right logical
shifts, filling the LSB bits of the operand with zeroes
 The ASR copies the sign bit—if the sign is 0, a 0 is copied,
while if the sign is 1, a 1 is copied
 The RRX modifier performs a 33-bit rotate
 With the CPSR’s C bit being inserted above the sign bit of
the word
 This allows the carry bit to be included in the rotation
1/18/2023 66

Comparison Instructions
 They do not modify general-purpose registers but only set the
values of the NZCV bits of the CPSR register
 The compare instruction CMP r0, r1 computes r0 – r1, sets the
status bits, and throws away the result of the subtraction
 CMN uses an addition to set the status bits
 TST performs a bit-wise AND on the operands
 While TEQ performs an exclusive-or.
1/18/2023 95

Move Instruction
 The MVN instruction complements the operand bits (one’s
complement) during the move
1/18/2023 96

Load and store instruction
 LDRB and STRB load and store bytes rather than whole
words
 While LDRH and SDRH operate on half-words
 LDRSH extends the sign bit on loading
1/18/2023 97

 An ARM address may be 32 bits long.
 The ARM load and store instructions do not directly refer to
main memory addresses
 Since a 32-bit address would not fit into an instruction that
included an op-code an operands
 Instead, the ARM uses register-indirect addressing
1/18/2023 98

Register-indirect addressing
 The value stored in the register is used as the address to be
fetched from memory
 The result of that fetch is the desired operand value
 From fig. set r1 0 X 100
1/18/2023 99

 The instruction
 LDR r0,[r1]
 Sets r0 to the value of memory location 0x100
 Similarly, STR r0,[r1] would store the contents of r0 in the
memory location whose address is given in r1
 There are several possible variations:
LDR r0,[r1, – r2]
1/18/2023 100

 Loads r0 from the address given by r1- r2, while
LDR r0,[r1, #4]
 Loads r0 from the address r1+4.
1/18/2023 101

Flow control
 B (Branch) Instruction
 The address that is the destination of the branch is often called
the branch target
 Branches are PC-relative—the branch specifies the offset
from the current PC value to the branch target
 B #100
will add 400 to the current PC value(offset is multiplied by four).
• The ARM allows any instruction, including branches, to be
executed conditionally
1/18/2023 103

Figure 2.15 summarizes the condition codes
1/18/2023 104

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