Digital Technique Mrs Sunita M Dol K-map Implementation
1. Digital Technique Mrs. Sunita M Dol
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HANDOUT#2
AIM:
Implementation of reduced boolean function using basic and universal gates (K-
map).
SOP Equation: 1.
2.
POS Equation: 1.
LEARNING OBJECTIVES:
- Reduced the Boolean function using K-map
- Implement the reduced Boolean function using basic gate AND, OR & NOT
- Implement the reduced Boolean function using universal gate NAND and
NOR.
COMPONENT REQUIRED:
- Logic gates (IC) trainer kit.
- Connecting patch chords.
- IC 7400, IC 7408, IC 7432, IC 7402, IC 7404, IC 7486
Sr. No. Component Specification
1 NOT gate IC7404
2 AND gate IC7408
3 OR gate IC7432
4 NAND gate IC 7400
5 NOR gate IC7402
6 EX-OR gate IC7486
THEORY:
Karnaugh map (K-map)
Karnaugh map (K-map) technique provides a systematic method for simplifying
and manipulating the Boolean expression. In this technique, the information
contained in the truth table or available in SOP or POS form is represented on K-
map. Figure shows K-map for two, three and four variables.
8. Digital Technique Mrs. Sunita M Dol
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Using NOR gate only
PROCEDURE:
1. Check the components for their working.
2. Insert the appropriate IC into the IC base.
3. Make connections as shown in the circuit diagram.
4. Provide the input data via the input switches and observe the output on
output LEDs
5. Give various combinations of inputs and note down the output with help of
LED for all gate ICs one by one.
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RESULT:
The following Boolean expression is reduces using K-map method and
implemented using basic gate and universal method
SOP Equation: 1.
2.
POS Equation: