THIS REPORT IS BASED ON THE DESIGN OF CIRCUIT DEBITS THE GIVEN VALUE TO THE DEFAULT VALUE WITH COST ANALYSIS AND DEBIT RANGE IS (0-7) AND DEFAULT VALUE “11". AND BY SEEING THIS REPORT WE CAN GET A IDEA ABOUT THE ELECTRONIC CIRCUITS HOW TO DESIGN THE CIRCUITS AND BY USING THE COSTING TECHNIQUES WE CAN KNOW ABOUT HOW TO DESIGN THE CIRCUITS BY LOW-COST ANALYSIS SO IN THIS REPORT WE CAN SEE THAT THE COST ANALYSIS OF THE IC'S ALSO SO THIS REPORT IS ALSO USEFUL FOR THE ENGINEERING STUDENTS THOSE WHO ARE DESIGNING THE CIRCUITS AND HOW TO DO THE COSTING ANALYSIS ON THE CIRCUITS

1. Project Report
On
DESIGN OF CIRCUIT DEBITS THE GIVEN VALUE TO THE DEFAULT VALUE
WITH COST ANALYSIS AND DEBIT RANGE IS (0-7) AND DEFAULT VALUE “11
Submitted as a part of Second Year First Semester curriculum of
BACHELOR OF TECHNOLOGY
IN
ELECTRICAL AND ELECTRONICS ENGINEERING
By
Mr.P.Eswar Sai 18981A0237
Mr. P.Mohan 18981A0238
Ms. P.Supriya 18981A0239
Mr. P. Nithesh Kumar 18981A0240
Mr. P.Sanjay Kumar 18981A0241
Under the Supervision of
Mr.D.Baskara rao
Associate Professor
Department of Electrical & Electronics Engineering
Raghu Engineering College
(Autonomous)
Accredited by NBA & NAAC with ‘A Grade, Permanently Affiliated JNTU
Kakinada
Dakamarri (v), Bheemunipatnam Mandal, Visakhapatnam, Andhra Pradesh
531162
Dec – 2019

2. RAGHU ENGINEERING COLLEGE
Department of Electrical and Electronics
Engineering
CERTIFICATE
This is to certify that case study entitled as “PROBLEM ON THE
POWERFACTOR CORRRECTION IN POWER PLANT” submitted by Mr.P.Mohan
(18981A0238), Ms.P.Supriya(18981A0239), Mr. P.NitheshKumar(18981A0240), Mr.P.Sanjay
Kumar(18981A0241) as a part of Second Year First Semester Curriculum of
Under Graduate Program in Electrical & Electronics Engineering at Rag hu
Engineering College.
Faculty Member Head of the department
Mr.D.Baskara rao Dr P. Sasi Kiran
Associate Professor Professor

3. Objective :-
DESIGN OF CIRCUIT DEBITS THE GIVEN VALUE TO THE DEFAULT VALUE
WITH COST ANALYSIS AND DEBIT RANGE IS (0-7) AND DEFAULT VALUE
“11”

4. Principles and methodologies :-
Data from given problem
• Range of given default value = (0-7)
• Default value is 11
• debits the given value to the default value.
• We consider the 4 bits for given default value.
• Assuming the inputs are A,B,C
• Assuming the outputs are Y3,Y2,Y1,Y0
• The input are given from 0 to 7
• Then debit decimal value from default value
• That means the decimal value (0) debit from our default value
11 then the out is 11 . These out write in binary form.
 11 – 0 = 11 ( decimalform binary form )
= 1 0 1 1
Y3 Y2 Y3 Y4
• Similarlysame process doing to other number.
• Then we got the truth table shown in below.
• From above expression, if you given 3 input then you got the 4
outputs

5. Necessity of solving the given objective.
 Introduce tools, facilities and components needed for the experiments in digital
electronics
 Relate voltage levels and electrical connections to digital logic levels
 Verify the operationof the basiclogic gates and Universal logic gates.

 Digital Electronics Lab Report 01
Discussion:
Digital electronics are built using logic gates. Each logic gate implements a logic function
such as the NOT (also known as the inverter), the AND, the OR and the Exclusive OR
(also known as the EX-OR gate). In some cases the output of a gate is internally inverted.
The AND gate with the output inverted iscalledthe NAND gate.
The OR gate with the output inverted is called the NOR gate.
The EX-OR gate withThe output inverted is called the EX- NOR gate.
Truth table
Circuit designing

6. • From the above truth table
• The out put Y3 = compliment of input “A”
• Out put Y2 = same as input “A”
• Out put Y1 = complimentary of input “B”
• Out put Y0 = compliment of input “c”
from above data
we construct the circuits using 3 types of gates
1. Not gate
2. Nand gate
3. Nor gate
NOT GATE
• A NOT gate, often called an inverter.
• it has only a single inputwith simple behavior.
If the input is zero then out put is one and vice versa
Symbol of NOT gate

7. Circuit construction using NOT gate

8. Cost analysis for not gate
NAND GATE
• It is a universal gate . That means by using this we will construct
the any type of basic gates (and,or,not)
• which produces an output which is “0” only if all its inputsare “1”.
Construct the not gate using nand gate shown below figure

9. NOT gate from NAND gate
Circuit construction using NAND gate
.

10. Cost analysis for nand gate
NOR GATE
• It is also universal gate , by using these gate we will construct the
basic gates (and , or, not)
• A HIGH output results if both the inputsto the gate are LOW.
Not gate from nor gate

11. Circuit construction using NOR gate

12. Cost analysis for nor gate

13. QUANTITY REQUIRED
• For designing the circuit we will need a
Circuit designing using not gate , we will required 4 numbers of not
gates Circuit designing using nor gate , we will required
4number of nor gates Circuit designing using nand gate, we will
required 4number of nand gates
NANDGATE (7400)
NORGATE (7402)

14. Observations :-
Circuit should be connected carefully according to the pin configuration. the correct pins must be
connect to the supply pins and the ground pins otherwise the ic may damage. we should use 5v
volts supply only otherwise the glow of led can’t be determined.
During the project we see the
Logic switch didn’t work properly and respond according here we adjust the power supply and we
gave the supply.
Ic’s have to be tested before the experiment by using tester ic kit.
Conclusion :-
From above tables
From the above circuits we will design only the circuit which is more efficient
design and which will give the good results in that . so here we can design the
circuit which we can make the circuit at a low cost. and from the above
designed cire=cuits we can understand that we can design many circuits by
using different gates and here we only see with the efficient one and the low
cost technique to make a circuit.and while we are designing the circuit we have

15. to see the cost analysis of the circuit which we are going to decide and we want
to make.
References:-
• Observation
• https://wClass notes
• ww.emeraldinsight.com › doi › full