2. CONTENT
What is latches
Label sensitive device
MUX based Latches
Types of latches
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3. WHAT IS LATCHES
One Bit memory cell
Basic Bistable element
Feedback path to retain the information
Figure 1(a) & (b): Bistable element and analog analysis
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5. MUX BASED LATCHES
CLK CLK
D D
QQ 0
1
1
0
Figure 2(a): Negative static latches
Negative latch input D is
selected when the CLK is 0
Figure 2(b):Positive static latch
CLK is 1, positive latch
transparent
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7. S-R LATCH
S R Q Not Q
0 0 1
0
0
1
0 1 0 1
1 0 1 0
1 1 0 0
A set/reset latches is an offbeat circuit,
which depends on the condition of the S&R inputs
Figure 3: SR latch 7
8. D LATCHES
Enable D (Data) Next State Qn+1 State
1 0 0 Reset
1 1 1 Set
0 X Qn No change
Simple extension of the
gated SR latch
Removes the possibility
of invalid input states
Figure 4: D latch
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9. JK LATCH & T LATCH
Enable
JK latch, as well as RS latch, is
similar.
Unclear state has been removed
The output feedback toward inputs,
which is not present in the RS-latch
The T latch can be formed
whenever the JK latch inputs are
shorted
If input of the latch is high, the
output will be toggled.
Figure 6(a) & 9(b): JK latch and T latch
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10. APPLICATION
Keep the conditions of the bits to encode binary
Widely used in computing as well as data storage
D latches are applicable for asynchronous systems
Data latches are used in synchronous two-phase systems for
reducing the transit count.
These are the building blocks for sequential circuit.
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11. ADVANTAGES & DISADVANTAGES
Very flexible compare Flip Flop
Latches utilize less power
Small and occupies less area
High-speed circuit because asynchronous design no CLK
Chance to affect to
race conditions.
Chance of meta-stability
Difficult for testing and analyzing
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