Efficiency Through Methodology

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Efficiency Through Methodology

  1. 1. 1© 2006 Cisco Systems, Inc. All rights reserved.Efficiency Through MethodologyDV Club RTPMark StricklandOctober 18, 2006
  2. 2. 222© 2006 Cisco Systems, Inc. All rights reserved.DV Club Oct. 2006Challenge of VerificationQuality(all bugs found)Scheduleand Resources
  3. 3. 333© 2006 Cisco Systems, Inc. All rights reserved.DV Club Oct. 2006How to Meet the Challenge• Efficiency – get the most from your timeUse components from other projectsDont specify behavior twice in the same projectDont specify standard behavior that can be inferred atinstantiationProvide flexibility to meet all late-stage needsLet automation do a lot of the workEliminate decisions regarding infrastructureDescribe testbench conciselyRun simulations fasterlanguagemethodology
  4. 4. 444© 2006 Cisco Systems, Inc. All rights reserved.DV Club Oct. 2006Some Examples Used at Cisco• A high-level overview of some reuse methodologytechniques that we use at Cisco follows …
  5. 5. 555© 2006 Cisco Systems, Inc. All rights reserved.DV Club Oct. 2006Three Stages of Testbench Creation• Component DesignWant to describe the behavior of the component withminimal code to support the needs of the next stages• Testbench IntegrationWant to specify only components and interconnections,instance-specific constraints and initialization• Testcase CreationWant to specify only valid configuration space andsequences of constrained data (for the most part);everything else is a necessary evilMay be done by those with shallower language knowledge
  6. 6. 666© 2006 Cisco Systems, Inc. All rights reserved.DV Club Oct. 2006Testflow• The Issue: Sometimes all components must finishan activity (e.g. reset) before any of them moves on• Solution: A built-in testflow–Testcase specifies unique behavior for each phase–Testbench integration specifies standard behavior foreach phase–Component starts processes in appropriate phase–None of these has to worry about synchronization ofbehavior between components
  7. 7. 777© 2006 Cisco Systems, Inc. All rights reserved.DV Club Oct. 2006Unit-Level Benches and Reuse• Unit-level benches offer best control of stimulusand visibility of results• Reuse of unit-level checkers avoids creating newchip-level checkers that could be complex in casessuch as dropped packets• Problem: Specification inconsistencies betweentwo blocks can be missedto reset B,send 10Block Areset if 11receivedBlock Bchecker AScenario: A tries to reset B 10 is sent no reset of Bchecker B
  8. 8. 888© 2006 Cisco Systems, Inc. All rights reserved.DV Club Oct. 2006Transaction Linking• Each checker that corresponds to a block thatpasses information to the next block contributes tobuilding a linked list of the information hops• Each checker where information terminates (withsome effect) traverses the linked list to find thesource and the intent at that sourceTransaction linking is also a great debug aid
  9. 9. 999© 2006 Cisco Systems, Inc. All rights reserved.DV Club Oct. 2006Templates and Generators• Burden falls on the component designer• The infrastructure of components can be made in acommon manner• This commonality can be captured in templates andgenerators, allowing the designer to focus on theparticulars of the component
  10. 10. 101010© 2006 Cisco Systems, Inc. All rights reserved.DV Club Oct. 2006Summary• Biggest efficiency gains from methodology– If code was in the same language but did not includetestflow, transaction linking, and the testcase / integration /component separation, it would not help much if at all• Push most behavior into the components that canbe used by many testbenches which in turn can beused by many tests• Make the component designers job easier bystandardizing common pieces into templates

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