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Registers and Counters
D.R.V.L.B Thambawita
November 12, 2017
D.R.V.L.B Thambawita Registers and Counters
https://sites.google.com/view/vajira-thambawita/leaning-materials/slides
Registers
A register is a group of flip-flops, each one of which shares a
common clock and is capable of storing one bit of information.
An n-bit register consists of a group of n flip-flops capable of
storing n bits of binary information.
In its broadest definition, a register consists of a group of
flip-flops together with gates that affect their operation.
The flip-flops hold the binary information, and the gates
determine how the information is transferred into the register.
D.R.V.L.B Thambawita Registers and Counters
Counter
A counter is essentially a register that goes through a
predetermined sequence of binary states.
The gates in the counter are connected in such a way as to
produce the prescribed sequence of states.
Although counters are a special type of register, it is common
to differentiate them by giving them a different name.
D.R.V.L.B Thambawita Registers and Counters
Four-bit register
The input Clear b goes to the activelow R (reset) input of all four
flipflops. When this input goes to 0, all flip-flops are reset
asynchronously.
D.R.V.L.B Thambawita Registers and Counters
Register with Parallel Load
Synchronous digital systems have a master clock generator
that supplies a continuous train of clock pulses
A separate control signal must be used to decide which
register operation will execute at each clock pulse.
The transfer of new information into a register is referred to
as loading or updating the register.
If all the bits of the register are loaded simultaneously with a
common clock pulse, we say that the loading is done in
parallel .
D.R.V.L.B Thambawita Registers and Counters
Four-bit register with parallel load
D.R.V.L.B Thambawita Registers and Counters
Register with Parallel Load
If the contents of the register must be left unchanged, the
inputs must be held constant or the clock must be inhibited
from the circuit.
However, inserting gates into the clock path is ill advised
because it means that logic is performed with clock pulses.
The insertion of logic gates produces uneven propagation
delays between the master clock and the inputs of flipflops.
D.R.V.L.B Thambawita Registers and Counters
Shift Registers
A register capable of shifting the binary information held in
each cell to its neighboring cell, in a selected direction, is
called a shift register.
Figure: Four-bit shift register
D.R.V.L.B Thambawita Registers and Counters
Serial Transfer
The datapath of a digital system is said to operate in serial mode
when information is transferred and manipulated one bit at a time.
Figure: Serial transfer from register A to register B
D.R.V.L.B Thambawita Registers and Counters
Serial Transfer
Figure: Serial-Transfer Example
D.R.V.L.B Thambawita Registers and Counters
Serial Addition
Figure: Serial adder
D.R.V.L.B Thambawita Registers and Counters
Counters
A register that goes through a prescribed sequence of states
upon the application of input pulses is called a counter .
The input pulses may be clock pulses, or they may originate
from some external source and may occur at a fixed interval
of time or at random.
A counter that follows the binary number sequence is called a
binary counter.
An nbit binary counter consists of n flipflops and can count in
binary from 0 through 2n − 1.
Counters are available in two categories: ripple counters and
synchronous counters.
D.R.V.L.B Thambawita Registers and Counters
Ripple Counters
In a ripple counter, a flipflop output transition serves as a
source for triggering other flipflops.
In other words, the C input of some or all flipflops are
triggered, not by the common clock pulses, but rather by the
transition that occurs in other flipflop outputs.
D.R.V.L.B Thambawita Registers and Counters
Ripple Counters
D.R.V.L.B Thambawita Registers and Counters
Ripple Counters
D.R.V.L.B Thambawita Registers and Counters
BCD Ripple Counter
Figure: State diagram of a decimal BCD counter
D.R.V.L.B Thambawita Registers and Counters
BCD Ripple Counter
D.R.V.L.B Thambawita Registers and Counters
BCD Ripple Counter
The BCD counter of previous figure is a decade counter, since
it counts from 0 to 9.
To count in decimal from 0 to 99, we need a two-decade
counter.
To count from 0 to 999, we need a three-decade counter
Figure: Block diagram of a threedecade decimal BCD counter
D.R.V.L.B Thambawita Registers and Counters
SYNCHRONOUS COUNTERS
Figure: Binary Counter
D.R.V.L.B Thambawita Registers and Counters
SYNCHRONOUS COUNTERS
Figure: Four-bit up-down binary counter
D.R.V.L.B Thambawita Registers and Counters

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Lec 09 - Registers and Counters

  • 1. Registers and Counters D.R.V.L.B Thambawita November 12, 2017 D.R.V.L.B Thambawita Registers and Counters https://sites.google.com/view/vajira-thambawita/leaning-materials/slides
  • 2. Registers A register is a group of flip-flops, each one of which shares a common clock and is capable of storing one bit of information. An n-bit register consists of a group of n flip-flops capable of storing n bits of binary information. In its broadest definition, a register consists of a group of flip-flops together with gates that affect their operation. The flip-flops hold the binary information, and the gates determine how the information is transferred into the register. D.R.V.L.B Thambawita Registers and Counters
  • 3. Counter A counter is essentially a register that goes through a predetermined sequence of binary states. The gates in the counter are connected in such a way as to produce the prescribed sequence of states. Although counters are a special type of register, it is common to differentiate them by giving them a different name. D.R.V.L.B Thambawita Registers and Counters
  • 4. Four-bit register The input Clear b goes to the activelow R (reset) input of all four flipflops. When this input goes to 0, all flip-flops are reset asynchronously. D.R.V.L.B Thambawita Registers and Counters
  • 5. Register with Parallel Load Synchronous digital systems have a master clock generator that supplies a continuous train of clock pulses A separate control signal must be used to decide which register operation will execute at each clock pulse. The transfer of new information into a register is referred to as loading or updating the register. If all the bits of the register are loaded simultaneously with a common clock pulse, we say that the loading is done in parallel . D.R.V.L.B Thambawita Registers and Counters
  • 6. Four-bit register with parallel load D.R.V.L.B Thambawita Registers and Counters
  • 7. Register with Parallel Load If the contents of the register must be left unchanged, the inputs must be held constant or the clock must be inhibited from the circuit. However, inserting gates into the clock path is ill advised because it means that logic is performed with clock pulses. The insertion of logic gates produces uneven propagation delays between the master clock and the inputs of flipflops. D.R.V.L.B Thambawita Registers and Counters
  • 8. Shift Registers A register capable of shifting the binary information held in each cell to its neighboring cell, in a selected direction, is called a shift register. Figure: Four-bit shift register D.R.V.L.B Thambawita Registers and Counters
  • 9. Serial Transfer The datapath of a digital system is said to operate in serial mode when information is transferred and manipulated one bit at a time. Figure: Serial transfer from register A to register B D.R.V.L.B Thambawita Registers and Counters
  • 10. Serial Transfer Figure: Serial-Transfer Example D.R.V.L.B Thambawita Registers and Counters
  • 11. Serial Addition Figure: Serial adder D.R.V.L.B Thambawita Registers and Counters
  • 12. Counters A register that goes through a prescribed sequence of states upon the application of input pulses is called a counter . The input pulses may be clock pulses, or they may originate from some external source and may occur at a fixed interval of time or at random. A counter that follows the binary number sequence is called a binary counter. An nbit binary counter consists of n flipflops and can count in binary from 0 through 2n − 1. Counters are available in two categories: ripple counters and synchronous counters. D.R.V.L.B Thambawita Registers and Counters
  • 13. Ripple Counters In a ripple counter, a flipflop output transition serves as a source for triggering other flipflops. In other words, the C input of some or all flipflops are triggered, not by the common clock pulses, but rather by the transition that occurs in other flipflop outputs. D.R.V.L.B Thambawita Registers and Counters
  • 14. Ripple Counters D.R.V.L.B Thambawita Registers and Counters
  • 15. Ripple Counters D.R.V.L.B Thambawita Registers and Counters
  • 16. BCD Ripple Counter Figure: State diagram of a decimal BCD counter D.R.V.L.B Thambawita Registers and Counters
  • 17. BCD Ripple Counter D.R.V.L.B Thambawita Registers and Counters
  • 18. BCD Ripple Counter The BCD counter of previous figure is a decade counter, since it counts from 0 to 9. To count in decimal from 0 to 99, we need a two-decade counter. To count from 0 to 999, we need a three-decade counter Figure: Block diagram of a threedecade decimal BCD counter D.R.V.L.B Thambawita Registers and Counters
  • 19. SYNCHRONOUS COUNTERS Figure: Binary Counter D.R.V.L.B Thambawita Registers and Counters
  • 20. SYNCHRONOUS COUNTERS Figure: Four-bit up-down binary counter D.R.V.L.B Thambawita Registers and Counters