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Memory Interfacing
2
Outline
 Interfacing basics.
 Microprocessor interfacing
 I/O addressing.
 Interrupts.
 Direct Memory Access (DMA).
3
Introduction
 Processor process data.
memory storage
buses communication
• Communication: transfer of data among
processors and memories.
• This communication is known as interfacing.
4
Basic Terminology
unidirectional (rd’/wr , enable)
 Wires
bidirectional (data)
• A set of wires with the same function :
• Bus
• Protocol: rules for communicating over the wires. (low level HW protocols)
bus structure
Processor Memory
rd'/wr
enable
addr[0-11]
data[0-7]
bus
 The primary purpose of memory interfacing is to
facilitate the transfer of data between the CPU
and memory modules effectively.
 It involves managing data flow and addressing,
and timing requirements to ensure seamless
communication and reliable data storage.
 The CPU uses memory addresses to access
specific locations in memory, read data, and write
data as needed.
5
Real-time Embedded Systems/Interfacing 6
• Memory is device used to store the information or data
• Most of the memories used are semiconductor memories because of their
small size, high speed, reliability and low cost
• It consist of mostly flip flops and some other additional circuits for
buffers
Memory capacity
The no of bits that a memory can store is called its capacity
Memory organization
• Each memory chip contains 2N memory locations, where N is the no
of address pin on the chip
• Each location contains M bits, where M is the no of data pins on the
chip
• The entire chip will contain 2N X M bits
Real-time Embedded Systems/Interfacing` 7
Address pins
• Address Lines: The input lines that select a memory location within the
memory device.
• Decoders are used, inside the memory chip, to select a specific location
• The number of address pins on a memory chip specifies the number of
memory locations.
Key concepts in memory interfacing
 There are some key concepts in memory
interfacing:
 Address Bus: The address bus is a set of wires
that carry memory addresses from the CPU to
the memory module.
 The number of address lines determines the
maximum memory capacity that can be
addressed.
 For example, a 16-bit address bus can address
up to 64KB (2^16) of memory locations.
8
 Data Bus: The data bus is a set of wires that
enable the bidirectional transfer of data
between the CPU and memory module.
 The width of the data bus determines the
amount of data that can be transferred in a
single operation.
 For instance, a 32-bit data bus can transfer 32
bits (4 bytes) of data at a time.
 The number of data lines (m-bits)
determines the size of each location in the
memory.
9
 Control Signals: These signals manage the
flow of data between the CPU and memory,
indicating whether it is a read operation, write
operation or other control actions like enabling
memory access.
 Memory Decoding: Memory decoding is the
process of interpreting the address lines to
select a specific memory location.
 It ensures that the CPU can access the intended
memory device accurately.
10
Real-time Embedded Systems/Interfacing 11
 Memory Types: Different memory
technologies, such as SRAM (Static RAM)
and DRAM (Dynamic RAM), have distinct
characteristics, including speed, cost, and
volatility.
 The memory interfacing design should
consider these aspects based on the system’s
requirements
12
 Memory Hierarchy: Modern computer systems
often use a memory hierarchy to optimize
performance.
 This hierarchy includes multiple levels of
memory, such as cache, main memory, and
secondary storage, with varying access speeds
and capacities
 Interfacing with I/O Devices: Memory
interfacing also extends to communication
between the CPU and input/output (I/O)
devices, such as hard drives, solid-state drives,
and peripherals
13
 What is I/O Interfacing?
 Input/Output (I/O) interfacing is a critical aspect
of computer system design that deals with the
communication between the central processing
unit (CPU) and various peripheral devices.
 I/O devices include external devices such as
keyboards, mice, monitors, printers, hard
drives, USB drives, network interfaces, and
more.
 The I/O interface facilitates the exchange of
data between the CPU and these devices,
enabling users to interact with the computer
and transfer data to and from the system.
14
15
16
Microprocessor interfacing: I/O addressing
 The microprocessor's pins used to communicate data to
and from it, are called I/O pins.
 We normally consider the access to peripherals (not
memory), as I/O.
 Two common methods for using pins to support I/O : Port-
based I/O (Parallel I/O), and Bus-based I/O.
 In parallel I/O , a port can be directly read and written by
processor instructions, like any register.
 Ex.P0=255, g=P2 .
 Ports are often bit-addressable.
 In bus-based I/O, the microprocessor has a set of address,
data, and control ports corresponding to bus lines, and uses
the bus to access memory and peripherals.
17
Extensions
 Parallel I/O peripheral.
 When processor only supports bus-based I/O
but parallel I/O needed.
 Each port on peripheral connected to a register within
peripheral. The microprocessor can read/write those
registers.
 Extended parallel I/O.
 When processor supports port-based I/O
but more ports needed.
 One or more processor ports interface with
parallel I/O peripheral extending total number
of ports available for I/O.
 e.g., extending 4 ports to 6 ports in figure.
Processor Memory
Parallel I/O peripheral
Port A
System bus
Port C
Port B
Adding parallel I/O to a bus-
based I/O processor
Processor
Parallel I/O peripheral
Port A Port B Port C
Port 0
Port 1
Port 2
Port 3
Extended parallel I/O
18
Memory-Mapped I/O and Standard I/O
 They are two bus-based methods for microprocessor to communicate with
peripherals.
 In memory-mapped I/O, peripherals occupy specific addresses in the existing
address space.
 e.g., Bus has 16-bit address, lower 32K addresses may correspond to
memory, and upper 32k addresses may correspond to peripherals.
 In standard I/O (I/O-mapped I/O), the bus includes an additional pin (M`/IO),
to include whether the access is to memory or peripheral.
 e.g., Bus has 16-bit address, all of them for memory addressing if
M`/IO=0, and all of them for I/O addressing if M`/IO=1.
19
Memory-Mapped I/O Vs. Standard I/O
 Memory-mapped I/O
 Requires no special instructions
 Assembly instructions involving memory like MOV and ADD
work with peripherals as well.
 Standard I/O requires special instructions (e.g., IN, OUT) to
move data between peripheral registers and memory.
 Standard I/O
 No loss of memory addresses to peripherals.
 Simpler address decoding logic in peripherals possible.
 When number of peripherals much smaller than address
space then high-order address bits can be ignored
 smaller and/or faster comparators.
20
A basic memory protocol
 Interfacing an 8051 to external memory
 Ports P0 and P2 support port-based I/O when 8051 internal
memory being used.
 Those ports serve as data/address buses when external memory
is being used.
 16-bit address and 8-bit data are time multiplexed; low 8-bits of
address must therefore be latched with aid of ALE signal.
8051
74373
P0
HM6264
D Q
8
P2
ALE G
A<0...15>
D<0...7>
/OE
/WE
/CS
/WR
/RD
/CS1
/PSEN
CS2
27C256
/CS
A<0...14>
D<0...7>
/OE
P0
P2
Q
ALE
/RD
Adr. 7..0
Adr. 15…8
Adr. 7…0
Data
Interrupts (interrupt driven I/O)
 Servicing: read & process data from peripheral
whenever it has new data.
 Unpredictable
 Polling: MP repeatedly check for data
 Simple to implement
 Waste many clock cycles
 External interrupts
 Repeatedly MP checks Int pin after executing
instruction, if asserted => jump to ISR.
 Maskable vs Nonmaskable Interrupt
 Internal Interrupt (divide by 0,…)
 Software Interrupt .
21
Interrupt Addressing
 Fixed Int.: ISR address built in MP
 Vectored Int.:
 ISR address requested from peripherals by Interrupt
pin asserted by MP.
 The address stored in peripheral by extra register.
 Interrupt Address Table (compromise between
fixed & vectored)
 Table holds ISR addresses
 Peripherals provide entry number instead.
22
Watch dog timer
 A watchdog timer can be thought of as having the
inverse functionality than that of a regular timer. We
configure a watchdog timer with a real-time value, just as
with a regular timer.
 However, instead of the timer generating a signal for us
every X time units, we must generate a signal for the
timer every X time units.
 If we fail to generate this signal in time, then the timer
generates a signal indicating that we failed. We often
connect this signal to the reset or interrupt signal of a
general-purpose processor.
23
Watch dog timer
 A watchdog timer provides a mechanism of ensuring that our
software is working properly; every so often in the software, we
include a statement that generates a signal to the watchdog timer (in
particular, that resets the timer).
 If something undesired happens in the software (e.g., we enter an
undesired infinite loop, we wait for an input signal that never arrives,
a part fails, etc.), the watchdog generates a signal that we can use
to restart or test parts of the system.
 Using an interrupt service routine, we may record information as
to the number of failures and the causes of each, so that a service
technician may later evaluate this information to determine if a
particular part requires replacement.
 Note that an embedded system often must recover from failures
whenever possible, as the user may not have the means to reboot
the system in the same manner that he/she might reboot a desktop
system. 24
UART
(Universal Asynchronous
Receiver/Transmitter)
UART
 A UART (Universal Asynchronous Receiver/Transmitter) receives
serial data and stores it as parallel data (usually one byte), and
takes parallel data and transmits it as serial data.
 Need to communicate bytes of data between devices separated by
long distances.
 A set the transmission and reception rate, called the baud rate,
which indicates the frequency that the signal changes.
 Common rates include 2400, 4800, 9600, and 19.2k.
 An extra bit may be added to each data word, called parity, to detect
transmission errors -- the parity bit is set to high or low to indicate if
the word has an even or odd number of bits.
26
UART
27
UART
 Internally, a simple UART may possess
 a baud-rate configuration register, and
 two independently operating processors,
 one for receiving and the other for transmitting.
 The transmitter may possess a register, often called a transmit
buffer, that holds data to be sent. This register is a shift register, so
the data can be transmitted one bit at a time by shifting at the
appropriate rate. Likewise, the receiver receives data into a shift
register, and then this data can be read in parallel.
28
UART
 To use a UART, we must configure its baud rate by writing to the
configuration register, and then we must write data to the transmit
register and/or read data from the received register.
 Unfortunately, configuring the baud rate is usually not as simple as
writing the desired rate (e.g., 4800) to a register.
 For example, to configure the UART of an 8051, we must use the
following equation:
 smod corresponds to 2 bits in a special-function register,
 oscfreq is the frequency of the oscillator, and
 TH1 is an 8-bit rate register of a built-in timer.
29
UART
30
UART
31
UART
32
UNIVERSAL ASYNCHRONOUS
RECEIVER/TRANSMITTER
HOW UART WORKS
 In UART, data is transmitted in parallel from data bus to
transmitting UART
 The transmitting UART adds a start bit, stop bit and a parity bit
to parallel data from data bus
 the data packet is transmitted serially from Tx to RX pin
 The Rx pin reads the data and converts parallelly by removing
other bits
UNIVERSAL ASYNCHRONOUS
RECEIVER/TRANSMITTER
MODUL - 4
HOW UART WORKS
https://www.circuitbasics.com/basics-uart-communication/
1 start bit 5 to 9 data
bit
0 or 1 parity
bit
1 to 2 stop
bits
Frame Format
UNIVERSAL ASYNCHRONOUS
RECEIVER/TRANSMITTER
UART Communication
https://www.circuitbasics.com/basics-uart-communication/
UNIVERSAL ASYNCHRONOUS
RECEIVER/TRANSMITTER
HOW UART WORKS
A common asynchronous serial data format
UNIVERSAL ASYNCHRONOUS
RECEIVER/TRANSMITTER
UART IN ARDUINO
 UART allows the Atmega chip to do serial communication
while working on other tasks, through 64 byte serial buffer.
 All Arduino boards have at least one serial port (also known as
a UART or USART): Serial.
 Serial is used for communication between the Arduino board
and a computer or other devices.
 It communicates on digital pins 0 (RX) and 1 (TX) as well as
with the computer via USB. Thus, if you use these functions,
you cannot also use pins 0 and 1 for digital input or output.
UNIVERSAL ASYNCHRONOUS
RECEIVER/TRANSMITTER
Arduino functions for USB serial communication
• if (Serial) – indicates whether or not the USB serial connection is open
• Serial.available()-Get the number of bytes available for reading from the serial port.
• Serial.begin()-Sets the data rate in bits per second (baud) for serial data transmission.
• Serial.end()-Disables serial communication, allowing the RX,TX to be used for input & output.
• Serial.find()-reads data from the serial buffer until the target is found.
• Serial.println()-Prints data as ASCII text followed by a carriage return and newline character.
• Serial.read()-Reads incoming serial data.
• Serial.readString() - reads characters from the serial buffer into a String.
• Serial.write() - Writes binary data to serial port. This data is sent as a byte or series of bytes
For other functions refer the URL:
https://www.arduino.cc/en/pmwiki.php?n=Reference/serial#:~:text=Serial%20is%20used%20for%20communication,with%20the%20computer%20
via%20USB.
UNIVERSAL ASYNCHRONOUS
RECEIVER/TRANSMITTER
 EXAMPLE-1: Print data received through serial communication on to the serial monitor
of Arduino
void setup() {
Serial.begin(9600); //set up serial library baud rate to 9600
}
void loop() {
if(Serial.available()) //if number of bytes (characters) available for reading
from serial port
{
Serial.print("I received:"); //print I received
Serial.write(Serial.read()); //send what you read
}
}
UNIVERSAL ASYNCHRONOUS
RECEIVER/TRANSMITTER
 EXAMPLE-1: Arduino code for serial interface to blink switch ON LED when “a” is
received on serial port
int inByte; // Stores incoming command
void setup() {
Serial.begin(9600);
pinMode(13, OUTPUT); // Led pin
Serial.println("Ready"); // Ready to receive commands
}
void loop() {
if(Serial.available() > 0) { // A byte is ready to receive
inByte = Serial.read();
if(inByte == 'a') { // byte is 'a'
digitalWrite(13, HIGH);
Serial.println("LED - On");
}
else { // byte isn't 'a'
digitalWrite(13, LOW);
Serial.println("LED - off");
} } }
This function can be
used
if(Serial.find(“a"))
UNIVERSAL ASYNCHRONOUS
RECEIVER/TRANSMITTER
Arduino Software Serial Library
 The SoftwareSerial library has been developed to allow serial
communication on other digital pins of the Arduino
 Uses software to replicate the functionality of the hardwired RX and TX
lines hence the name "SoftwareSerial".
 It is possible to have multiple software serial ports with speeds up to
115200 bps.
 This can be extremely helpful when the need arises to communicate with
two or more serial enabled devices
 Limitations:
 maximum RX speed is 57600bps and RX doesn't work on Pin 13
 If using multiple software serial ports, only one receive data at a time.
UNIVERSAL ASYNCHRONOUS
RECEIVER/TRANSMITTER
Arduino functions for UART communication (SoftwareSerial Library)
SoftwareSerial() – Need to enable serial communication
avaialble() – gets the no of bits available for reading from serial port
begin() – sets the speed of serial communication
overflow() – checks the serial buffer overflow has occurred
peek() – returns the character received in the serial port
read() - returns the character that was received on the Rx pin of serial port
Print() – works same as serial.print
Listen() – enables the selected serial port to listen
Write() – print data to transmit pin of software serial
Refer. URL:
https://www.arduino.cc/en/Reference/SoftwareSerial
UNIVERSAL ASYNCHRONOUS
RECEIVER/TRANSMITTER
 EXAMPLE-3: Arduino code to Receives from the hardware serial, sends to software
serial and Receives from software serial, sends to hardware serial.
#include <SoftwareSerial.h>
SoftwareSerial mySerial(10, 11); // RX, TX
void setup() {
Serial.begin(57600); // Open serial communications and wait for port to open:
while (!Serial) {
; // wait for serial port to connect. Needed for native USB port only
}
mySerial.begin(4800); // set the data rate for the SoftwareSerial port
mySerial.println("Hello, world?");
}
void loop() { // run over and over
if (mySerial.available()) {
Serial.write(mySerial.read());
}
if (Serial.available()) {
mySerial.write(Serial.read());
} }
UARTs
Real-time Embedded Systems/Interfacing 44
Reference
 “Embedded system Design: A unified
Hardware/Software Introduction”, Frank Vahid,
Tony Givarrgis, Wiley, 2002
Real-time Embedded Systems/Interfacing 45

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The primary purpose of memory interfacing is to facilitate the transfer of data between the CPU and memory modules effectively.

  • 2. 2 Outline  Interfacing basics.  Microprocessor interfacing  I/O addressing.  Interrupts.  Direct Memory Access (DMA).
  • 3. 3 Introduction  Processor process data. memory storage buses communication • Communication: transfer of data among processors and memories. • This communication is known as interfacing.
  • 4. 4 Basic Terminology unidirectional (rd’/wr , enable)  Wires bidirectional (data) • A set of wires with the same function : • Bus • Protocol: rules for communicating over the wires. (low level HW protocols) bus structure Processor Memory rd'/wr enable addr[0-11] data[0-7] bus
  • 5.  The primary purpose of memory interfacing is to facilitate the transfer of data between the CPU and memory modules effectively.  It involves managing data flow and addressing, and timing requirements to ensure seamless communication and reliable data storage.  The CPU uses memory addresses to access specific locations in memory, read data, and write data as needed. 5
  • 6. Real-time Embedded Systems/Interfacing 6 • Memory is device used to store the information or data • Most of the memories used are semiconductor memories because of their small size, high speed, reliability and low cost • It consist of mostly flip flops and some other additional circuits for buffers Memory capacity The no of bits that a memory can store is called its capacity Memory organization • Each memory chip contains 2N memory locations, where N is the no of address pin on the chip • Each location contains M bits, where M is the no of data pins on the chip • The entire chip will contain 2N X M bits
  • 7. Real-time Embedded Systems/Interfacing` 7 Address pins • Address Lines: The input lines that select a memory location within the memory device. • Decoders are used, inside the memory chip, to select a specific location • The number of address pins on a memory chip specifies the number of memory locations.
  • 8. Key concepts in memory interfacing  There are some key concepts in memory interfacing:  Address Bus: The address bus is a set of wires that carry memory addresses from the CPU to the memory module.  The number of address lines determines the maximum memory capacity that can be addressed.  For example, a 16-bit address bus can address up to 64KB (2^16) of memory locations. 8
  • 9.  Data Bus: The data bus is a set of wires that enable the bidirectional transfer of data between the CPU and memory module.  The width of the data bus determines the amount of data that can be transferred in a single operation.  For instance, a 32-bit data bus can transfer 32 bits (4 bytes) of data at a time.  The number of data lines (m-bits) determines the size of each location in the memory. 9
  • 10.  Control Signals: These signals manage the flow of data between the CPU and memory, indicating whether it is a read operation, write operation or other control actions like enabling memory access.  Memory Decoding: Memory decoding is the process of interpreting the address lines to select a specific memory location.  It ensures that the CPU can access the intended memory device accurately. 10
  • 12.  Memory Types: Different memory technologies, such as SRAM (Static RAM) and DRAM (Dynamic RAM), have distinct characteristics, including speed, cost, and volatility.  The memory interfacing design should consider these aspects based on the system’s requirements 12
  • 13.  Memory Hierarchy: Modern computer systems often use a memory hierarchy to optimize performance.  This hierarchy includes multiple levels of memory, such as cache, main memory, and secondary storage, with varying access speeds and capacities  Interfacing with I/O Devices: Memory interfacing also extends to communication between the CPU and input/output (I/O) devices, such as hard drives, solid-state drives, and peripherals 13
  • 14.  What is I/O Interfacing?  Input/Output (I/O) interfacing is a critical aspect of computer system design that deals with the communication between the central processing unit (CPU) and various peripheral devices.  I/O devices include external devices such as keyboards, mice, monitors, printers, hard drives, USB drives, network interfaces, and more.  The I/O interface facilitates the exchange of data between the CPU and these devices, enabling users to interact with the computer and transfer data to and from the system. 14
  • 15. 15
  • 16. 16 Microprocessor interfacing: I/O addressing  The microprocessor's pins used to communicate data to and from it, are called I/O pins.  We normally consider the access to peripherals (not memory), as I/O.  Two common methods for using pins to support I/O : Port- based I/O (Parallel I/O), and Bus-based I/O.  In parallel I/O , a port can be directly read and written by processor instructions, like any register.  Ex.P0=255, g=P2 .  Ports are often bit-addressable.  In bus-based I/O, the microprocessor has a set of address, data, and control ports corresponding to bus lines, and uses the bus to access memory and peripherals.
  • 17. 17 Extensions  Parallel I/O peripheral.  When processor only supports bus-based I/O but parallel I/O needed.  Each port on peripheral connected to a register within peripheral. The microprocessor can read/write those registers.  Extended parallel I/O.  When processor supports port-based I/O but more ports needed.  One or more processor ports interface with parallel I/O peripheral extending total number of ports available for I/O.  e.g., extending 4 ports to 6 ports in figure. Processor Memory Parallel I/O peripheral Port A System bus Port C Port B Adding parallel I/O to a bus- based I/O processor Processor Parallel I/O peripheral Port A Port B Port C Port 0 Port 1 Port 2 Port 3 Extended parallel I/O
  • 18. 18 Memory-Mapped I/O and Standard I/O  They are two bus-based methods for microprocessor to communicate with peripherals.  In memory-mapped I/O, peripherals occupy specific addresses in the existing address space.  e.g., Bus has 16-bit address, lower 32K addresses may correspond to memory, and upper 32k addresses may correspond to peripherals.  In standard I/O (I/O-mapped I/O), the bus includes an additional pin (M`/IO), to include whether the access is to memory or peripheral.  e.g., Bus has 16-bit address, all of them for memory addressing if M`/IO=0, and all of them for I/O addressing if M`/IO=1.
  • 19. 19 Memory-Mapped I/O Vs. Standard I/O  Memory-mapped I/O  Requires no special instructions  Assembly instructions involving memory like MOV and ADD work with peripherals as well.  Standard I/O requires special instructions (e.g., IN, OUT) to move data between peripheral registers and memory.  Standard I/O  No loss of memory addresses to peripherals.  Simpler address decoding logic in peripherals possible.  When number of peripherals much smaller than address space then high-order address bits can be ignored  smaller and/or faster comparators.
  • 20. 20 A basic memory protocol  Interfacing an 8051 to external memory  Ports P0 and P2 support port-based I/O when 8051 internal memory being used.  Those ports serve as data/address buses when external memory is being used.  16-bit address and 8-bit data are time multiplexed; low 8-bits of address must therefore be latched with aid of ALE signal. 8051 74373 P0 HM6264 D Q 8 P2 ALE G A<0...15> D<0...7> /OE /WE /CS /WR /RD /CS1 /PSEN CS2 27C256 /CS A<0...14> D<0...7> /OE P0 P2 Q ALE /RD Adr. 7..0 Adr. 15…8 Adr. 7…0 Data
  • 21. Interrupts (interrupt driven I/O)  Servicing: read & process data from peripheral whenever it has new data.  Unpredictable  Polling: MP repeatedly check for data  Simple to implement  Waste many clock cycles  External interrupts  Repeatedly MP checks Int pin after executing instruction, if asserted => jump to ISR.  Maskable vs Nonmaskable Interrupt  Internal Interrupt (divide by 0,…)  Software Interrupt . 21
  • 22. Interrupt Addressing  Fixed Int.: ISR address built in MP  Vectored Int.:  ISR address requested from peripherals by Interrupt pin asserted by MP.  The address stored in peripheral by extra register.  Interrupt Address Table (compromise between fixed & vectored)  Table holds ISR addresses  Peripherals provide entry number instead. 22
  • 23. Watch dog timer  A watchdog timer can be thought of as having the inverse functionality than that of a regular timer. We configure a watchdog timer with a real-time value, just as with a regular timer.  However, instead of the timer generating a signal for us every X time units, we must generate a signal for the timer every X time units.  If we fail to generate this signal in time, then the timer generates a signal indicating that we failed. We often connect this signal to the reset or interrupt signal of a general-purpose processor. 23
  • 24. Watch dog timer  A watchdog timer provides a mechanism of ensuring that our software is working properly; every so often in the software, we include a statement that generates a signal to the watchdog timer (in particular, that resets the timer).  If something undesired happens in the software (e.g., we enter an undesired infinite loop, we wait for an input signal that never arrives, a part fails, etc.), the watchdog generates a signal that we can use to restart or test parts of the system.  Using an interrupt service routine, we may record information as to the number of failures and the causes of each, so that a service technician may later evaluate this information to determine if a particular part requires replacement.  Note that an embedded system often must recover from failures whenever possible, as the user may not have the means to reboot the system in the same manner that he/she might reboot a desktop system. 24
  • 26. UART  A UART (Universal Asynchronous Receiver/Transmitter) receives serial data and stores it as parallel data (usually one byte), and takes parallel data and transmits it as serial data.  Need to communicate bytes of data between devices separated by long distances.  A set the transmission and reception rate, called the baud rate, which indicates the frequency that the signal changes.  Common rates include 2400, 4800, 9600, and 19.2k.  An extra bit may be added to each data word, called parity, to detect transmission errors -- the parity bit is set to high or low to indicate if the word has an even or odd number of bits. 26
  • 28. UART  Internally, a simple UART may possess  a baud-rate configuration register, and  two independently operating processors,  one for receiving and the other for transmitting.  The transmitter may possess a register, often called a transmit buffer, that holds data to be sent. This register is a shift register, so the data can be transmitted one bit at a time by shifting at the appropriate rate. Likewise, the receiver receives data into a shift register, and then this data can be read in parallel. 28
  • 29. UART  To use a UART, we must configure its baud rate by writing to the configuration register, and then we must write data to the transmit register and/or read data from the received register.  Unfortunately, configuring the baud rate is usually not as simple as writing the desired rate (e.g., 4800) to a register.  For example, to configure the UART of an 8051, we must use the following equation:  smod corresponds to 2 bits in a special-function register,  oscfreq is the frequency of the oscillator, and  TH1 is an 8-bit rate register of a built-in timer. 29
  • 33. UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER HOW UART WORKS  In UART, data is transmitted in parallel from data bus to transmitting UART  The transmitting UART adds a start bit, stop bit and a parity bit to parallel data from data bus  the data packet is transmitted serially from Tx to RX pin  The Rx pin reads the data and converts parallelly by removing other bits
  • 34. UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER MODUL - 4 HOW UART WORKS https://www.circuitbasics.com/basics-uart-communication/ 1 start bit 5 to 9 data bit 0 or 1 parity bit 1 to 2 stop bits Frame Format
  • 36. UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER HOW UART WORKS A common asynchronous serial data format
  • 37. UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER UART IN ARDUINO  UART allows the Atmega chip to do serial communication while working on other tasks, through 64 byte serial buffer.  All Arduino boards have at least one serial port (also known as a UART or USART): Serial.  Serial is used for communication between the Arduino board and a computer or other devices.  It communicates on digital pins 0 (RX) and 1 (TX) as well as with the computer via USB. Thus, if you use these functions, you cannot also use pins 0 and 1 for digital input or output.
  • 38. UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER Arduino functions for USB serial communication • if (Serial) – indicates whether or not the USB serial connection is open • Serial.available()-Get the number of bytes available for reading from the serial port. • Serial.begin()-Sets the data rate in bits per second (baud) for serial data transmission. • Serial.end()-Disables serial communication, allowing the RX,TX to be used for input & output. • Serial.find()-reads data from the serial buffer until the target is found. • Serial.println()-Prints data as ASCII text followed by a carriage return and newline character. • Serial.read()-Reads incoming serial data. • Serial.readString() - reads characters from the serial buffer into a String. • Serial.write() - Writes binary data to serial port. This data is sent as a byte or series of bytes For other functions refer the URL: https://www.arduino.cc/en/pmwiki.php?n=Reference/serial#:~:text=Serial%20is%20used%20for%20communication,with%20the%20computer%20 via%20USB.
  • 39. UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER  EXAMPLE-1: Print data received through serial communication on to the serial monitor of Arduino void setup() { Serial.begin(9600); //set up serial library baud rate to 9600 } void loop() { if(Serial.available()) //if number of bytes (characters) available for reading from serial port { Serial.print("I received:"); //print I received Serial.write(Serial.read()); //send what you read } }
  • 40. UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER  EXAMPLE-1: Arduino code for serial interface to blink switch ON LED when “a” is received on serial port int inByte; // Stores incoming command void setup() { Serial.begin(9600); pinMode(13, OUTPUT); // Led pin Serial.println("Ready"); // Ready to receive commands } void loop() { if(Serial.available() > 0) { // A byte is ready to receive inByte = Serial.read(); if(inByte == 'a') { // byte is 'a' digitalWrite(13, HIGH); Serial.println("LED - On"); } else { // byte isn't 'a' digitalWrite(13, LOW); Serial.println("LED - off"); } } } This function can be used if(Serial.find(“a"))
  • 41. UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER Arduino Software Serial Library  The SoftwareSerial library has been developed to allow serial communication on other digital pins of the Arduino  Uses software to replicate the functionality of the hardwired RX and TX lines hence the name "SoftwareSerial".  It is possible to have multiple software serial ports with speeds up to 115200 bps.  This can be extremely helpful when the need arises to communicate with two or more serial enabled devices  Limitations:  maximum RX speed is 57600bps and RX doesn't work on Pin 13  If using multiple software serial ports, only one receive data at a time.
  • 42. UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER Arduino functions for UART communication (SoftwareSerial Library) SoftwareSerial() – Need to enable serial communication avaialble() – gets the no of bits available for reading from serial port begin() – sets the speed of serial communication overflow() – checks the serial buffer overflow has occurred peek() – returns the character received in the serial port read() - returns the character that was received on the Rx pin of serial port Print() – works same as serial.print Listen() – enables the selected serial port to listen Write() – print data to transmit pin of software serial Refer. URL: https://www.arduino.cc/en/Reference/SoftwareSerial
  • 43. UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER  EXAMPLE-3: Arduino code to Receives from the hardware serial, sends to software serial and Receives from software serial, sends to hardware serial. #include <SoftwareSerial.h> SoftwareSerial mySerial(10, 11); // RX, TX void setup() { Serial.begin(57600); // Open serial communications and wait for port to open: while (!Serial) { ; // wait for serial port to connect. Needed for native USB port only } mySerial.begin(4800); // set the data rate for the SoftwareSerial port mySerial.println("Hello, world?"); } void loop() { // run over and over if (mySerial.available()) { Serial.write(mySerial.read()); } if (Serial.available()) { mySerial.write(Serial.read()); } }
  • 45. Reference  “Embedded system Design: A unified Hardware/Software Introduction”, Frank Vahid, Tony Givarrgis, Wiley, 2002 Real-time Embedded Systems/Interfacing 45