This project addressed risks for the PATH mission by developing technologies for a geostationary microwave sounder. It demonstrated 48 low-noise receivers at 183 GHz, improved architecture to meet sounding requirements, and developed planar circuitry and manifolds for signal distribution. An ASIC correlator chip was developed but did not meet yield needs. First fringes were observed by integrating feeds and aligning a subset of receivers. Further work is still needed to complete the correlator and test additional receiver pairs.

1. GeoSTAR-II Risk Reduction for PATH Todd Gaier1, Bjorn Lambrigtsen1, Pekka Kangaslahti1, Boon Lim1, Alan Tanner1, Dennis Harding1,Heather Owen1, Mary Soria1, Ian O’Dwyer1, Christopher Ruf2, Ryan Miller2, Bruce Block2, Michael Flynn2, Sterling Whitaker3 1Jet Propulsion Laboratory, California Institute of Technology 2Space Physics Research Laboratory, University of Michigan 3CAMBR, Univerisity of Idaho

2. Why Microwave at Geo? Central Dense Overcast Obscured in Vis/IR Katrina landfall-Publication of the National Oceanic & Atmospheric Administration (NOAA), NASA/GSFC nasaimages.org

3. Why not Microwave at Geo? D=36,000km For 35 km footprint, θ~ 1/1000 and θ~ λ/d so d~1000λ Credits:NASA/JPL nasaimages.org NOAA NESDIS

4. Geostationary Microwave Imager/Sounder IGARSS 1995

5. GeoSTAR IIP Demonstrated the feasibility of a synthetic aperture approach Characteristics: Frequency: 50-60 GHz D:~ 0.4 m IF BW: 64 MHz N rec: 24

6. NRC Decadal Study Recommends PATH = GeoSTAR Note: The NRC panel put PATH in the 3rd group, reflecting their perception of the maturity of the required technology This IIP will accelerate GeoSTAR technology development, reduce risk, and enable fast-track mission development

7. GeoSTAR-II Risk Reduction for PATH Reduce PATH mission development risk by demonstrating difficult technologies required for full system- not to demonstrate a fully functional 183 GHz STAR array Five focus areas: Correlator ASIC Chip Receiver Boards Sub-Array Modules IF Distribution Breadboard testing

8. System Block Diagram-Risk Reduction IF Interface ASIC Correlator Sub-array module ` Receiver Board

9. Performance Metrics-Derived from PATH Mission Study

11. LO waveguide WR-10

13. 180 GHz RF signal fed through the platform

17. Thermal strategy established

18. Assembly procedure established

19. ‘Open’ PCB strategy now decouples electronic design from structure & allows expansion17.5 cm

20. Stacked configuration (w heat pipe)

21. Fabricated feed horns

22. Manifolds as delivered

23. Horns & Manifolds Assembled

24. IF/Bias Boards Programmable module bias control 8 IF amplifiers, ~40dB gain, 700 MHz BW ~500 mW/board

25. System Population

27. Tuning can be performed to trade off the first stage noise figure and the overall gain

29. Fringe Tests-Using FPGA Correlator

30. Integrated tiles with mechanical alignment

31. Summary A project was undertaken to address outstanding risks for the PATH mission Developed 48 low noise receiver modules at 183 GHz Developed improved architecture for the sounding requirement Developed planar IF/bias circuitry with IF distribution solution Developed 16 element waveguide manifolds for signal and LO distribution Developed ASIC correlator chip, but failed to meet yields needs Developed 30 mW 2 bit A/D with 700 MHz clock rate Developed 183 GHz smooth wall feed horns Integrated and aligned feeds on manifolds Observed first fringes on a subset of receivers Still to be done: Complete correlator development with 128x128 inputs (64x64 now exists!) Test 16x3 tiles using old FPGA correlator Complete full BW tests of a few pairs using FPGA based system