SPICE MODEL of SSM3K102TU (Professional+BDP Model) in SPICE PARK

Device Modeling Report

COMPONENTS: Power MOSFET (Professional)
PART NUMBER: SSM3K102TU
MANUFACTURER: TOSHIBA
Body Diode (Professional) / ESD Protection Diode

Bee Technologies Inc.

All Rights Reserved Copyright (c) Bee Technologies Inc. 2008

MOSFET MODEL

Pspice model
Model description
parameter
LEVEL
L Channel Length
W Channel Width
KP Transconductance
RS Source Ohmic Resistance
RD Ohmic Drain Resistance
VTO Zero-bias Threshold Voltage
RDS Drain-Source Shunt Resistance
TOX Gate Oxide Thickness
CGSO Zero-bias Gate-Source Capacitance
CGDO Zero-bias Gate-Drain Capacitance
CBD Zero-bias Bulk-Drain Junction Capacitance
MJ Bulk Junction Grading Coefficient
PB Bulk Junction Potential
FC Bulk Junction Forward-bias Capacitance Coefficient
RG Gate Ohmic Resistance
IS Bulk Junction Saturation Current
N Bulk Junction Emission Coefficient
RB Bulk Series Resistance
PHI Surface Inversion Potential
GAMMA Body-effect Parameter
DELTA Width effect on Threshold Voltage
ETA Static Feedback on Threshold Voltage
THETA Modility Modulation
KAPPA Saturation Field Factor
VMAX Maximum Drift Velocity of Carriers
XJ Metallurgical Junction Depth
UO Surface Mobility


Transconductance Characteristic

Circuit Simulation Result

10
Measurement
9 Simulation

8

7

6
gfs

5

4

3

2

1

0
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
ID : Drain Curre nt A

Comparison table

gfs
Id(A) Error(%)
Measurement Simulation
0.001 0.034 0.035 2.941
0.002 0.070 0.072 2.857
0.005 0.185 0.181 -2.162
0.010 0.370 0.362 -2.162
0.020 0.730 0.723 -0.959
0.050 1.170 1.135 -2.991
0.100 1.620 1.603 -1.049
0.200 2.250 2.252 0.089
0.500 3.530 3.510 -0.567
1.000 4.900 4.895 -0.102
2.000 6.800 6.789 -0.162


Vgs-Id Characteristic

Circuit Simulation result

10A

1.0A

100mA

10mA

1.0mA
0V 1.0V 2.0V
I(V3)
V_V2

Evaluation circuit

V3

0Vdc

U1
SSM3K102TU
Vv ariable

10Vdc 3Vdc

V2

0


Comparison Graph


10.000
Measurement
Simulation

1.000
ID : Drain Current A

0.100

0.010

0.001
0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 5.00
VGS : Gate to Source Voltage V

Simulation Result

VGS(V)
ID(A) Error (%)
0.001 0.640 0.660 3.125
0.002 0.680 0.667 -1.912
0.005 0.700 0.680 -2.857
0.010 0.730 0.695 -4.795
0.020 0.750 0.715 -4.667
0.050 0.790 0.757 -4.177
0.100 0.820 0.805 -1.829
0.200 0.900 0.869 -3.444
0.500 1.010 1.000 -0.990
1.000 1.130 1.149 1.681
2.000 1.350 1.356 0.444


Rds(on) Characteristic


1.6A

1.4A

1.2A

1.0A

0.8A

0.6A

0.4A

0.2A

0A
0V 10mV 20mV 30mV 40mV 50mV 60mV 70mV 80mV 90mV
I(V3)
V_VDS

Evaluation circuit

V3

0Vdc

U1
SSM3K102TU
VDS

10Vdc 0Vdc

VGS

0

Simulation Result

ID=1A, VGS=4V Measurement Simulation Error (%)
R DS (on) () 63.000 63.025 0.040


Gate Charge Characteristic

12V

10V

8V

6V

4V

2V

0V
0 2n 4n 6n 8n 10n 12n 14n 16n
V(W1:3)
Time*1mS

Evaluation circuit

V2

0Vdc

U1

SSM3K102TU

PER = 1000u Dbreak
PW = 600u W1
TF = 10n + D1
TR = 10n I2
-
TD = 0 1.875Adc
I2 = 1m W
I1 IOFF = 0.1mA
I1 = 0 ION = 0uA

V1
15Vdc

0

Simulation Result

VDD=15V,ID=1.875A
Measurement Simulation Error (%)
,VGS=10V
Qgs(nc) 0.400 0.403 0.750
Qgd(nc) 1.200 1.211 0.917
Qg(nc) 13.200 13.209 0.068


Capacitance Characteristic

Measurement
Simulation

Simulation Result

Cbd(pF)
VDS(V) Error(%)
0.100 36.300 36.200 -0.275
0.200 33.600 33.650 0.149
0.500 28.600 28.620 0.070
1.000 23.900 24.000 0.418
2.000 19.300 19.400 0.518
5.000 14.100 14.050 -0.355
10.000 10.800 10.830 0.278
20.000 8.400 8.350 -0.595


Switching Time Characteristic


20.0V

17.5V

15.0V

12.5V

10.0V

7.5V

5.0V

2.5V

0V
1.65us 1.75us 1.85us 1.95us 2.05us 2.15us 2.25us 2.38us
V(2)*4 V(3)
Time

Evaluation circuit

3 L2

50n

U1
SSM3K102TU
RL
R1 L1 2
40
V1 = 0
4.7 30nH
V2 = 5 V2 VDD
TD = 2u R2 10Vdc
TR = 10n
TF = 10n 4.7
PW = 1u
PER = 10u

0

Simulation Result

ID=0.25A, VDD=10V
Measurement Simulation Error(%)
VGS=2.5V
Ton(ns) 9.000 8.993 -0.078


Output Characteristic


5.0A

4.0A
1.6V

3.0A 1.5V

1.4V
2.0A
1.3V

1.0A
VGS=1.2V

0A
0V 1V 2V 3V 4V 5V 6V 7V 8V 9V 10V
I(Vdsense)
V_Vvariable

Evaluation circuit

Vdsense

0Vdc

U1
SSM3K102TU
Vv ariable

10Vdc
0Vdc

Vstep

0


Output Characteristic Reference


Forward Current Characteristic


10A

1.0A

100mA

10mA

1.0mA
0V 0.2V 0.4V 0.6V 0.8V 1.0V 1.2V
I(R1)
V_V1

Evaluation Circuit

R1

0.01m

V1 U1
0Vdc SSM3K102TU

0


Comparison Graph


10.00
Measurement
Simulation

1.00
Drain reverse current IDR(A)

0.10

0.01

0.00
0 0.2 0.4 0.6 0.8 1 1.2

Source: Drain voltage VSD(V)

Simulation Result

VSD(V) VSD(V)
IDR(A) %Error
0.001 0.387 0.386 -0.258
0.002 0.406 0.405 -0.246
0.005 0.432 0.433 0.231
0.010 0.454 0.452 -0.441
0.020 0.474 0.475 0.211
0.050 0.504 0.503 -0.198
0.100 0.530 0.528 -0.377
0.200 0.554 0.555 0.181
0.500 0.602 0.601 -0.166
1.000 0.646 0.647 0.155
2.000 0.700 0.701 0.143


Reverse Recovery Characteristic


400mA

0A

-400mA
20.06us 20.08us 20.10us 20.12us 20.14us 20.16us
I(R1)
Time

Evaluation Circuit

R1

50

V1 = -9.5v V1
V2 = 10.5v U1
TD = 100n DSSM3K102TU
TR = 1ns
TF = 1ns
PW = 20us
PER = 100us

0

Compare Measurement vs. Simulation

Measurement Simulation Error (%)
Trj(ns) 7.400 7.399 -0.014
trb(ns) 5.800 5.802 0.034
trr(ns) 13.200 13.201 0.008


Reverse Recovery Characteristic Reference

Trj=7.4(ns)
Trb=5.8(ns)
Conditions:Ifwd=lrev=0.2(A),Rl=50

Example

Relation between trj and trb


Zener Voltage Characteristic


10uA

9uA

8uA

7uA

6uA

5uA

4uA

3uA

2uA

1uA

0A
0V 2V 4V 6V 8V 10V 12V 14V 16V 18V 20V
I(R1)
V_V1

Evaluation Circuit

R1

0.01m

V1 U1
0Vdc SSM3K102TU

R2

100MEG

0


Zener Voltage Characteristic Reference


SPICE MODEL of SSM3K102TU (Professional+BDP Model) in SPICE PARK

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