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International Journal of Electrical and Computer Engineering (IJECE)
Vol. 8, No. 2, April 2018, pp. 900 – 907
ISSN: 2088-8708 900
Institute of Advanced Engineering and Science
w w w . i a e s j o u r n a l . c o m
Simulation and Modeling of Silicon Based Single Electron
Transistor
Malik Ashter Mehdy, Mariagrazia Graziano, and Gianluca Piccinini
Department of Electronics and Telecommunications, Politecnico di Torino, Italy
Article Info
Article history:
Received: Jul 29, 2017
Revised: Dec 29, 2017
Accepted: Jan 27, 2018
Keyword:
Single Electron Transistor
TCAD Simulations
NEGF
Coulomb Blockade
Transmission Spectrum
ABSTRACT
In this work, we simulated and modeled silicon quantum dot based single electron transistor
(SET). We simulated the device using non-equilibrium Green’s function (NEGF) formal-
ism in transport direction coupled with Schrodinger equation in transverse directions. The
characteristics of SET such as Coulomb blockade and Coulomb diamonds were observed.
We also present a new efficient model to calculate the current voltage (IV) characteristics
of the SET. The IV characteristic achieved from the model are very similar to those from
simulations both in shape and magnitude. The proposed model is capable of reproducing
the Coulomb diamond diagram in good agreement with the simulations. The model, which
is based on transmission spectrum, is simple, efficient and provides insights on the physics
of the device. The transmission spectrum at equilibrium is achieved from simulations and
given as input to the model. The model then calculates the evolved transmission spectra at
non-equilibrium conditions and evaluates the current using Landauers formula.
Copyright c 2018 Institute of Advanced Engineering and Science.
All rights reserved.
Corresponding Author:
Malik Ashter Mehdy
Department of Electronics and Telecommunications
Politecnico di Torino,
corso Duca degli Abruzzi, 24, Torino, Italy
malik.mehdy@polito.it
1. INTRODUCTION
The CMOS technology is at the verge of the miniaturization and it needs to be replaced by the new tech-
nologies which should overcome its limitations. One of the most promising technologies is the one based on single
electron tunneling phenomenon. If a metallic or semiconducting island is placed between the electrodes separated by
the tunnel junctions with very small capacitance, the single electron phenomenon can be observed. When an electron
tunnels into the island it raises the electrostatic potential of island stopping the tunneling of the following electrons
until external potential is applied. This phenomenon is also known as Coulomb blockade. If the island size is very
small (so that the capacitance is very small), tunneling of single electrons can be controlled by the external electrode
potentials. Hence the devices based on single electron phenomenon have the attributes of small size and low power
consumption.
Over the years, many different schemes for digital logic using single electron transistor have been presented
[1–5]. In one scheme, the logic states are represented by the single electrons located at tiny metallic electrodes [1].
While such a scheme can provide the huge benefits in terms of high speed and very low power consumption, its
practical implementation faces serious challenges. Firstly, they should be operated at temperature much less than the
critical temperature, otherwise a thermally induced tunneling event can change the entire calculation. Secondly, the
output of one logic gate (single electron) should be capable of charging the input of following gates. This requires
the stray capacitance of interconnections to be kept negligible and complicated design rules for different number of
subsequent gates [2].
The devices based on silicon are very important part of the today’s digital world [6–8]. Single electron
transistors (SET) based on silicon have been previously studied in [9–11]. In order to operate the transistor at room
temperature, the size of the island should be less than 5nm [12]. The nano-lithography techniques now a days allow
to define such small structures with only a few variations. In this work, we simulate and model the SET based on
Journal Homepage: http://iaescore.com/journals/index.php/IJECE
Institute of Advanced Engineering and Science
w w w . i a e s j o u r n a l . c o m
, DOI: 10.11591/ijece.v8i2.pp900-907
IJECE ISSN: 2088-8708 901
a)
Height
Width
Length
b)
Contact Contact
Silicon
Insulator
Air
Si Island
Tunnel
Junction
Tunnel
Junction
Figure 1. a) The three-dimensional structure of the device which is simulated in Atlas TCAD b) Cross section of the
same device as seen from the sides. Different materials and the dimensional parameters are highlighted and drain and
source contacts are mentioned. The gate contact is all around the device.
silicon quantum dot with a size of 1nm. We present two novel contributions in this work. i) We simulate Si based SET,
for the first time, using Atlas TCAD [13] with non-equilibrium Green’s function (NEGF) technique. The results are
comparable to the experimental results with similar devices. NEGF formalism is a robust technique for the quantum
level simulations. Anantram et. al used NEGF technique to model nanodevices [14]. The transport through quantum
dot weakly coupled with the contacts is studied using NEGF technique in [15]. ii) We propose transmission spectrum
based model for the evaluation of SET characteristics. The proposed model, which is the extended version of [16],
uses transmission spectrum to calculate the current. It does not need any complex initial set up and is very efficient,
simple, sufficiently accurate and flexible to implement in different conditions. In comparison, Monte Carlo based
models [17] are accurate but very time consuming. Macromodeling based models [18] [19] are efficient but provide a
little physical insights on the device behavior. Analytical models based on physics [20] and master equation [21] solve
this problem but they still require a complex procedure to calculate tunnel junction resistances and capacitances [22].
These models require the tunnel junction resistances and capacitances as input while the proposed model requires
transmission spectrum as input. The transmission spectrum provides insights on the physics of device especially about
the density of states of island which lacks in case of other models. We can easily change the model for the variations
in contact coupling, gate coupling and density of state variations due to different fabricated size of island. From the
transmission spectrum current is calculated using Landauers formula. The rest of the paper is organized as follows. In
section II the explanation of the device and simulations are described. In section III the details of proposed model are
given. In section IV the results are discussed and the section V concludes the paper.
2. RESEARCH METHODOLOGY
We simulated the single electron transistor (SET) based on silicon island and the drain and source contacts
made of highly doped silicon (Fig. 1). The cross section of the island (height into width) is 1x1nm and the length is
2nm. The tunnel junctions are created by the gap between the island and contacts. These gaps provide the confinement
in the transport direction and decouple the island from electrodes. The silicon island is warped by the oxide through
which gate contact controls the conduction in the island. The device works as the single electron transistor and shows
the characteristics of SET such as Coulomb diamonds as shown in results section. We simulated the device in Atlas
TCAD using non-equilibrium Green’s function (NEGF) formalism in transport direction coupled with Schrodinger
equation in transverse direction. The simulator uses mode space technique instead of solving 2d or 3d problem.
First solving the Schrodinger equation eigenvalues and eigen vectors are calculated in each slice of device. Then a
transport equation is solved for electrons moving in lowest sub-bands which are occupied. This reduces the size of
the problem [13]. But still the simulations are very time consuming and there is a need for an efficient model. From
the simulations, we can achieve the transmission spectrum (TS) at equilibrium which is fed to the model to compute
the IV characteristics. The IV characteristics are also calculated from the simulations to compare with those from the
model.
Simulation and Modeling of Silicon Based Single ... (Malik Ashter Mehdy)
902 ISSN: 2088-8708
Figure 2. The flow chart of the model: at equilibrium, the transmission spectrum is constructed using parameters from
simulations, while at non-equilibrium conditions, shift is calculated by the self-consistent loop.
3. THE PROPOSED MODEL
The proposed model uses transmission spectrum (TS) to calculate the characteristics of single electron tran-
sistors. In our previous works, we have implemented earlier versions of the model to molecular devices [23] and
silicon nanocrystals [16]. The current model is implemented on SET and the difference from [23] is the implemen-
tation of two spectra for different spin as explained in [16]. In this work, we extend the model presented in [16] to
implement the gate voltage in order to use the silicon nanocrystal as SET. Further explanation on the modeling of gate
voltage can be found in the following description and in the results section. The model takes as input the transmission
spectrum at equilibrium from the simulations. From the transmission spectrum, current is calculated using Landauers
formula. The evolution in transmission spectrum with applied voltage is calculated by the model using self-consistent
field technique. By evaluating the TS at all voltages (Vds, Vg) and using the Landauers formula, IV characteristics of
the device can be calculated [24].
We calculate the TS at equilibrium using Atlas TCAD. The TS parameters i.e. position, amplitude and width
of peaks are given as input to the model. The model uses these parameters to construct the TS at equilibrium. The
shape of the peaks is defined by the Lorentzian function.
D0 = k0 × Norm(
γ1γ2
(E − )2 + γ2
) (1)
Here D0 is the transmission peak defined over the range of energies E, is the position of the corresponding peak and
γ is the sum of drain and source rate constants γ1,γ2. The width (or broadening) of the transmission peaks is defined
by γ. After normalizing the Lorentzian function, it is multiplied by the amplitude of the corresponding peak k0. Other
peaks are calculated similarly and then TS is constructed by adding all the transmission peaks. The same procedure is
repeated for both spins and two spectra are achieved. Although at this point both the spectra are similar, the difference
arises when the shift in spectra is calculated as explained below.
When the voltage is applied, transmission spectrum shifts on the energy axis. The shift is caused by the
external potential and because of the change in number of electrons. At equilibrium, the Fermi level of island is
IJECE Vol. 8, No. 2, April 2018: 900 – 907
IJECE ISSN: 2088-8708 903
aligned with the drain and source chemical potential. When the drain to source voltage (Vds) is applied the drain
and source chemical potential split and the separation is so called bias window. If there is a transmission peak inside
or at the edge of the bias window then the number of electrons (N) at the island change. If the transmission peak
corresponds to the spin up electrons the change in number of electrons are calculated using following formula.
NUP/DN =
γ1f1UP/DN ( ) + γ2f2UP/DN ( )
γ1 + γ2
(2)
Here f1UP/DN ( ) and f2UP/DN ( ) are the drain and source Fermi functions with respect to the corresponding spin
up/down transmission peaks ( ) If the number of electrons increase in the island the energy of the system increases
so the transmission spectrum shifts towards higher energies and vice versa. The overall shift is the result of both i.e.
change in number of electrons and the applied drain to source bias. The positive gate voltage lowers the energy of the
island so it shifts the transmission spectrum towards low energies. The overall shift (U) can be calculated using:
UUP/DN = UL + U0∆NDN/UP (3)
where U0 is the single electron charging energy, ∆NDN/UP is the change in number of spin down/up electrons and
UL = αdVds + αgVg is Laplace potential. The effect of the external voltages is modeled by the coupling coefficients
αd, αg. Equation 2 and 3 are solved self-consistently to calculate the shift in transmission spectrum with respect to
the applied voltage. The shift in both the spectra for spin up and spin down is calculated. The shift in the spin up
transmission spectrum is calculated from the change in number of spin down electrons as spin up electron feels the
potential due to spin down electron and vice versa [24].
When a positive gate voltage is applied and a lowest unoccupied molecular level (LUMO) goes below the
drain and source chemical potentials, the number of electrons increase on the island. This increase in number of
electrons causes the rate constant (γ) to decrease so the width of the transmission peaks also reduces. In the current
version of the model, the change in width is calculated using fitting parameters. Another effect of the increase in
number of electrons on the island is to reduce the gate coupling (αg). With the increase in number of electrons on
the island the amount of shift in transmission spectra due to increase in gate voltage reduces. We implement this
-2 -1 0 1 2 3
Energy (eV)
0
1
2
3
Model
Simulations
-2 -1 0 1 2 3
0
1
2
3
Model
Simulations
(b)
-2 -1 0 1 2 3
Energy (eV)
0
1
2
3
Model
Simulations
-2 -1 0 1 2 3
Energy (eV)
0
1
2
3
Model
Simulations
Tranmission
-2 -1 0 1 2 3
Energy (eV)
0
1
2
3
Model
Simulations
(a)
(d)
(c)
Ef=0
HOMO-LUMO Gap
(e)
Figure 3. Transmission spectra at different Vg and Vds achieved from simulations and model. The bias window is
shown as the dashed lines. a) Vg = 0.0V , Vds = 0.0V b) Vg = 1.0V , Vds = 0.0V c) Vg = 1.0V , Vds = 1.0V d)
Vg = 1.5V , Vds = 1.0V e) Vg = 2.5V , Vds = 1.0V .
Simulation and Modeling of Silicon Based Single ... (Malik Ashter Mehdy)
904 ISSN: 2088-8708
effect in the model by linear fitting of αg with respect to the change in number of electrons (N). After evaluating the
transmission spectra evolved with the applied voltage we can find the current using Landauers formula.
IUP/DN =
q2
h
+∞
−∞
TUP/DN (E)[f1(E) − f2(E)]dE (4)
Here q is the electron charge, h is plank’s constant and T(E) is the transmission spectrum. The difference between
the source and drain Fermi functions models the effect of bias window so that only the part of transmission spectrum
which is inside the bias window is integrated. The total current is calculated by the sum of spin up and spin down
currents.
4. RESULTS AND DISCUSSION
Single electron transistor based on silicon quantum dot of 1nm cross section was simulated in Atlas TCAD
using NEGF formalism coupled with Schrodinger equation. The IV characteristics of the device were calculated from
simulations as well as from the model. In Fig. 3 the transmission spectra (TS) from simulations and model are shown
for different values of Vg and Vds. The lowest unoccupied molecular levels (LUMO) are shown while the highest
occupied molecular levels (HOMO) are not shown because they do not contribute to the conduction in this case as
they are far below the Fermi energy level (Ef = 0). The HOMO-LUMO gap and the Fermi energy level are also
mentioned in the Fig. 3 (a). The LUMO levels are relatively closer to Fermi level and by applying a positive gate
voltage we can shift them near Fermi level (Fig. 3 (b)). Then at a small value of Vds LUMO1 enters inside the bias
window and contributes to current (Fig. 3 (c,d,e)).
The comparison between the IV characteristics is shown in the Fig. 4. Drain current is plotted as a function
of drain to source bias for different values of gate voltage. At low gate voltages (i.e. less than 1 V) there are no
transmission peaks inside the bias window so a very small current flows through device because of tunneling of
electrons with very low probability. The model provides acceptable estimation of the current as shown in the figure in
case of Vg = 0.7, 0.8, 0.9, 1.0V . The first peak starts to enter in the bias window at Vg = 1V as shown in the Fig. 3
(c).
0.8V
1.2V
1.6V
0.7V
1.4V2.1V
1.1V
1.3V
1.5V
1.0V
1.7V
2.3V
(a) (b)
(c) (d)
2.4V
0.9V
Figure 4. Comparison of IV characteristics of the device at various gate voltages between the model and simulations.
Different curves are for different gate voltages mentioned by the curves. At lower gate voltages, less than 1.0V, there
are no peaks inside the bias window. First peak enters in the bias window at Vg = 1.1V so a high current flows. As
the gate voltage increases other peaks also contribute to the current.
IJECE Vol. 8, No. 2, April 2018: 900 – 907
IJECE ISSN: 2088-8708 905
-1 -0.5 0 0.5 1
Drain to Source Voltage(V)
-20
-10
0
10
20
DrainCurrent(µA)
Simulations
Model
Vg=1.8V
0 0.5 1
Drain to Source Voltage(V)
0
10
20
30
40
50
DrainCurrent(A)
Simulations
Model w/o Spin
Model w Spin
Figure 5. a) IV characteristics of the simulated device at gate voltage equal to 1.8V and for both positive and negative
drain to source bias. b) IV characteristics obtained from the previous model without considering the spin and from the
current model with the different spectra for spin at Vg = 2.0V .
The current is modeled very effectively at the gate voltages higher than 1V (Fig. 4) because the bias window,
for the selected range of Vds, includes the transmission peaks. As the model is transmission spectrum based so the
results are better when there is a transmission peak inside the bias window. For the sake of clarity, the different curves
shown here are selected in such a way that they do not overlap each other. In Fig. 5 (a) the IV characteristics for
both positive and negative drain to source bias are shown for Vg = 2.0V . This shows that our model is valid for
bidirectional electron flow. And in the Fig. 5 (b) the results from the previous model without considering the spin
(a)
(b)
(c)
Figure 6. The current plotted as a function of Vds and Vg. The shade of greyscale represents the drain current value
based on the scale shown in the figure. The three figures are obtained from a) simulations b) model c) model using
refined set of applied voltages.
Simulation and Modeling of Silicon Based Single ... (Malik Ashter Mehdy)
906 ISSN: 2088-8708
of electron (Model w/o Spin) is compared with the proposed model (Model w Spin) under the same conditions and
parameters. We can see that the proposed model provides very accurate results compared to the previous version of
the model in [23].
The current as a function of Vds and Vg is plotted on grayscale in Fig. 6. The magnitude of the current is
represented by the shade of the gray according to the scale shown in the figure. The dark regions represent the zero or
very small current while the current of higher magnitudes is represented by the light regions. The coulomb blockade
diamonds which are unique characteristics of SET can be seen in the form of dark regions. One large blockade
diamond and one small one can be observed in the figure. The model successfully predicts the same behavior as
obtained from simulations. The resolution of the plots in Fig. 6 (a,b) is not good and it would take high computational
effort to increase it in case of simulations. We have shown the high resolution achieved from the model in Fig. 6 (c).
The time required for the calculations in Fig. 6 (a,b) is 6346s by the TCAD simulations and 1.57s by the model. The
model takes 128s for the calculation with high resolution plot (210 Vds points and 260 Vg points) Fig. 6 (c). All the
simulations were performed on the same system with the Intel core i5 1.8 GHz processor and 6 GB of RAM. The
proposed model provides sufficiently accurate results while maintaining the efficiency. While other compact models
based on macromodeling are also efficient, the proposed model captures the physical information of device with more
details.
5. CONCLUSIONS
In this work, we simulated and modeled the single electron transistor based on silicon quantum dot. We
simulated the device in Atlas TCAD using NEGF formalism in transport direction coupled with Schrodinger equation
in transverse direction. The SET characteristics such as Coulomb blockade and Coulomb diamonds were observed in
the results obtained from the simulations and the model. The IV characteristics of the SET were obtained from the
model having a good agreement with the simulations. The proposed model is simple, efficient, flexible and provides
insights on the physics of the device. In the future, we will include in the model the effect of the change in number of
electrons on the width of the transmission peaks. We will also use the device for circuit level implementation.
REFERENCES
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[14] M. Anantram et al., “Modeling of nanoscale devices,” Proceedings of the IEEE, vol. 96, no. 9, pp. 1511–1550,
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[15] N. A. Zimbovskaya, “Electron transport through a quantum dot in the Coulomb blockade regime: nonequilibrium
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Microelectronics and Electronics (PRIME), 2016 12th Conference on. IEEE, 2016, pp. 1–4.
[17] C. Wasshuber et al., “SIMON-A simulator for single-electron tunnel devices and circuits,” IEEE Transactions
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BIOGRAPHIES OF AUTHORS
Malik Ashter Mehdy recieved his B.E. Electronics degree from Federal Urdu University, Islam-
abad, Pakistan in 2011 and M.S. degree in Nanotechnology from Politecnico di Torino, Italy in
2014. He is currently a PhD student in Department of Electronics and Telecommunication at Po-
litecnico di Torino,Italy. His research interests include, simulation and modeling of silicon based
single electron transistor.
Mariagrazia Graziano received the DrEng and the PhD degrees in Electronics Engineering from
the Politecnico di Torino, Italy, in 1997 and 2001, respectively. Since 2002, she is a researcher and
since 2005, an assistant professor at the Politecnico di Torino. Since 2008, she is adjunct faculty at
the University of Illinois at Chicago and since 2014 she is a Marie-Skodowska-Curie Intra-European
Fellow at the London Centre for Nanotechnology. Her research interests include design of CMOS
and beyond CMOS devices, circuits and architectures. She is author and coauthor of more than
120 published works. She is a Member of the IEEE since 2007. Further info on her homepage:
http://www.det.polito.it/personale/scheda/(nominativo)/mariagrazia.graziano
Gianluca Piccinini is a Full Professor since 2006 at the Department of Electronics of Po-
litecnico di Torino, Italy, where he teaches electron devices and integrated system technol-
ogy. He received the Dr. Ing and the Ph.D. degrees in electronics engineering in 1986 and
1990 respectively. His research activities started at the end of the 1980s, were initially fo-
cused on VLSI architecture for artificial intelligence and moved, during the 1990s, toward the
physical design of VLSI systems for high rate and high-speed transmission and coding algo-
rithms. His current interests involve the introduction of new technologies as molecular elec-
tronics in integrated systems where he studies transport, advanced microfabrication and self-
assembly technologies in molecular scale systems. He is author and co-author of more than 100
published works and is the holder of one international patent. Further info on his homepage:
http://www.det.polito.it/personale/scheda/(nominativo)/gianluca.piccinini
Simulation and Modeling of Silicon Based Single ... (Malik Ashter Mehdy)

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Simulation and Modeling of Silicon Based Single Electron Transistor

  • 1. International Journal of Electrical and Computer Engineering (IJECE) Vol. 8, No. 2, April 2018, pp. 900 – 907 ISSN: 2088-8708 900 Institute of Advanced Engineering and Science w w w . i a e s j o u r n a l . c o m Simulation and Modeling of Silicon Based Single Electron Transistor Malik Ashter Mehdy, Mariagrazia Graziano, and Gianluca Piccinini Department of Electronics and Telecommunications, Politecnico di Torino, Italy Article Info Article history: Received: Jul 29, 2017 Revised: Dec 29, 2017 Accepted: Jan 27, 2018 Keyword: Single Electron Transistor TCAD Simulations NEGF Coulomb Blockade Transmission Spectrum ABSTRACT In this work, we simulated and modeled silicon quantum dot based single electron transistor (SET). We simulated the device using non-equilibrium Green’s function (NEGF) formal- ism in transport direction coupled with Schrodinger equation in transverse directions. The characteristics of SET such as Coulomb blockade and Coulomb diamonds were observed. We also present a new efficient model to calculate the current voltage (IV) characteristics of the SET. The IV characteristic achieved from the model are very similar to those from simulations both in shape and magnitude. The proposed model is capable of reproducing the Coulomb diamond diagram in good agreement with the simulations. The model, which is based on transmission spectrum, is simple, efficient and provides insights on the physics of the device. The transmission spectrum at equilibrium is achieved from simulations and given as input to the model. The model then calculates the evolved transmission spectra at non-equilibrium conditions and evaluates the current using Landauers formula. Copyright c 2018 Institute of Advanced Engineering and Science. All rights reserved. Corresponding Author: Malik Ashter Mehdy Department of Electronics and Telecommunications Politecnico di Torino, corso Duca degli Abruzzi, 24, Torino, Italy malik.mehdy@polito.it 1. INTRODUCTION The CMOS technology is at the verge of the miniaturization and it needs to be replaced by the new tech- nologies which should overcome its limitations. One of the most promising technologies is the one based on single electron tunneling phenomenon. If a metallic or semiconducting island is placed between the electrodes separated by the tunnel junctions with very small capacitance, the single electron phenomenon can be observed. When an electron tunnels into the island it raises the electrostatic potential of island stopping the tunneling of the following electrons until external potential is applied. This phenomenon is also known as Coulomb blockade. If the island size is very small (so that the capacitance is very small), tunneling of single electrons can be controlled by the external electrode potentials. Hence the devices based on single electron phenomenon have the attributes of small size and low power consumption. Over the years, many different schemes for digital logic using single electron transistor have been presented [1–5]. In one scheme, the logic states are represented by the single electrons located at tiny metallic electrodes [1]. While such a scheme can provide the huge benefits in terms of high speed and very low power consumption, its practical implementation faces serious challenges. Firstly, they should be operated at temperature much less than the critical temperature, otherwise a thermally induced tunneling event can change the entire calculation. Secondly, the output of one logic gate (single electron) should be capable of charging the input of following gates. This requires the stray capacitance of interconnections to be kept negligible and complicated design rules for different number of subsequent gates [2]. The devices based on silicon are very important part of the today’s digital world [6–8]. Single electron transistors (SET) based on silicon have been previously studied in [9–11]. In order to operate the transistor at room temperature, the size of the island should be less than 5nm [12]. The nano-lithography techniques now a days allow to define such small structures with only a few variations. In this work, we simulate and model the SET based on Journal Homepage: http://iaescore.com/journals/index.php/IJECE Institute of Advanced Engineering and Science w w w . i a e s j o u r n a l . c o m , DOI: 10.11591/ijece.v8i2.pp900-907
  • 2. IJECE ISSN: 2088-8708 901 a) Height Width Length b) Contact Contact Silicon Insulator Air Si Island Tunnel Junction Tunnel Junction Figure 1. a) The three-dimensional structure of the device which is simulated in Atlas TCAD b) Cross section of the same device as seen from the sides. Different materials and the dimensional parameters are highlighted and drain and source contacts are mentioned. The gate contact is all around the device. silicon quantum dot with a size of 1nm. We present two novel contributions in this work. i) We simulate Si based SET, for the first time, using Atlas TCAD [13] with non-equilibrium Green’s function (NEGF) technique. The results are comparable to the experimental results with similar devices. NEGF formalism is a robust technique for the quantum level simulations. Anantram et. al used NEGF technique to model nanodevices [14]. The transport through quantum dot weakly coupled with the contacts is studied using NEGF technique in [15]. ii) We propose transmission spectrum based model for the evaluation of SET characteristics. The proposed model, which is the extended version of [16], uses transmission spectrum to calculate the current. It does not need any complex initial set up and is very efficient, simple, sufficiently accurate and flexible to implement in different conditions. In comparison, Monte Carlo based models [17] are accurate but very time consuming. Macromodeling based models [18] [19] are efficient but provide a little physical insights on the device behavior. Analytical models based on physics [20] and master equation [21] solve this problem but they still require a complex procedure to calculate tunnel junction resistances and capacitances [22]. These models require the tunnel junction resistances and capacitances as input while the proposed model requires transmission spectrum as input. The transmission spectrum provides insights on the physics of device especially about the density of states of island which lacks in case of other models. We can easily change the model for the variations in contact coupling, gate coupling and density of state variations due to different fabricated size of island. From the transmission spectrum current is calculated using Landauers formula. The rest of the paper is organized as follows. In section II the explanation of the device and simulations are described. In section III the details of proposed model are given. In section IV the results are discussed and the section V concludes the paper. 2. RESEARCH METHODOLOGY We simulated the single electron transistor (SET) based on silicon island and the drain and source contacts made of highly doped silicon (Fig. 1). The cross section of the island (height into width) is 1x1nm and the length is 2nm. The tunnel junctions are created by the gap between the island and contacts. These gaps provide the confinement in the transport direction and decouple the island from electrodes. The silicon island is warped by the oxide through which gate contact controls the conduction in the island. The device works as the single electron transistor and shows the characteristics of SET such as Coulomb diamonds as shown in results section. We simulated the device in Atlas TCAD using non-equilibrium Green’s function (NEGF) formalism in transport direction coupled with Schrodinger equation in transverse direction. The simulator uses mode space technique instead of solving 2d or 3d problem. First solving the Schrodinger equation eigenvalues and eigen vectors are calculated in each slice of device. Then a transport equation is solved for electrons moving in lowest sub-bands which are occupied. This reduces the size of the problem [13]. But still the simulations are very time consuming and there is a need for an efficient model. From the simulations, we can achieve the transmission spectrum (TS) at equilibrium which is fed to the model to compute the IV characteristics. The IV characteristics are also calculated from the simulations to compare with those from the model. Simulation and Modeling of Silicon Based Single ... (Malik Ashter Mehdy)
  • 3. 902 ISSN: 2088-8708 Figure 2. The flow chart of the model: at equilibrium, the transmission spectrum is constructed using parameters from simulations, while at non-equilibrium conditions, shift is calculated by the self-consistent loop. 3. THE PROPOSED MODEL The proposed model uses transmission spectrum (TS) to calculate the characteristics of single electron tran- sistors. In our previous works, we have implemented earlier versions of the model to molecular devices [23] and silicon nanocrystals [16]. The current model is implemented on SET and the difference from [23] is the implemen- tation of two spectra for different spin as explained in [16]. In this work, we extend the model presented in [16] to implement the gate voltage in order to use the silicon nanocrystal as SET. Further explanation on the modeling of gate voltage can be found in the following description and in the results section. The model takes as input the transmission spectrum at equilibrium from the simulations. From the transmission spectrum, current is calculated using Landauers formula. The evolution in transmission spectrum with applied voltage is calculated by the model using self-consistent field technique. By evaluating the TS at all voltages (Vds, Vg) and using the Landauers formula, IV characteristics of the device can be calculated [24]. We calculate the TS at equilibrium using Atlas TCAD. The TS parameters i.e. position, amplitude and width of peaks are given as input to the model. The model uses these parameters to construct the TS at equilibrium. The shape of the peaks is defined by the Lorentzian function. D0 = k0 × Norm( γ1γ2 (E − )2 + γ2 ) (1) Here D0 is the transmission peak defined over the range of energies E, is the position of the corresponding peak and γ is the sum of drain and source rate constants γ1,γ2. The width (or broadening) of the transmission peaks is defined by γ. After normalizing the Lorentzian function, it is multiplied by the amplitude of the corresponding peak k0. Other peaks are calculated similarly and then TS is constructed by adding all the transmission peaks. The same procedure is repeated for both spins and two spectra are achieved. Although at this point both the spectra are similar, the difference arises when the shift in spectra is calculated as explained below. When the voltage is applied, transmission spectrum shifts on the energy axis. The shift is caused by the external potential and because of the change in number of electrons. At equilibrium, the Fermi level of island is IJECE Vol. 8, No. 2, April 2018: 900 – 907
  • 4. IJECE ISSN: 2088-8708 903 aligned with the drain and source chemical potential. When the drain to source voltage (Vds) is applied the drain and source chemical potential split and the separation is so called bias window. If there is a transmission peak inside or at the edge of the bias window then the number of electrons (N) at the island change. If the transmission peak corresponds to the spin up electrons the change in number of electrons are calculated using following formula. NUP/DN = γ1f1UP/DN ( ) + γ2f2UP/DN ( ) γ1 + γ2 (2) Here f1UP/DN ( ) and f2UP/DN ( ) are the drain and source Fermi functions with respect to the corresponding spin up/down transmission peaks ( ) If the number of electrons increase in the island the energy of the system increases so the transmission spectrum shifts towards higher energies and vice versa. The overall shift is the result of both i.e. change in number of electrons and the applied drain to source bias. The positive gate voltage lowers the energy of the island so it shifts the transmission spectrum towards low energies. The overall shift (U) can be calculated using: UUP/DN = UL + U0∆NDN/UP (3) where U0 is the single electron charging energy, ∆NDN/UP is the change in number of spin down/up electrons and UL = αdVds + αgVg is Laplace potential. The effect of the external voltages is modeled by the coupling coefficients αd, αg. Equation 2 and 3 are solved self-consistently to calculate the shift in transmission spectrum with respect to the applied voltage. The shift in both the spectra for spin up and spin down is calculated. The shift in the spin up transmission spectrum is calculated from the change in number of spin down electrons as spin up electron feels the potential due to spin down electron and vice versa [24]. When a positive gate voltage is applied and a lowest unoccupied molecular level (LUMO) goes below the drain and source chemical potentials, the number of electrons increase on the island. This increase in number of electrons causes the rate constant (γ) to decrease so the width of the transmission peaks also reduces. In the current version of the model, the change in width is calculated using fitting parameters. Another effect of the increase in number of electrons on the island is to reduce the gate coupling (αg). With the increase in number of electrons on the island the amount of shift in transmission spectra due to increase in gate voltage reduces. We implement this -2 -1 0 1 2 3 Energy (eV) 0 1 2 3 Model Simulations -2 -1 0 1 2 3 0 1 2 3 Model Simulations (b) -2 -1 0 1 2 3 Energy (eV) 0 1 2 3 Model Simulations -2 -1 0 1 2 3 Energy (eV) 0 1 2 3 Model Simulations Tranmission -2 -1 0 1 2 3 Energy (eV) 0 1 2 3 Model Simulations (a) (d) (c) Ef=0 HOMO-LUMO Gap (e) Figure 3. Transmission spectra at different Vg and Vds achieved from simulations and model. The bias window is shown as the dashed lines. a) Vg = 0.0V , Vds = 0.0V b) Vg = 1.0V , Vds = 0.0V c) Vg = 1.0V , Vds = 1.0V d) Vg = 1.5V , Vds = 1.0V e) Vg = 2.5V , Vds = 1.0V . Simulation and Modeling of Silicon Based Single ... (Malik Ashter Mehdy)
  • 5. 904 ISSN: 2088-8708 effect in the model by linear fitting of αg with respect to the change in number of electrons (N). After evaluating the transmission spectra evolved with the applied voltage we can find the current using Landauers formula. IUP/DN = q2 h +∞ −∞ TUP/DN (E)[f1(E) − f2(E)]dE (4) Here q is the electron charge, h is plank’s constant and T(E) is the transmission spectrum. The difference between the source and drain Fermi functions models the effect of bias window so that only the part of transmission spectrum which is inside the bias window is integrated. The total current is calculated by the sum of spin up and spin down currents. 4. RESULTS AND DISCUSSION Single electron transistor based on silicon quantum dot of 1nm cross section was simulated in Atlas TCAD using NEGF formalism coupled with Schrodinger equation. The IV characteristics of the device were calculated from simulations as well as from the model. In Fig. 3 the transmission spectra (TS) from simulations and model are shown for different values of Vg and Vds. The lowest unoccupied molecular levels (LUMO) are shown while the highest occupied molecular levels (HOMO) are not shown because they do not contribute to the conduction in this case as they are far below the Fermi energy level (Ef = 0). The HOMO-LUMO gap and the Fermi energy level are also mentioned in the Fig. 3 (a). The LUMO levels are relatively closer to Fermi level and by applying a positive gate voltage we can shift them near Fermi level (Fig. 3 (b)). Then at a small value of Vds LUMO1 enters inside the bias window and contributes to current (Fig. 3 (c,d,e)). The comparison between the IV characteristics is shown in the Fig. 4. Drain current is plotted as a function of drain to source bias for different values of gate voltage. At low gate voltages (i.e. less than 1 V) there are no transmission peaks inside the bias window so a very small current flows through device because of tunneling of electrons with very low probability. The model provides acceptable estimation of the current as shown in the figure in case of Vg = 0.7, 0.8, 0.9, 1.0V . The first peak starts to enter in the bias window at Vg = 1V as shown in the Fig. 3 (c). 0.8V 1.2V 1.6V 0.7V 1.4V2.1V 1.1V 1.3V 1.5V 1.0V 1.7V 2.3V (a) (b) (c) (d) 2.4V 0.9V Figure 4. Comparison of IV characteristics of the device at various gate voltages between the model and simulations. Different curves are for different gate voltages mentioned by the curves. At lower gate voltages, less than 1.0V, there are no peaks inside the bias window. First peak enters in the bias window at Vg = 1.1V so a high current flows. As the gate voltage increases other peaks also contribute to the current. IJECE Vol. 8, No. 2, April 2018: 900 – 907
  • 6. IJECE ISSN: 2088-8708 905 -1 -0.5 0 0.5 1 Drain to Source Voltage(V) -20 -10 0 10 20 DrainCurrent(µA) Simulations Model Vg=1.8V 0 0.5 1 Drain to Source Voltage(V) 0 10 20 30 40 50 DrainCurrent(A) Simulations Model w/o Spin Model w Spin Figure 5. a) IV characteristics of the simulated device at gate voltage equal to 1.8V and for both positive and negative drain to source bias. b) IV characteristics obtained from the previous model without considering the spin and from the current model with the different spectra for spin at Vg = 2.0V . The current is modeled very effectively at the gate voltages higher than 1V (Fig. 4) because the bias window, for the selected range of Vds, includes the transmission peaks. As the model is transmission spectrum based so the results are better when there is a transmission peak inside the bias window. For the sake of clarity, the different curves shown here are selected in such a way that they do not overlap each other. In Fig. 5 (a) the IV characteristics for both positive and negative drain to source bias are shown for Vg = 2.0V . This shows that our model is valid for bidirectional electron flow. And in the Fig. 5 (b) the results from the previous model without considering the spin (a) (b) (c) Figure 6. The current plotted as a function of Vds and Vg. The shade of greyscale represents the drain current value based on the scale shown in the figure. The three figures are obtained from a) simulations b) model c) model using refined set of applied voltages. Simulation and Modeling of Silicon Based Single ... (Malik Ashter Mehdy)
  • 7. 906 ISSN: 2088-8708 of electron (Model w/o Spin) is compared with the proposed model (Model w Spin) under the same conditions and parameters. We can see that the proposed model provides very accurate results compared to the previous version of the model in [23]. The current as a function of Vds and Vg is plotted on grayscale in Fig. 6. The magnitude of the current is represented by the shade of the gray according to the scale shown in the figure. The dark regions represent the zero or very small current while the current of higher magnitudes is represented by the light regions. The coulomb blockade diamonds which are unique characteristics of SET can be seen in the form of dark regions. One large blockade diamond and one small one can be observed in the figure. The model successfully predicts the same behavior as obtained from simulations. The resolution of the plots in Fig. 6 (a,b) is not good and it would take high computational effort to increase it in case of simulations. We have shown the high resolution achieved from the model in Fig. 6 (c). The time required for the calculations in Fig. 6 (a,b) is 6346s by the TCAD simulations and 1.57s by the model. The model takes 128s for the calculation with high resolution plot (210 Vds points and 260 Vg points) Fig. 6 (c). All the simulations were performed on the same system with the Intel core i5 1.8 GHz processor and 6 GB of RAM. The proposed model provides sufficiently accurate results while maintaining the efficiency. While other compact models based on macromodeling are also efficient, the proposed model captures the physical information of device with more details. 5. CONCLUSIONS In this work, we simulated and modeled the single electron transistor based on silicon quantum dot. We simulated the device in Atlas TCAD using NEGF formalism in transport direction coupled with Schrodinger equation in transverse direction. The SET characteristics such as Coulomb blockade and Coulomb diamonds were observed in the results obtained from the simulations and the model. The IV characteristics of the SET were obtained from the model having a good agreement with the simulations. The proposed model is simple, efficient, flexible and provides insights on the physics of the device. In the future, we will include in the model the effect of the change in number of electrons on the width of the transmission peaks. We will also use the device for circuit level implementation. REFERENCES [1] K. Likharev, “Single-electron transistors: Electrostatic analogs of the DC SQUIDS,” IEEE transactions on mag- netics, vol. 23, no. 2, pp. 1142–1145, 1987. [2] J. Tucker, “Complementary digital logic based on the ”Coulomb blockade”,” Journal of Applied Physics, vol. 72, no. 9, pp. 4399–4413, 1992. [3] H. Fukui et al., “Simple and stable single-electron logic utilizing tunnel-junction load,” Japanese journal of applied physics, vol. 34, no. 2S, p. 1345, 1995. [4] K. Uchida et al., “Programmable single-electron transistor logic for future low-power intelligent LSI: proposal and room-temperature operation,” IEEE Transactions on Electron Devices, vol. 50, no. 7, pp. 1623–1630, 2003. [5] M. Abutaleb, “A new static differential design style for hybrid SET–CMOS logic circuits,” Journal of Computa- tional Electronics, vol. 14, no. 1, pp. 329–340, 2015. [6] G. Srikanth et al., “Fabrication and analysis of amorphous silicon tft,” International Journal of Electrical and Computer Engineering (IJECE), vol. 7, no. 2, pp. 754–758, 2017. [7] B. Mehrdel et al., “Effect of device variables on surface potential and threshold voltage in dg-gnrfet,” Interna- tional Journal of Electrical and Computer Engineering (IJECE), vol. 5, no. 5, 2015. [8] M. Khaouani and A. Guen-Bouazza, “Impact of multiple channels on the characteristics of rectangular gaa mosfet,” International Journal of Electrical and Computer Engineering (IJECE), vol. 7, no. 4, pp. 1899–1905, 2017. [9] L. Zhuang et al., “Silicon single-electron quantum-dot transistor switch operating at room temperature,” Applied Physics Letters, vol. 72, no. 10, pp. 1205–1207, 1998. [10] D. H. Kim et al., “Single-electron transistors based on gate-induced Si island for single-electron logic applica- tion,” IEEE transactions on nanotechnology, vol. 99, no. 4, pp. 170–175, 2002. [11] A. Samanta et al., “Single-electron quantization at room temperature in a-few-donor quantum dot in silicon nano-transistors,” Applied Physics Letters, vol. 110, no. 9, p. 093107, 2017. [12] Y. Tanahashi et al., “Peak position control of Coulomb blockade oscillations in silicon single-electron transistors with floating gate operating at room temperature,” Japanese Journal of Applied Physics, vol. 53, no. 4S, p. 04EJ08, 2014. [13] ATLAS Users Manual, “Silvaco International,” Santa Clara, CA, 2014. IJECE Vol. 8, No. 2, April 2018: 900 – 907
  • 8. IJECE ISSN: 2088-8708 907 [14] M. Anantram et al., “Modeling of nanoscale devices,” Proceedings of the IEEE, vol. 96, no. 9, pp. 1511–1550, 2008. [15] N. A. Zimbovskaya, “Electron transport through a quantum dot in the Coulomb blockade regime: nonequilibrium Green’s function based model,” Physical Review B, vol. 78, no. 3, p. 035331, 2008. [16] M. A. Mehdy et al., “An efficient model for evaluating current in silicon nanocrystals,” in Ph. D. Research in Microelectronics and Electronics (PRIME), 2016 12th Conference on. IEEE, 2016, pp. 1–4. [17] C. Wasshuber et al., “SIMON-A simulator for single-electron tunnel devices and circuits,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 16, no. 9, pp. 937–944, 1997. [18] Y. S. Yu et al., “Macromodeling of single-electron transistors for efficient circuit simulation,” IEEE transactions on electron devices, vol. 46, no. 8, pp. 1667–1671, 1999. [19] A. Ghosh et al., “A modified macro model approach for SPICE based simulation of single electron transistor,” Journal of Computational Electronics, vol. 15, no. 2, pp. 400–406, 2016. [20] S.-H. Lee et al., “A practical SPICE model based on the physics and characteristics of realistic single-electron transistors,” IEEE transactions on nanotechnology, vol. 99, no. 4, pp. 226–232, 2002. [21] K. Miyaji et al., “Compact analytical model for room-temperature-operating silicon single-electron transistors with discrete quantum energy levels,” IEEE transactions on Nanotechnology, vol. 5, no. 3, pp. 167–173, 2006. [22] S. Mahapatra et al., “Analytical modeling of single electron transistor for hybrid CMOS-SET analog IC design,” IEEE Transactions on Electron Devices, vol. 51, no. 11, pp. 1772–1782, 2004. [23] A. Zahir et al., “EE-BESD: molecular FET modeling for efficient and effective nanocomputing design,” Journal of Computational Electronics, vol. 15, no. 2, pp. 479–491, 2016. [24] S. Datta, Quantum transport: atom to transistor. Cambridge University Press, 2005. BIOGRAPHIES OF AUTHORS Malik Ashter Mehdy recieved his B.E. Electronics degree from Federal Urdu University, Islam- abad, Pakistan in 2011 and M.S. degree in Nanotechnology from Politecnico di Torino, Italy in 2014. He is currently a PhD student in Department of Electronics and Telecommunication at Po- litecnico di Torino,Italy. His research interests include, simulation and modeling of silicon based single electron transistor. Mariagrazia Graziano received the DrEng and the PhD degrees in Electronics Engineering from the Politecnico di Torino, Italy, in 1997 and 2001, respectively. Since 2002, she is a researcher and since 2005, an assistant professor at the Politecnico di Torino. Since 2008, she is adjunct faculty at the University of Illinois at Chicago and since 2014 she is a Marie-Skodowska-Curie Intra-European Fellow at the London Centre for Nanotechnology. Her research interests include design of CMOS and beyond CMOS devices, circuits and architectures. She is author and coauthor of more than 120 published works. She is a Member of the IEEE since 2007. Further info on her homepage: http://www.det.polito.it/personale/scheda/(nominativo)/mariagrazia.graziano Gianluca Piccinini is a Full Professor since 2006 at the Department of Electronics of Po- litecnico di Torino, Italy, where he teaches electron devices and integrated system technol- ogy. He received the Dr. Ing and the Ph.D. degrees in electronics engineering in 1986 and 1990 respectively. His research activities started at the end of the 1980s, were initially fo- cused on VLSI architecture for artificial intelligence and moved, during the 1990s, toward the physical design of VLSI systems for high rate and high-speed transmission and coding algo- rithms. His current interests involve the introduction of new technologies as molecular elec- tronics in integrated systems where he studies transport, advanced microfabrication and self- assembly technologies in molecular scale systems. He is author and co-author of more than 100 published works and is the holder of one international patent. Further info on his homepage: http://www.det.polito.it/personale/scheda/(nominativo)/gianluca.piccinini Simulation and Modeling of Silicon Based Single ... (Malik Ashter Mehdy)