This document summarizes an experiment to optimize a sequential circuit by deriving its state table, state transition diagram, and K-maps. This allowed simplifying the circuit's sum-of-products expressions. The optimized circuit was then implemented using a GAL22V10 programmable logic device and a SN7474 chip containing D flip-flops. Some initial hardware issues were resolved by replacing the SN7474 chip. The use of the GAL22V10 simplified the circuit design compared to using multiple logic gates.