This document discusses digital logic gates and integrated circuits. It describes the NAND gate and how it is constructed from an AND gate and inverter. It explains that integrated circuit chips contain networks of transistors to perform logic functions and discusses the common 7400 series chips. It then gives details on an experiment to design and simulate OR, NAND, AND logic gate circuits using integrated circuits, resistors, LEDs, and a breadboard. Truth tables are provided to summarize the output for each gate based on the input values.

1. CONTENT
 Introduction
 Principle
 Basic Gates
 Integrated circuit logic chips
 Conclusion
 Bibliography

2. (d) THE NAND GATE is a combination of the digital
logic AND gate with that of an inverter or NOT gate
connected together in series.
The NAND gate has two inputs and one output.
The logic gate of NAND gate with A and B input and Y
as its output is shown below:

3. Integrated circuit logic chips
These chips are from the 74xxx series .These chips come
in a package known as DIP (Dual In-line Package)
because the plastic container has two parallel rows of
pins to connect the inner circuits to a circuit board.
Inside the package are networks of transistors designed
to perform a wide variety of functions. Each chip is
labeled with a number which indicates what the
function of the chip is. Pin 1 is marked by a small
circular indent or U-shaped indents at one end of the
chip, the remaining pins are numberedcounterclockwise
around the chip.
The 7400 chip, for example, contains four 2-input
NAND gates, but chips are available with all types of
logic gates. They are still in use today in electronic
devices where the power of a complete microprocessor is
not needed.

4. The 74xxx series of chips use bipolar transistors in a
type of circuit known as Transistor-Transistor Logic
(TTL). While MOS and CMOS technologies are more
compact and energy efficient than TTL, they are easily
damagedby static electricity. TTL circuits operate with 9
Volts DC power. Each chip must have the common or
negative connected to the Ground (GND) pin, and +9
volts connected to the pin marked Vcc (Common
Collector Voltage).
The IC used here is the logic gates 7400 chip which
contains four 2-input NAND gates.

5. AIM:
To design and simulate the OR, NAND, AND gate circuits.
COMPONENTS:
Integrated circuits of the required gates, led, resistance,
wire, bread board.
THEORY AND CONSTRUCTION:
A gate can be realized by the electronic circuit, making
use of the integrated circuits.
1. To protect the IC, the voltage was limited to 9 volts. A
Voltage Regulator chip (7805) in the breadboard was installed.
A red lead (+) from the battery clip to pin 1 and the black lead
(-) to pin 2 were connected. A wire from pin 3 on the regulator
was connected to the positive rail on the breadboard, and the
other from pin 2 to the negative (or ground) rail.
2. The required IC was plugged into the board so that it
straddles the centre divider.

6. 3. Two wires were inserted so that pin 7 is connected to the
negative rail, and pin 14 is connected to the positive rail.
4. A 220 ohm resistor was connected from pin 6 on the 7400
chip to the anode of the LED. The cathode of the LED must be
connected to ground to complete the circuit.
5. Pin 4 and pin 5 were grounded.
6. Now, the electric current through a battery or through a
bridge rectifier was supplied to check the logic gates.

7. THE OR GATE:
The following interferencecan be easily drawn from the
working of electrical circuit is:
a) If switch A & B are open lamp do not glow (A=0, B=0),
hence Y=0.
b) If Switch A open B closed then (A=0, B=1) Lamp glow,
hence Y=1.
c) If switch A closed B open then (A=1, B=0) Lamp glow, hence
Y=1.
d) If switch A & B are closed then (A=1, B=1) Lamp glow, hence
Y=1.
TRUTH TABLE:
Input A Input B Output Y
0 0 0
1 0 1
0 1 1
1 1 1

8. THE AND GATE
The following conclusions can be easily drawn from the
working of electrical circuit:
a) If both switches A&B are open (A=0, B=0) then lamp will
not glow, hence Y=0.
b) If Switch A closed & B open (A=1, B=0) then Lamp will
not glow, hence Y=0.
c) If switch A open & B closed (A=0, B=1) then Lamp will
not glow, hence Y=0.
d) If switch A & B both closed (A=1, B=1) then Lamp will
glow, hence Y=1.
TRUTH TABLE:
Input A Input B Output Y
0 0 0
1 0 0
0 1 0
1 1 1

9. THE NOR GATE:
The following conclusions can be easily drawn from the
working of electrical circuit:
a) If Switch A & B open (A=0, B=0) then Lamp will glow,
hence Y=1.
b) If Switch A closed & B open (A=1, B=0) then Lamp will
not glow, hence Y=0.
c) If Switch A open& B close (A=0, B=1) then Lamp will not
glow, hence Y=0.
d) If switch A & B are closed then (A=1, B=1) Lamp will not
glow, hence Y=0.
TRUTH TABLE:
Input A Input B Output Y
0 0 1
1 0 0
0 1 0
1 1 0

10. THE NAND GATE:
The following conclusions can be easily drawn from the
working of electrical circuit:
a) If Switch A& B open (A=0, B=0) then Lamp will glow,
hence Y=1.
b) If Switch A open B closed then (A=0, B=1) Lamp glow,
hence Y=1.
c) If switch A closed B open then (A=1, B=0) Lamp glow,
hence Y=1.
d) If switch A & B are closed then (A=1, B=1) Lamp will not
glow, hence Y=0.
TRUTH TABLE:
Input A Input B Output Y
0 0 1
1 0 1
0 1 1
1 1 0

11. Conclusion:
Hence the logic gates AND, NAND, OR, NOR were verified.

12. Bibliography:
 www.icbse.com
 PHYSICS NCERT textbook
 SUMITRA ARORA C++
 Google
 Wikipedia