Abstract:
This paper deals with the vital role of primitive polynomials for designing PN sequence generators. The standard LFSR (linear feedback shift register) used for pattern generation may give repetitive patterns. Which are in certain cases is not efficient for complete test coverage. The programmable LFSR based on primitive polynomial generates maximum-length PRPG with maximum fault coverage.
Basic galois field arithmatics required for error control codesMadhumita Tamhane
Knowledge of Galois Fields is must for understanding Error Control Codes. This presentation undertakes concepts of Galois Field required for understanding Error Control Codes in very simple manner, explaining its complex mathematical intricacies in a structured manner.
Implementation of 4-bit R-2R DAC on CADENCE Toolsjournal ijrtem
Abstract: An analog audio signal is continuously sampled; quantized and measured the height over time, and then the converted information is stored as series of numbers on the hard disk or in flash memory of an audio player. This series of numbers stored is known as digital audio signal. A compact disc(CD) stores these samples as 16-bit binary (1s and 0s) "words" 44K times a second, but digital audio data can be stored in a different sample rates, word sizes, and encoding or compression formats, and are brought to us on everything from our smartphone to your laptop. But in every case, the final thing that happens is the digital numbers get converted back into an analog electrical signal that can be sent to our headphones. The device that does this conversion is called a digital to analog converter (DAC).In this paper R-2R DAC converter is implemented on CADENCE tools with 180um technology. Keywords—DAC; CD; CADENCE; Technology;
Error control codes are necessary for transmission and storage of large volumes of date sensitive to errors. BCH codes and Reed Solomon codes are the most important class of multiple error correcting codes for binary and non-binary channels respectively. Peterson and later Berlekamp and Massey discovered powerful algorithms which became viable with the help of new digital technology. Use of Galois fields gave a structured approach to designing of these codes. This presentation deals with above in a very structured and systematic manner.
Basic galois field arithmatics required for error control codesMadhumita Tamhane
Knowledge of Galois Fields is must for understanding Error Control Codes. This presentation undertakes concepts of Galois Field required for understanding Error Control Codes in very simple manner, explaining its complex mathematical intricacies in a structured manner.
Implementation of 4-bit R-2R DAC on CADENCE Toolsjournal ijrtem
Abstract: An analog audio signal is continuously sampled; quantized and measured the height over time, and then the converted information is stored as series of numbers on the hard disk or in flash memory of an audio player. This series of numbers stored is known as digital audio signal. A compact disc(CD) stores these samples as 16-bit binary (1s and 0s) "words" 44K times a second, but digital audio data can be stored in a different sample rates, word sizes, and encoding or compression formats, and are brought to us on everything from our smartphone to your laptop. But in every case, the final thing that happens is the digital numbers get converted back into an analog electrical signal that can be sent to our headphones. The device that does this conversion is called a digital to analog converter (DAC).In this paper R-2R DAC converter is implemented on CADENCE tools with 180um technology. Keywords—DAC; CD; CADENCE; Technology;
Error control codes are necessary for transmission and storage of large volumes of date sensitive to errors. BCH codes and Reed Solomon codes are the most important class of multiple error correcting codes for binary and non-binary channels respectively. Peterson and later Berlekamp and Massey discovered powerful algorithms which became viable with the help of new digital technology. Use of Galois fields gave a structured approach to designing of these codes. This presentation deals with above in a very structured and systematic manner.
it covers topics Introduction
Classification of Logic Families
Important point
Level of Integration
Specification of Digital ICs
TTL Circuit
TTL NAND Gates
MOS/CMOS Circuits
CMOS NAND Gate
ECL Circuit
Comparison
Numbers of Digital ICs
This is the third part of the mini-series of synchronization in the Topics in Digital Communication Presentations.
Timing synchronization is another key component in modem design and implementation. However, this subject, especially its practical aspects, were not covered in details in text books. The materials covered in this presentation are not really new, but discussed in the literature published over past forty years. I hope that putting them in a single slide deck can help people who want to learn more on this subject.
Fuyun Ling
Broadside Array vs end-fire array
Higher directivity.
Provide increased directivity in
elevation and azimuth planes.
Generally used for reception.
Impedance match difficulty in
high power transmissions.
Variants are:
Horizontal Array of Dipoles
RCA Fishborne Antenna
Series Phase Array
It is the adder used to eliminate the wastage of time occur at each stage of parallel binary adder.In this , by using only carry input signal , we can calculate the the carry output without going to calculate carry at each stage.it is commonly used only for 4 bit addition because further calculation will be more complex.
it covers topics Introduction
Classification of Logic Families
Important point
Level of Integration
Specification of Digital ICs
TTL Circuit
TTL NAND Gates
MOS/CMOS Circuits
CMOS NAND Gate
ECL Circuit
Comparison
Numbers of Digital ICs
This is the third part of the mini-series of synchronization in the Topics in Digital Communication Presentations.
Timing synchronization is another key component in modem design and implementation. However, this subject, especially its practical aspects, were not covered in details in text books. The materials covered in this presentation are not really new, but discussed in the literature published over past forty years. I hope that putting them in a single slide deck can help people who want to learn more on this subject.
Fuyun Ling
Broadside Array vs end-fire array
Higher directivity.
Provide increased directivity in
elevation and azimuth planes.
Generally used for reception.
Impedance match difficulty in
high power transmissions.
Variants are:
Horizontal Array of Dipoles
RCA Fishborne Antenna
Series Phase Array
It is the adder used to eliminate the wastage of time occur at each stage of parallel binary adder.In this , by using only carry input signal , we can calculate the the carry output without going to calculate carry at each stage.it is commonly used only for 4 bit addition because further calculation will be more complex.
Glowworm swarm optimization (GSO) is a swarm intelligence based algorithm, introduced by K.N. Krishnanand and D. Ghose in 2005, for simultaneous computation of multiple optima of multimodal functions
Design of a Pseudo-Random Binary Code Generator via a Developed Simulation ModelIDES Editor
This paper presents a developed tool for Pseudo-
Random Binary Code generator (PRBCG). Based on extensive
study of LFSR theory we developed the simulation model of
PRBCG. The developed model is faster and simulates the
process for very high length of Linear Feedback Shift Registers
(LFSRs). We tested our model for the value n = 300 where n is
the length of the LFSR. The developed software model is also
capable of providing the transition states of different bits of
LFSRs. Further, the model has capability of switching to any
possible characteristic polynomial (feedback connections) of
n-bit LFSR. Also, the model is designed such that it can
accommodate all the possible initial conditions (2n) of LFSR
I am Bing Jr. I am a Signal Processing Assignment Expert at matlabassignmentexperts.com. I hold a Master's in Matlab Deakin University, Australia. I have been helping students with their assignments for the past 9 years. I solve assignments related to Signal Processing.
Visit matlabassignmentexperts.com or email info@matlabassignmentexperts.com. You can also call on +1 678 648 4277 for any assistance with Signal Processing Assignments.
On Spaces of Entire Functions Having Slow Growth Represented By Dirichlet SeriesIOSR Journals
In this paper spaces of entire function represented by Dirichlet Series have been considered. A
norm has been introduced and a metric has been defined. Properties of this space and a characterization of
continuous linear functionals have been established.
Similar to Programmable PN Sequence Generators (20)
White wonder, Work developed by Eva TschoppMansi Shah
White Wonder by Eva Tschopp
A tale about our culture around the use of fertilizers and pesticides visiting small farms around Ahmedabad in Matar and Shilaj.
Visual Style and Aesthetics: Basics of Visual Design
Visual Design for Enterprise Applications
Range of Visual Styles.
Mobile Interfaces:
Challenges and Opportunities of Mobile Design
Approach to Mobile Design
Patterns
Between Filth and Fortune- Urban Cattle Foraging Realities by Devi S Nair, An...Mansi Shah
This study examines cattle rearing in urban and rural settings, focusing on milk production and consumption. By exploring a case in Ahmedabad, it highlights the challenges and processes in dairy farming across different environments, emphasising the need for sustainable practices and the essential role of milk in daily consumption.
Book Formatting: Quality Control Checks for DesignersConfidence Ago
This presentation was made to help designers who work in publishing houses or format books for printing ensure quality.
Quality control is vital to every industry. This is why every department in a company need create a method they use in ensuring quality. This, perhaps, will not only improve the quality of products and bring errors to the barest minimum, but take it to a near perfect finish.
It is beyond a moot point that a good book will somewhat be judged by its cover, but the content of the book remains king. No matter how beautiful the cover, if the quality of writing or presentation is off, that will be a reason for readers not to come back to the book or recommend it.
So, this presentation points designers to some important things that may be missed by an editor that they could eventually discover and call the attention of the editor.
PDF SubmissionDigital Marketing Institute in NoidaPoojaSaini954651
https://www.safalta.com/online-digital-marketing/advance-digital-marketing-training-in-noidaTop Digital Marketing Institute in Noida: Boost Your Career Fast
[3:29 am, 30/05/2024] +91 83818 43552: Safalta Digital Marketing Institute in Noida also provides advanced classes for individuals seeking to develop their expertise and skills in this field. These classes, led by industry experts with vast experience, focus on specific aspects of digital marketing such as advanced SEO strategies, sophisticated content creation techniques, and data-driven analytics.
Transforming Brand Perception and Boosting Profitabilityaaryangarg12
In today's digital era, the dynamics of brand perception, consumer behavior, and profitability have been profoundly reshaped by the synergy of branding, social media, and website design. This research paper investigates the transformative power of these elements in influencing how individuals perceive brands and products and how this transformation can be harnessed to drive sales and profitability for businesses.
Through an exploration of brand psychology and consumer behavior, this study sheds light on the intricate ways in which effective branding strategies, strategic social media engagement, and user-centric website design contribute to altering consumers' perceptions. We delve into the principles that underlie successful brand transformations, examining how visual identity, messaging, and storytelling can captivate and resonate with target audiences.
Methodologically, this research employs a comprehensive approach, combining qualitative and quantitative analyses. Real-world case studies illustrate the impact of branding, social media campaigns, and website redesigns on consumer perception, sales figures, and profitability. We assess the various metrics, including brand awareness, customer engagement, conversion rates, and revenue growth, to measure the effectiveness of these strategies.
The results underscore the pivotal role of cohesive branding, social media influence, and website usability in shaping positive brand perceptions, influencing consumer decisions, and ultimately bolstering sales and profitability. This paper provides actionable insights and strategic recommendations for businesses seeking to leverage branding, social media, and website design as potent tools to enhance their market position and financial success.
Maximize Your Content with Beautiful Assets : Content & Asset for Landing Page pmgdscunsri
Figma is a cloud-based design tool widely used by designers for prototyping, UI/UX design, and real-time collaboration. With features such as precision pen tools, grid system, and reusable components, Figma makes it easy for teams to work together on design projects. Its flexibility and accessibility make Figma a top choice in the digital age.
Maximize Your Content with Beautiful Assets : Content & Asset for Landing Page
Programmable PN Sequence Generators
1. Programmable PN sequence generators based on Galois field
for maximum fault coverage in modern VLSI testing
Rakesh kumar jha Rajesh Kumar Singh Virendra Wagh
(rakesh.20db@gmail.com) (rajesh.skyil@gmail.com) (virendra.wagh7@gmail.com)
Keywords : 1. LFSR ( linear feedback shift
register). 2. PRPG (Pseudo feedback shift
register).3 Primitive polynomial 4. Galois field
Abstract:
This paper deals with the vital role of primitive
polynomials for designing PN sequence
generators. The standard LFSR (linear feedback
shift register) used for pattern generation may give
repetitive patterns. Which are in certain cases is
not efficient for complete test coverage. The
programmable LFSR based on primitive
polynomial generates maximum-length PRPG
with maximum fault coverage.
Introduction:
Structural testing is most favorable and efficient
testing for VLSI chips. This requires test pattern
generator (TPG) which is constructed from linear
feedback shift register (LFSR) are most commonly
used to generate test patterns for exhaustive
testing, pseudo-random testing and pseudo-
exhaustive testing. Exhaustive testing requires all
possible 2n
test patterns to be applied to an n-input
combinational circuit under-test (CUT). Although
it covers 100% single –stuck and multiple –stuck
fault coverage however if the number n is large,
time of testing is too large and increases
exponentially. Hence can‘t be applicable for
testing of modern VLSI chips consists of millions
of gates. Pseudo-random testing is another scheme
which is much more efficient than conventional
testing. Pseudo –random testing scheme generates
a subset of 2n
test patterns and uses fault
simulation to calculate exact fault coverage. But in
some cases this might becomes time consuming.
Another scheme for testing is pseudo-exhausting
testing which gives better performance than above
mentioned two schemes. It generates 2w
or 2k
-1
test patterns, where w<k<n , when each output of
the n-input combinational CUT at most depends
on W inputs . LFSR is used to generated pseudo
random patterns used for above mentioned scheme
.
An LFSR is a shift registers that, when clocked,
advances the signal through the register from one
bit to the next most-significant bit (figure1). Some
of the outputs are combined in exclusive-OR
configuration to form a feedback mechanism. A
linear feedback shift register can be formed by
performing exclusive-OR on the outputs of two or
more of the flip-flops together and feeding those
outputs back into the input of one of the flip-flops
as shown in Figure 2.
Fig1. 3-bit shift register
2. Fig 2. Linear feedback shift register
Pseudo random pattern generator (PRPG)
Linear feedback shift registers make extremely
good pseudorandom pattern generators. When the
outputs of the flip-flops are loaded with a seed
value (anything except all 0s, which would cause
the LFSR to produce all 0 patterns) and when the
LFSR is clocked, it will generate a pseudorandom
pattern of 1s and 0s. The only signal necessary to
generate the test patterns is the clock.
Standard LFSR
An standard LFSR is shown in figure 3. It consists
of n D flip-flops and a selected number of
exclusive-OR (XOR) gates. Because XOR gates
are placed on the external feedback path, the
standard LFSR is also referred to as an external-
XOR LFSR.
Fig.2. n stage (external –xor) Standard LFSR
Modular LFSR
The modular LFSR runs faster than its
corresponding standard LFSR, because each stage
introduces at most one XOR-gate delay. An n
stage modular LFSR is shown in figure 4. It is also
referred to as modular or internal-LFSR.
Fig.4. n stage (internal-xor) standard LFSR .
The internal structure of the n-stage LFSR in each
figure can be described by specifying a
characteristic polynomial of degree n, f(x), in
which the symbol hi is either 1 or 0, depending on
the existence or absence.
Let Si represent the contents of the n-stage LFSR
after ith shifts of the initial contents S0, of the
LFSR, and let Si(x) be the polynomial
representation of Si.
Then, Si(x) is a polynomial of degree n−1, where:
Si(x) = Si0 + Si1x + Si2x2
+ Si3
x3
+ Si4 x4
+
……… + Sin-2xn-2
+ Sin-1xn-1.
of the feedback path, where
If T is the smallest positive integer such that f(x)
divides 1+xT, then the integer T is called the
period of the LFSR. If T = 2n −1, then the n-stage
LFSR generating the maximum-length sequence is
called a maximum-length LFSR.
Consider the four-stage standard and modular
LFSR shown in Figure 3(a) and figure 3(b), below.
The characteristic polynomials f(x) used to
construct both LFSR are 1+x2
+x4
and 1+x+x4
,
respectively.
D Q D Q D Q D Q
Fig.3 (a) 4-bit standard LFSR
D Q DQ D Q
DQ
Fig.3 (b) 4-bit modular LFSR
3. The test sequences generated by each LFSR, when
its initial contents, S0, are set to {0001}.
PN Sequence PN sequence
for fig.5(a) for fig.5 (b)
0 0 0 1 0 0 0 1
1 0 0 0 1 1 0 0
0 1 0 0 0 1 1 0
1 0 1 0 0 0 1 1
0 1 0 1 1 1 0 1
0 0 1 0 1 0 1 0
0 0 0 1 0 1 0 1
1 0 0 0 1 1 1 0
0 1 0 0 0 1 1 1
1 0 1 0 1 1 1 1
0 1 0 1 1 0 1 1
0 0 1 0 1 0 0 1
0 0 0 1 1 0 0 0
1 0 0 0 0 1 0 0
0 1 0 0 0 0 1 0
Primitive polynomial:
A primitive polynomial is a polynomial that
generates all elements of an extension field from a
base field. Primitive polynomials are also
irreducible polynomials. For any prime or prime
power q and any positive integer n, there exists a
primitive polynomial of degree n over GF(q).
There are
aq (n) = Ф(q
n
-1)
n ……… (i)
Primitive polynomials over GF (q).
Where aq(n) is the totient function. A polynomial
of degree n over the finite field GF (2) (i.e., with
coefficients either 0 or 1) is primitive if it has
polynomial order 2n
-1. For example, 1+x+x2
has
order 3 since
Putting q=2 in equation (i) the numbers of
primitive polynomials over GF(2) are
a2 (n) = Ф (q
n
-1) ......(ii)
n
giving 1, 1, 2, 2, 6, 6, 18, 16, 48, ... for n= 1,2....
The following table lists the primitive polynomials
(mod 2) of orders 1 through 5.
N Primitive polynomials
1 1+x
2 1+x+x2
3 1+x+x3
, 1+x2
+x3
4 1+x+x4
,1+x3
+x4
5 1+x2
+x5 ,
1+x+x2
+x3
+x5
, 1+x3
+x5
,
1+x+x4
+x3
+x5
, 1+x2
+x3
+x4
+x5
1+x+x2
+x4
+x5
,
A primitive polynomial of degree n over Galois
field GF(2), p(x), as a polynomial that divides
1+XT
, but not 1+Xi for any integer i < T, where T
= 2n -1.A primitive polynomial is irreducible.
Because T = 15 = 14 -1.The characteristic
Polynomial, f(x) = 1+x+x4
, used to construct
Figure 3(b) is a primitive polynomial; thus the
modular LFSR is a maximum-length LFSR.
Let R(X) = F(X) -1
= X n F(X-1
) then R(X) and
F(X) are reciprocal and a reciprocal polynomial of
primitive polynomial is also primitive. Hence
polynomials1+x+x4
,1+x3
+x4
are primitive.
Some rules generating maximum length primitive
polynomials are given below:-
The LFSR can be maximal-length only if the
number of taps is even.
The set of taps — taken all
together, not pairwise (i.e. as pairs of
elements) — must be relatively prime. In
other words, there must be no common
divisor to all taps.
There can be more than one maximum-
length tap sequence for a given LFSR length
Once one maximum-length tap sequence has
been found, another automatically follows. If
the tap sequence, in an n-bit
LFSR, is [n, A, B, C, 0], where the 0
corresponds to the x0
= 1 term, then the
corresponding 'mirror' sequence is
[n, n − C, n − B, n − A, 0]. So the tap
sequence [32, 7, 3, 2, 0] has as its
4. counterpart [32, 30, 29, 25, 0]. Both give a
maximum-length sequence.
Galois field
A finite field is a field with a finite field order
(i.e., number of elements), also called a Galois
field. The order of a finite field is always a prime
or a power of a prime . For each prime power,
there exists exactly one (with the usual caveat that
"exactly one" means "exactly one up to an
isomorphism") finite field GF (pn
).
GF(p) is called the prime field of order p, and is
the field of residue classes modulo p, where the p
elements are denoted 0, 1, ...,(p-1). a=b in GF(p)
means the same as a=b(mod p). However, that
2x2=0(mod4)in the ring of residues modulo 4, so
2 has no reciprocal, and the ring of residues
modulo 4 is distinct from the finite field with four
elements. Finite fields are therefore denoted
GF(pn
), instead of GF(k), where k= pn
.
The finite field GF(2) consists of elements 0 and 1
which satisfy the following addition and
multiplication tables.
+ 0 1
0 0 1
1 1 0
X 0 1
0 0 0
1 0 1
If a subset S of the elements of a finite field F
satisfies the axioms above with the same operators
of F, then S is called a subfield. Finite fields are
used extensively in the study of error-correcting
codes.
When n>1, GF(pn
) can be represented as the field
of equivalence classes of polynomials whose
coefficients belong to GF(p). Any irreducible
polynomial of degree n yields the same field up to
an isomorphism. For example, for GF(23
), the
modulus can be taken as x3
+x2
+1 or x3
+x+1.
Using the modulus x3
+x2
+1, the elements of
GF(23
)can be written as written 0, x0
,x1
, x2
......and can be represented as polynomials with
degree less than 3.
Now consider the following table which contains
several different representations of the elements of
a finite field. The columns are the power,
polynomial representation, triples of polynomial
representation coefficients (the vector
representation), and the binary integer
corresponding to the vector representation (the
regular representation).
power polynomial vector regular
0 0 (000) 0
x0
1 (001) 1
x1 x (010) 2
x2
x2
(100) 4
x3
x+1 (011) 3
x4
X2
+1 (110) 6
x5
x 2
+ x +1 (111) 7
x6
x 2
+1 (101) 5
The set of polynomials in the second column is
closed under addition and multiplication
modulox3
+x+1, and these operations on the set
satisfy the axioms of finite field. This particular
finite field is said to be an extension field of
degree 3 of GF(2), written GF(23
), and the field
GF(2) is called the base field of GF(23
). If an
irreducible polynomial generates all elements in
this way, it is called a primitive polynomial. For
any prime or prime power q and any positive
integer n, there exists a primitive irreducible
polynomial of degree n over GF(q).
For any element c nof GF(q), cq
=c, and for any
nonzero element d of GF(q),d(q-1)
=1. There is a
smallest positive integer n satisfying the sum
condition e+e+e+….( n times )=0 for some
element e in GF(q). This number is called the
field characteristic of the finite field GF(q). The
field characteristic is a prime number for every
finite field, and it is true that (x+y)p
= xp
+ yp
a
finite field with characteristic p.
Programmable LFSR using Galois field
Programmable LFSRs have some obvious
advantage over standard LFSRs and if we
successfully incorporate a logarithm using galois
field , it will increase the fault coverage of the
circuit drastically. The nth degree programmable
LFSR is shown in the fig.
5. The programmable LFSR consists of (N-1) xor
gates and same number of multiplexers and a
control circuit cntrl which generates a bit stream
of length (N-1) to control the multiplexers . The
characteristic equation of LFSR having length N
can be denoted by
F(x) = 1+ C1X +C2X2
+C3 X3
………………. + CN-1XN-1
+ XN
Working:
To realize this general equation the control circuit
sends a bit sequence ―0000000……..0‖ of N bit.
So that the output of every D-flop is selected to
connect their corresponding xor gate . If any bit of
bit –stream becomes 1 then the output of
corresponding flop is not selected and the other
input of mux connected to ground (GND) is
selected. Thus the flop becomes disable and its
corresponding xor gate perform xor –operation
with ‗0‘resulting passes the output of previous
xor. Consider an example of 5 –bit programmable
pseudo-random generator which can implement
any polynomial of degree 5. it consists of 4 mux
and 4-bit control circuit and a GND(0) for second
input of mux.Let us assume two different
polynomials X5
+X4
+X2
+1 and X5
+ X3
+X+1 .
Both can be implemented by same circuit In first
case the control circuit sends ―0101‖ bit stream
while second polynomial can be implemented by
sending bit stream ―1001‖.
Conclusion:-
Primitive polynomial and Galois field gives idea
about the designing the LFSRs with maximum
length pattern. The more the random pattern the
more the fault coverage is possible for testing the
VLSI chips. Hence it is useful to implement a
PRPG (pseudo random pattern generator) based on
primitive polynomials for efficient and exhaustive-
pseudo random testing. Thus improves the
performance of PRPGs.
References:
[1] A. Miczo, Digital Logic Testing and
Simulation, Second Edition, John Wiley, 2003
[2]Berlekamp, E. R. Algebraic Coding Theory.
New York: McGraw-Hill, p. 84, 1968
[3] B. Koenemann. LFSR-coded test patterns for
scan de-signs. Proc. Euro. Test Conf., pages
237{242, 1991
[4]. B. Konemann, ―LFSR-Coded Test Pattems
for Scan Designs‖, European Test Conference,
Munich, 1991.Vol. 10, No.1, pp. 73-82. 1999,
pp.358-367.20f
[5] Church, R. "Tables of Irreducible
Polynomials for the First Four Prime Moduli."
Ann. Math. 36, 198-209, 1935
[6].Derbyshire, J. Prime Obsession: Bernhard
Riemann and the Greatest Unsolved Problem in
Mathematics. New York: Penguin, pp. 266-268,
2004.
[7]. Lidl, R. and Niederreiter, H. Introduction to
Finite Fields and Their Applications, rev. ed.
Cambridge, England: Cambridge University Press,
1994.
[8] Mohamed H. El-Mahlawy, Pseudo-Exhaustive
Built-In Self-resf for Boundary Scan, Ph.D. thesis,
Kent University, U.K., 2000.
[9]. Michael L. Bushnell and Vishwani D.
Agrawal, Essentials of Electronic Testing For
Digital, Memory, & Mixed-Signal VLSI Circuits,
Kluwer Academic Publishers, 2000.
[10] N. K. Jha and S. Gupta, Testing of Digital
Systems, Cambridge University Press, UK, 2003.
[11] N.C. Lai, S.J. Wang, ―A Reseedin
Technique
for LFSRBased BIST Applications‖, Asian test
Symposium 2002, pp.200-205.
[12] Peterson, W. W. and Weldon, E. J. Jr. Error-
Correcting Codes, 2nd ed. Cambridge, MA: MIT
Press, p. 476, 1972.
[13] P.H. Bardell, W.H. McAnney, Parallel
Pseudo-random Sequences for Built-In Test, Proc.
Int. Test Conf., IEEE, 1984, pp. 302-308.
[14] P. H. Bardell, W. H. McAnney, and J. Savir.
Built-in test for VLSI: Pseudorandom techniques.
1987.