ppt-U1 - (Introduction to 8086, Instruction Set).pptx

Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
Introduction to 8086, Instruction Set
UNIT 1

What is a Microprocessor?

● Microprocessor is an electronic circuit that functions as the central processing unit
(CPU) of a computer, providing computational control.
●The Microprocessor, (or CPU), is the brain of the computer.
●A microprocessor is “a component that implements memory.”
● Microprocessor is the core of the system.

Importance
A device that uses a microprocessor is normally
capable of many functions such as word
processing, calculation and communication via
internet or telephone. However for the device to
work properly, the microprocessor itself has to
communicate with other parts of the device.
Therefore, a microprocessor would
act as “device’s brain” in that it transmits,
receives and interprets the data needed to
operate a device.

Microprocessor Interfacing
Interfacing acts as a communication between user and a computer. When we are
executing any instruction, we need the microprocessor to access the memory for
reading instruction codes and the data stored in the memory.
The interfacing circuit therefore should be designed in such a way that it
matches the memory signal requirements with the signals of microprocessor.

Generation of Microprocessors
Name Word Length Addressing
capacity
Number of pins
4004 4 bit 640 bytes 16 pin IC
8008 8 bit 16 kb 18
8080 8 bit 64 kb 40
8085 8 bit 64 kb 40
8086 16 bit 1 Mb 40

Functional Blocks

“This is a super-important quote”

Features
● The 8086 is a 16-bit microprocessor. The term
“16-bit” means size of ALU.
● 8086 has 16-bit data bus, so it can read data
from and write data to memory and ports either
16 bits or 8 bits at a time.
●It has 20-bit address bus, so it can directly
access 220 or 10,48,576(1MB) memory
locations.
●The 8086 can generate 16- bit I/O address,
hence it can access 216 I/O ports
●Provides 16-bit registers
●Has multiplexed address and data bus which
reduces the number of pins needed.
● It performs the ALU operations on bit,
byte, word and decimal numbers.
● The Intel 8086 is designed to operate in
two modes, namely the minimum mode
and maximum mode.
● The Intel 8086 supports
multiprogramming.
● It fetches up to six instruction bytes from
memory and queue stores them in order to
speed up instruction execution.
● Provides powerful instruction set with
various addressing modes.

What is a Register?
● Registers are a type of computer memory used to quickly accept, store, and
transfer data and instructions that are being used immediately by the CPU.
The registers used by the CPU are often termed as Processor registers.
● Registers are temporary storage locations inside the CPU that hold data and
addresses.

Register Organization
● The 8086 microprocessor has a total of 14 registers that are accessible to the
programmer.
● All these registers are 16-bit in size. The registers of 8086 are categorized
into 5 different groups.

Segment Registers
● The 8086 architecture uses a concept of segmented memory.
● 8086 can be able to access a memory capacity of up to 1 mega byte
● This 1 megabyte of memory is actually divided into 16 logical segments
● Each segment contains 64Kbytes of memory
1. Code Segment register (CS) – used to store the code/program that is currently executed
2. Stack Segment register (SS) – used to store subroutines
3. Data Segment register (DS)
4. Extra Segment register (ES)
DS and ES are used to store the operands.

General Purpose Registers
● All the general registers of the 8086 microprocessor can be used for the
Arithmetic and logical operations.
● Used for temporary calculations i.e. used to store temporary data.
● These all general registers can be used as either 8-bit or 16-bit registers.
● AX- Accumulator used in ALU and data transfer operations
● BX- Base register used as address register to form physical address in case of certain
addressing modes.
● CX- Counter reg used to count number of loop instructions and for shift/rotate
instructions.
● DX- Data register used to store data and can also be used as port number in I/O
operations.

Pointer and Index Registers
● Index registers can be used in arithmetic operations but they usually are
concerned with the memory addressing modes of the 8086 microprocessor
(indexed, base indexed and relative base indexed modes).
● Indexed registers are particularly used for string manipulation.
● Pointer registers contains the offset of data(variables, labels) and instructions
from their base segments.

Logical View of 8086 memory
● IP is offset within CS
● SP is offset within SS
● BP can be offset of SS
● SI is offset within DS
● DS is offset within ES

Flag Registers
Status Flags
● Carry flag
● Parity flag – error detection and correction
● Auxiliary carry flag – BCD arithmetic
operations
● Zero flag
● Sign flag – arithmetic operations on sign
no’s
● Overflow – generated while sign
operations
Control Flags
● Trap flag
● Interrupt enable flag
● Direction flag – performs string
manipulation instructions

Memory Segmentation
● In the segmented addressing the available
memory space is divided into “chunks”
called segments. Such a memory is
known as segmented memory.
● Each segment is 64KB in size and
addressed by one of segment registers.
● To address a specific memory location
within a segment we need an offset
address.
Advantages:
● It allows instruction code, data, stack and
portion of program to be more than 64kb
long by using more than one code, data,
stack and extra segment.
● It facilitates use of separate memory areas
for program, data and stack.
● It permits a program or its data to be put in
different areas of memory, each time the
program is executed i.e, program can be
relocated which is useful in
multiprogramming

Instruction Format in 8086
● MOD: Mode of addressing
● REG: Register operand
● R/M: Register/Memory- specifies another register or memory location
● D bit: if d=0 indicates register operand is source operand
if d=1 indicates register operand is destination operand
● W bit: width- if w=0 indicates 8-bit data operand transferred
if w=1 indicates 16-bit data operand transferred
● Addressing mode specifies the way of data to be operated by an instruction
● An immediate operand is the data that appears in an instruction exactly as it is to
be processed.

● Instruction is a command given to the microprocessor to perform a specific
task on specified data.
● The length of 8086 MP instruction vary from 1byte to 6 bytes
● Each instruction has two parts
OPCODE OPERAND
The task to be performed The data to be operated on

Example:
ADD AX, BX
Operand
Destination operand
Source operand

There are 6-instruction formats for 8086
● One byte instruction Ex: CLC(clear carry), STD (set direction flag)
● Register to Register Ex: MOV AX,BX ADD AX,BX
● Register to/form memory with no displacement Ex: MOV AH, [SI]
● Register to/form memory with displacement Ex: MOV AH, [SI+ 2000H]
● Immediate operand to Register Ex: MOV AX, 1234H ADD B, 5
● Immediate operand to Memory with displacement
Ex: MOV ES: [1000H], 20H

Addressing Modes of 8086
● Addressing mode is defined as the way of specifying the data to be
operated by an instruction.
● It specifies that the given data is an immediate data or an address.
● The addressing modes of any processor can be broadly classified as
1. Data addressing modes
2. Program memory addressing modes
3. Stack memory addressing modes

Data Addressing Modes
● Immediate addressing mode
● Register addressing mode
● Direct memory addressing mode
● Indirect addressing mode
● Addressing modes for accessing
I/O ports
● Register relative addressing
mode or Base addressing mode
● Based-Indexed addressing mode
● Relative-based indexed
addressing mode
● Implied addressing mode
● String addressing mode

Immediate addressing mode
● In this mode the data is specified in the instruction itself.
● Here the source operand is 8-bit or 16-bit data
● Data is a part of the instruction
Ex: MOV BL, 14H
BL 14H
This instruction moves the data 14H immediately into BL register.

Register Addressing Mode
● In this mode the data (operands) are specified using registers.
Ex: MOV AX,CX
AX CX
This instruction moves the content of CX register into AX

Direct Memory Addressing Mode
● In this mode the 16 bit effective address of the data is directly specified in the
instruction.
Ex: MOV CL, [4143H]
CL [4143H]
This instruction moves the data from the location 4143H in DS into CL. Whatever
the data we are about to access that can be stored in the DS by default.

40H
60H
60H
5000
Memory
CL
DS
50000H + 4143H
DS*10H+4143H
54143H
54144H
MOV CL, [4143H]

Register Indirect Addressing Mode
● In this mode the effective address of the memory can be taken from one of the Base register
or Index register specified in the instruction.
● If BX,SI/DI is specified, DS is used
● If BP is specified, SS is used
Ex: MOV CX,[BX] CX – 16bit data
CL [BX]
CH [BX+1]
We have to copy the content from the locations in BX to CL and next to CH because it
is a 2byte data

20H
30H
20H 30H
1000H
2000H
+
Memory
CH CL
DS
BX
10000H
EA
120000H
Physical Address
120000H
120001H
CX
MOV CX, [BX]

Based Addressing mode (or) Register relative Addressing mode
● In this mode, the EA of the data is specified by the sum of contents of BX/BP
register and 8-bit/16-bit displacement.
Ex: MOV DX, [BX + 04H]
DL DS : [BX+04]
DH DS : [BX+04+1]
It moves a word from the address specified by BX+04H in Data segment to DX

10H
20H
10H 20H
6000H
1000H +
+
Memory
61004H
61005H
61003H
60000H
1000H
04H
1004H
BX
DS
DH
DL
DX
MOV DX, [BX+04]

Base – Indexed Addressing Mode
● In this mode the EA of the operand is computed by adding the Base register
to the contents of the given Index register.
Ex: MOV AL, [BX + SI]
AL DS : [BX+SI]
It moves the data (a byte) from the address specified by the BX+SI in DS to the
AL register

10H
40H
40H
1000H
2000H
3000H
+
+
Memory
15000H
15001H
10000H+5000H
5000H
Effective address
AL
DS
BX
SI
MOV AL, [BX+SI]

Relative Based-Indexed Addressing Mode
● In this mode, the address of the data is computed as the sum of Base
register, Index register and 8-bit or 16-bit displacement.
Ex: MOV CL, [BX+DI+10H]
CL DS : [BX+DI+10H]
It move the data from the address specified by BX+DI+10H in the DS to CL
register.

50H
50H
0100H
0200H
2000H
+ + +
Memory
CL
BX
DI
DS
EA
EA 0300H
10H
0310H
20000H
20310H
MOV CL, [BX+DI+10H]
Physical Address

Implied Addressing Mode
● In this mode the operands are implied and not specified in the instruction.
● We do not give any data in instruction
Ex: STC - set carry flag
AAA - adjust accumulator addition
HLT etc

String Addressing mode
● This mode uses index registers. The string instructions automatically assume
SI to point to first byte of the source operand and DI to point to first byte of the
destination operand.
● The contents of SI and DI are automatically incremented (DF=0) or
decremented(DF=1) to point the next byte or word.
● The segment register for the source is DS
● The segment register for the destination is ES

Ex: MOVS BYTE
if [DF] = 0 , [DS]=3000H, [SI]=0600H, [ES]=5000H, [DI]=0400H
DS+SI = [30600H] = 38H
ES+DI = [50400H] = 45H
After execution of MOVS BYTE [50400H] = 38H
[SI]=0601H and [DI]=0401H
Moves the byte from DS to ES

Addressing modes for Accessing I/O ports
● Standard I/O ports use port addressing modes.
● For memory mapped I/O, memory addressing modes are used. There are two
types of port addressing modes
Direct: In direct port mode, the port number is an 8-bit immediate operand. This
allows fixed access to ports numbered 0 to 255.
Ex: OUT 05H, AL: sends the contents of AL to 8-bit port 05H
IN AX, 80H: copies 16-bit contents of port 80H

Indirect: In Indirect port mode, the port number is taken from DX allowing 8-bit
ports or 16-bit ports
Ex: IN AL,DX: if [DX] = 7890H, then it copies 8-bit content of port 7890H into AL
IN AX,DX: copies the 8-bit contents of ports 7890H and 7891H into AL and
AH respectively.

Program Memory Addressing Modes
● For the control transfer instructions, the addressing modes depend upon whether
the destination location is within the same segment or in a different one.
● It also depends upon the method of passing the destination address to the
processor.
● Basically there are two addressing modes for the control transfer instructions,
intersegment and intrasegment addressing modes.
● If the location to which the control is to be transferred lies in a different segment
other than the current one, the mode is called intersegment mode.
● If the destination location lies in the same segment, the mode is called
intrasegment mode

● Intrasegment direct: here the displacement computed relative to the content
of IP
Ex: JMP 0052H
EA = [IP]+[disp of 8bit/16bit]
● Intrasegment Indirect: here the displacement to which the control is to be
transferred lies in same segment but passed indirectly.
Ex: JMP[BX]

Intersegment direct: branching from one code segment to other code segment.
Ex: CALL 1020H: 2050H
Intersegment indirect: control passed to different segment indirectly
Ex: CALL [BX]

Instruction set of 8086
● The 8086 microprocessor has approximately 117 different instructions
● The instruction set is divided into different groups

Instruction set of 8086
● Data transfer/movement instructions
● Arithmetic and logic instructions
● String instructions
● Program control transfer instructions
● Processor control instructions
● Iteration control instructions
● Interrupt instructions
● External Hardware synchronization
instructions

Data Transfer Instructions
● These instructions are used to transfer the
data from source to destination.
● Here source can be immediate data,
register memory address.
● Destination should be register or memory
locations.
● MOV instruction to transfer a byte/word
● PUSH/POP instructions
● Load Effective Address Instructions
● String Data transfer instructions
Miscellaneous Data Transfer instructions
● IN/OUT Instructions
● Instructions to transfer flag registers
● XCHG and XLAT

Instruction to transfer a byte/word
MOV Instruction:
Used to transfer a byte or word from source to destination.
Format: “MOV destination, source”
● Source can be an immediate data, a register or memory
● Destination can be a register or memory
● MOV instruction does not affect any flags.
Ex: MOV AX, 142FH – move immediate data 142F to AX
MOV AX,BX
MOV BL, [3566H]

PUSH/POP Instructions:
These instructions are used to load or receive data from stack memory.
i) PUSH Instruction
This instruction transfers the contents of given source into the stack memory and the
stack location is decremented by 2.
Format: “PUSH source”
Ex: PUSH AX
20
10
10 20
AH
AL
AX
20038
20036
20037
Stack pointer
Before execution
After execution
.
.
.
.
PUSH

● Here we are going to transfer contents of AX register to the stack memory.
The stack memory is currently pointed to the location 20038. Once the
instruction PUSH AX is executed the stack pointer decrements by 2 i.e. to
location 20036.
● It is important to note that whenever data is pushed onto the stack the most
significant data byte pointed by the current stack segment memory location
SP-2 and least significant data byte moves into the stack segment memory
location addressed by SP-1

POP Instruction:
● This instruction copies a byte/word from stack location pointed by stack
pointer to the destination.
● After execution the stack pointer is incremented by 2
Format: “POP destination”
Ex: POP BX
20
10
10 20
BH BL
BX
20038
20037
20039
After execution
Stack pointer
Before execution
.
.
.
.

● Whenever the data is removed from stack , the byte from stack segment
addressed by SP moves into most significant byte of destination register and
byte from stack segment memory location addressed by SP+1 moves into
least significant byte of the destination register.
● The destination can be a GP register , segment register or a memory location.
After the word is copied to the specified destination, the stack pointer is
automatically incremented by 2.

Load Effective Address Instructions:
Used to transfer the effective address from source to destination.
i) LEA
ii) LDS
iii) LES
i) LEA instruction (load effective address)
This instruction loads the effective address of operand in specified register.
Ex: LEA AX, [BX] [DI]
Load AX register with EA = [BX] + [DI]

ii) LDS instruction (load data segment)
Load register and DS with words from memory
Ex: LDS AX, [38B1H]
 Copy the contents of memory at displacement of 38B1H and 38B2H to AX
 Then copy the contents of memory at displacement of 38B3H and 38B4H to DS i.e. from next
two memory locations.
iii) LES instruction (load extra segment)
Load the given register and ES with words from memory
Ex: LES BX [341BH]
 Copy the contents of memory at displacement of 341BH in DS to BL and 341CH in DS to BH
 Then copy the contents of memory at displacement of 341DH and 341EH in DS to ES register.

String Data Transfer Instructions:
MOVS/MOVSB/MOVSW
These instructions are used to copy a byte or word from a location in the data segment
[DS] to extra segment [ES].
MOVSB – Move a string as bytes
MOVSW – Move a string as words
REP/REPE/REPZ/REPNE/REPNZ prefix
REP – A prefix written before string instructions
Ex: REP MOVSB – to repeat until CX=0
REPZ CMP SB – Compare string bytes until ZF=0

● REPE – Repeat if equal
● REPZ – repeat if zero
● REPNE – Repeat if not equal
● REPNZ – Repeat if not zero
Instruction Code Condition for exit
REP CX!=0
REPE/REPZ CX=0 or ZF=1
REPNE/REPNZ CX!=0 or ZF=0

LODS/LODSB/LODSW
To copy a byte from a string location pointed by SI to AL or a word from a
string location pointed by SI to AX.
Ex: MOV SI, OFFSET_STRING
LODS STRING
First we have to initiate the source index with the offset string value and then
load that string value to the accumulator.
STOS/STOSB/STOSW
To store/copy a byte/word from accumulator to a memory location in the extra
segment [ES]. DI s used to hold the offset memory of ES

Instructions to transfer Flag registers:
These instructions are used to transfer the status of the flag register and
updates the registers.
i) LAHF: to load lower byte of flag register in AH
ii) SAHF: to copy AH register content to low byte of flag register
iii) PUSHF: This instruction is used to move the contents of flag register onto the
stack
iv) POPF: When this instruction is executed the byte from the top of the stack
moves into flag register.
MSB of flag register [SP]
LSB of flag register [SP+1]

Miscellaneous Data Transfer Instructions:
IN/OUT Instructions
These instructions are used to transfer the data between input and output ports.
i) IN instruction
This instruction copies the data from a port to the accumulator.
Ex: IN AL, F8H
copy an immediate data from port [F8] to AL
ii) OUT Instruction
The OUT instruction copies the data from the accumulator to the specified output port.
Ex: OUT 0FH, AL
copy the contents of AL to the 8-bit port 0FH

XCHG Instruction:
It exchanges the contents of a register with the contents of another register or
a memory location but not the immediate operand.
Ex: XCHG AX,BX – exchange word in AX with byte in BX
1000H
1000H
1020H
1020H
AX BX

XLAT Instruction
● This instruction replaces a byte in the AL register with a byte from a lookup table
in memory.
● BX register stores the starting address of lookup table
● XLAT copies byte from address pointed by [BX+AL] back into AL
Ex: XLAT BCD to ASCII
AL DS: [BX+AL]
Suppose AL= 05H
BX = 0400H
DS = 1000H
PA = 10000+0400+05 = 10405H
AL 05H
10405 20H
AL 20H
ASCII code
BCD no
ASCII code equivalent to BCD
After executing XLAT
Initially

Arithmetic Instructions
● Addition instructions
● Subtraction instruction
● Multiplication instruction
● Division Instruction
● BCD arithmetic instructions
● ASCII arithmetic instructions
● Comparison instruction

Addition related instructions
● ADD
This instruction adds the contents of the source to the destination and stores the result
in the destination.
Flags affected(the o/p of the addition process affects): AF,CF,OF,PF,SF and ZF
Ex: ADD AL, 14H – add immediate data to the content of AL and store the result
in AL.
ADD AX,BX – contents of AX and BX registers are added and stored in the AX
ADD 0100H – implicit data will be stored in accumulator.

● ADC [Addition with carry]
It also adds the status of the carry flag into the result along with the content.
Ex: ADC AL,CL
AL AL+CL+carry flag
Here the contents of AL register and CL register are added along with carry
bit and the result will be stored in the AL.

● INC [Increment by 1]
Increments contents of specified destination. It adds 1 to the specified
destination in the instruction.
Flags affected: AF,OF, PF, SF, ZF [CF flag is unaffected]
Ex: INC AL
AL AL+1

Subtraction related instructions
● SUB
This instruction subtracts the contents of the source from destination and
store the result in the destination.
Flags affected: AF,CF,OF, PF, SF, ZF
Ex: SUB AL,14H – subtract immediate data from AL register and store result in
AL.
SUB AX,BX

● SBB [subtraction with borrow]
This instruction also subtracts the borrow from the result along with the
content.
Ex: SBB AL,CL
AL AL-CL- borrow
Contents of CL are subtracted and if a borrow is generated that is subtracted
and result is stored in AL

● DEC: [Decrement – subtract 1]
It subtracts 1 from specified destination
Flags affected: AF,OF,PF,SF,ZF [CF is not affected]
Ex: DEC AL
subtracts 1 from the content of AL register
AL AL-1
● NEG [Negate each bit] - Form 2’s complement
It inverts the bits of destination operand
It complements the content of AX and store the result in AX register
Ex: NEG AL
AL - 0011 0101
invert 1100 1010
add 1 + 1
result 1100 1011

Multiplication related instructions
● MUL [unsigned multiplication]
It multiplies the contents of the source and accumulator AX and stores the
result into the accumulator.
Flags affected: AF, PF, SF and ZF
Ex: MUL BL
AX AL X BL

● IMUL [signed multiplication]
It multiplies the signed value of source and the signed value of accumulator
and stores the result in accumulator.
Ex: IMUL BL
AX AL X BL

Division related instructions
● DIV [unsigned division]
This instruction divides an unsigned word by a byte(16bit/8bit) or an unsigned
double word by a word (32bit/16bit)
Ex: DIV CL – To divide a word in AX by content of CL
AL Quotient [AX / CL]
AH Remainder[AL / CL]

● IDIV [signed division]
This instruction divides signed word in AX by a byte in source.
Ex: IDIV CL

BCD arithmetic instructions
● DAA [Decimal Adjust accumulator]
This instruction is used to make sure that the result of adding two BCD
numbers is adjusted to a proper BCD number (BCD code uses four bits to
represent 10 decimal digits 0-9)
 If the value of low –order four bits of result(B3-B0) in AL>9 or AF =1, DAA
instruction adds 6 to the low-order bits.
 If (B7-B4) in AH>9 or CF=1, DAA instructs adds 6 to the higher order to
make it as a proper BCD number because BCD is 0-9
 Flags affected: AF, CF, PF and ZF are update
[OF is undefined after DAA]

Ex: ADD AL,CL
DAA
AL 0011 1001 - 39 – BCD
CL 0100 0100 - 44 – BCD
AL+CL 0111 1101 - 7D not a proper BCD because D>9
DAA + 0110 - adds 6
AL 1000 0011 - 83 – valid BCD

● DAS [Decimal Adjust after Subtraction]
This instruction is used to make sure that the result of subtraction of two BCD
numbers is also a proper BCD number.
 If (B3-B0) in AL>9 or AF=1, DAS instruction subtracts 6 from (B3-B0)
 If (B7-B4) in AH>9 or CF=1, DAS instruction subtracts 6 from (B7-B4)

Ex: SUB AL,BL
AL 0011 1001 - 32 – BCD
CL 0001 0111 - 17 – BCD
AL- BL 0001 1011 - 1B not a proper BCD because B>9
DAS - 0110 - subtracts 6
AL 0001 0101 - 15 – valid BCD

Comparison Instruction
● It compares a byte/word from specified source with a byte/word from the
destination.
● It can be done by subtracting source from destination
● Flags affected: AF, OF, SF, ZF, PF, CF
Ex: CMP AL,BL
if AL = BL ; ZF is set i.e. ZF=1
if AL>BL ; SF =0 and CF =0
if AL <BL; SF=1
CMP AL,01H – compared immediate operand with content of AL register
CMP CX,BX

ASCII Arithmetic Instructions
● ASCII numbers are represented from 30H to 39H for the numbers 0 to 9.
● AAA [ASCII Adjust after Addition]
 It is applied after performing addition
 It is used when two ASCII numbers are added
 It converts result to unpacked BCD digit
Packed(4bits) – to represent number Ex: 4 – 0100
Unpacked (8 bits) – to represent number Ex: 4 – 0000 0100

● After performing the addition the lower nibble is checked. If lower nibble is
proper BCD of if AF=1 then lower nibble is written as it is and clear or mask
the upper nibble.
● If lower nibble is not a valid BCD digit i.e. lower nibble > 9 or if CF=1 then add
6 to lower nibble and clear upper nibble. Increment AH register by 1.
● Finally the unpacked BCD result will be stored in AX.
Ex: MOV AL, 05H
MOV CL, 02 H
ADD AL, CL
AAA

● AAS [ASCII Adjust after Subtraction]
 It is applied after performing subtraction
 It is used when two ASCII numbers are subtracted
 It converts result to unpacked BCD digit
● After performing the subtraction the lower nibble is checked. If lower nibble is
proper BCD of if AF=1 then lower nibble is written as it is and clear or mask
the upper nibble.
● If lower nibble is not a valid BCD digit i.e. lower nibble > 9 or if CF=1 then
subtract 6 to lower nibble and clear upper nibble. Decrement AH register by 1.
● Finally the unpacked BCD result will be stored in AX.

Ex: MOV AL, 39H
MOV CL, 35 H
SUB AL, CL
AAS
39H – ASCII of 9 39
35H – ASCII of 5 -35
04
AL
Proper BCD

● AAM [ASCII Adjust after Multiplication]
Used to adjust ASCII codes after multiplication
Ex: MOV AL, 05H  5 is packed BCD
MOV CL, 07 H  7 is packed BCD
MUL AL, CL
AAM
We get 5 X 7 = 35
03 05
AL
AH
AX

● AAD [ASCII Adjust before Division]
Used to adjust ASCII codes before division. Converts 2 unpacked BCD digits
to packed.
Ex: MOV AX, 0607H AX = 0607
MOV CH, 09 H CH = 09
AAD Convert unpacked BCD to packed BCD i.e.
0607  67 09  9
DIV CH 67
9
04(R) 07 (Q)
AH AL
AX

● CBW [Convert byte to word]
Convert a byte in AL to word in AX
Ex: MOV AL, 05H
AL 0000 0101 Here MSB is copied to all bite in AH byte
0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1
AH AL
AX

● CWD [Convert word to double word]
Converts word in AX to double word. This instruction copies the sign bit of AX
to all the bits of DX. This operation is done before unsigned division.
Ex: MOV AX, 96A5H
AX 1001 0110 1010 0101
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 1 0 1 1 0 1 0 1 0 0 1 0 1
DX AX
FFFF 96A5H  double word

Logical Instructions
● AND Instruction
“AND destination, source”
 Here the source can be register or memory location or immediate operand.
 Destination can be register or memory location.
Ex: AND AX, BX
AND operation is performed on source and destination and the result is
stored in destination.

● OR Instruction
“OR destination, source”
Ex: OR AX, BX
OR operation is performed on source and destination and the result is stored
in destination.

● XOR Instruction
“XOR destination, source”
Ex: XOR AX, BX
XOR operation is performed on source and destination and the result is
stored in destination.

● NOT Instruction
“NOT destination”
 Destination can be register or memory location or immediate operand.
 NOT simply inverts the bits of destination and stores the result in destination.
Ex: NOT AX
let AX = 37
0011 0111
1’s c 1100 1000
C 8 AX

● TEST Instruction
Add operands to update flags without affecting operands.
“TEST destination, source”
 TEST performs AND operation on source and destination.
 Here the result won’t be stored anywhere but simply updates the status of
flags if they are set or reset.
Ex: If the AND operation gives result of all 0’s then ZF=1
If sign bit is 1 then SF=1 i.e. negative

ppt-U1 - (Introduction to 8086, Instruction Set).pptx

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ppt-U1 - (Introduction to 8086, Instruction Set).pptx