3. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
ROL (Rotate Left)
● “ROL destination, count”
● The contents of the operand are rotated left side by specifying number of
positions.
● Here we shift bits towards left side.
● To rotate more than one bit position, load the desired number into CL register
and put ‘CL’ in the count position of the instruction.
● ROL affects only CF and OF.
5. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
ROR (Rotate Right)
● “ROR destination, count”
● The contents of the operand are rotated right side by specifying number of
positions.
● Here we shift bits towards right side.
● The data bit rotated out of LSB is circled back into MSB.
● To rotate more than one bit position, load the desired number into the CL
register and put ‘CL’ in the count position of the instruction.
7. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
RCL (Rotate Carry Left)
● “RCL destination, count”
● MSB is placed as new carry and previous carry is placed as new LSB.
● For multi-bit rotates, CF will contain the bit most recently rotated out of MSB.
● To rotate more than one bit position, load the desired number into the CL
register and put ‘CL’ in the count position of the instruction.
Ex: MOV CL, 2
RCL AL,CL
9. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
RCR (Rotate Carry Right)
● “RCR destination, count”
● LSB is placed as new carry and previous carry is placed as new MSB.
● To rotate more than one bit position, load the desired number into the CL
register and put ‘CL’ in the count position of the instruction.
Ex: RCL AL, 1
11. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
SHL (Shift left) or Logical Shift Left, SAL (Arithmetic shift left)
● “SHL destination, count”
● This instruction shifts each bit in the specified destination some number of bit
positions to the left.
● As a bit is shifted out of the LSB operation, a 0 is placed in LSB position.
● The MSB will be shifted into CF.
● SHL and SAL are two mnemonics for same instruction.
EX: SHL AL, 1
13. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
SHR (Shift Right/ Logical Shift Right)
● “SHR destination, count”
● This instruction shifts each bit in the specified destination some number of bit
positions to the right.
● As a bit is shifted out of the MSB operation, a 0 is placed in MSB position.
● The LSB will be shifted into CF.
Ex: SHR AL,1
15. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
SAR (Arithmetic Shift Right)
● “SAR destination, count”
● As a bit is shifted out of MSB position, a copy of the old MSB is put in the
MSB position.
● In other words sign bit is copied into MSB.
● The LSB will be shifted into CF.
Ex: SAR BL, 1
18. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
● String is a collection of bytes which are stored in consecutive memory
locations.
CMPS/CMPSB/CMPSW
● This instruction can be used to compare a byte / word in one string with a
byte / word in another string.
● SI is used to hold the offset of the byte or word in the source string, and DI is
used to hold the offset of the byte or word in the destination string.
● After the comparison, SI and DI will automatically be incremented or
decremented to point to the next or previous element in the two strings.
● The CMPS instruction can be used with a REPE or REPNE prefix to compare
all the elements of a string.
19. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
Ex: MOV SI OFFSET FIRST
MOV DI OFFSET SECOND
CLD DF cleared
MOV CX, 0003
REPE CMPSB
i
a
h
i
a
h
SI
DS ES
DI
1004
1003
1002
1001
1000
2004
2003
2002
2001
2000
20. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
● Primarily the elements in 1000 and 2000 locations will be compared.
h=h
● Now CLD operates and SI and DI will increment after the comparison
i.e. SI points to 1002 and DI to 2002
here a=a
● Remember CX decrements after each decrement
● Now SI and DI will be incremented i.e. Si points to 1004 and DI to 2004
i=i
● Now CX becomes 0. Repeat until all the bytes are equal
● Here the bytes are equal and hence ZF is set i.e. 1, which means both strings
are equal.
21. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
SCAS/SCASB/SCASW (Scan a string byte /word)
● SCAS compares a byte in AL or a word in AX with a byte or a word in ES pointed
to by DI.
● Therefore, the string to be scanned must be in the extra segment, and DI must
contain the offset of the byte or the word to be compared.
● CMPS and SCAS are similar but the difference is CMPS compares content of
memory location addressed by SI and DI, whereas SCAS compares content of
accumulator with content of memory location addressed by DI.
Ex: MOV CX,0004 – count 4 and size of string is 4 bytes
MOV AX, 2000H – let word be hill
MOV DI, 3000H – let word be hello
CLD
REPNE SCANSB – repeat until not equal
22. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
MOVS/MOVSB/MOVSW
These instructions are used to copy a byte or word from a location in the data segment
[DS] to extra segment [ES].
MOVSB – Move a string as bytes
MOVSW – Move a string as words
REP/REPE/REPZ/REPNE/REPNZ prefix
REP – A prefix written before string instructions
Ex: REP MOVSB – to repeat until CX=0
REPZ CMP SB – Compare string bytes until ZF=0
23. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
● REPE – Repeat if equal
● REPZ – repeat if zero
● REPNE – Repeat if not equal
● REPNZ – Repeat if not zero
Instruction Code Condition for exit
REP CX!=0
REPE/REPZ CX=0 or ZF=1
REPNE/REPNZ CX!=0 or ZF=0
24. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
LODS/LODSB/LODSW
To copy a byte from a string location pointed by SI to AL or a word from a
string location pointed by SI to AX.
Ex: MOV SI, OFFSET_STRING
LODS STRING
First we have to initiate the source index with the offset string value and then
load that string value to the accumulator.
STOS/STOSB/STOSW
To store/copy a byte/word from accumulator to a memory location in the extra
segment [ES]. DI s used to hold the offset memory of ES
26. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
● These instructions are used to transfer the control from one place of
the program to another place of program.
● Used to alter the sequence of program execution.
● The control transfer instructions(Branching instructions) are classified
into two types.
Unconditional transfer instructions – no condition checked
Conditional transfer instructions- conditions checked i.e the flags status.
27. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
Unconditional Transfer instructions
CALL - The CALL instruction is used to transfer execution to a subprogram or a
procedure.
“CALL address”
Ex: CALL 1234 – The MP control will be moved to the address 1234 and all
statements in that procedure are executed.
Ex: CALL MULT
This is a direct within segment (near or intra segment) call. MULT is the name of
the procedure. The assembler determines the displacement of MULT from the
instruction after the CALL and codes this displacement in as part of the
instruction.
28. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
RET – Return execution from procedure to calling program.
● The RET instruction will return execution from a procedure to the next
instruction after the CALL instruction which was used to call the procedure.
● Whenever the RET is executed then the MP control will shift to the main
program. The remaining statements of the program will get executed.
JMP – “JMP address”
This Instruction will fetch the next instruction from the location specified in the
instruction rather than from the next location after the JMP instruction.
Ex: JMP NEXT
29. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
LOOP
This instruction is used to execute a set of instructions repeatedly.
Jump to specified label if CX!=0 after auto decrement.
Ex: MOV CL, 03 – loop will execute 3 times
label:
MOV AL, 34 1. In each iteration CL will be decremented by 1
MOV BL, 56 2. If CL!=0 then only the body of label will get
ADD AL,BL executed.
LOOP label
30. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
Conditional Control Transfer Instructions
● Here first conditions will be evaluated, If the condition is TRUE the MP control
will be shifted from one place of program to another place of program.
● The condition of flags are checked.
JZ/JE (Jump if equal/Jump if zero)
This instruction is usually used after a Compare instruction. If the zero flag is
set, then this instruction will cause a jump to the label given in the instruction.
Ex:
CMP BX, DX Compare (BX-DX)
JE DONE Jump to DONE if BX = DX
31. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
● JNE/JNZ (JUMP NOT EQUAL / JUMP IF NOT ZERO)
This instruction is usually used after a Compare instruction. If the zero flag is 0,
then this instruction will cause a jump to the label given in the instruction.
Ex:
IN AL, 0F8H Read data value from port
CMP AL, 72 Compare (AL –72)
JNE NEXT Jump to label NEXT if AL != 72
32. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
JS (JUMP IF SIGNED / JUMP IF NEGATIVE)
This instruction will cause a jump to the specified destination address if the
sign flag is set. Since a 1 in the sign flag indicates a negative signed number,
you can think of this instruction as saying “jump if negative”.
Ex:
ADD DL, DH Add signed byte in DH to signed byte in DL
JS NEXT Jump to label NEXT if result of addition is
negative number
33. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
JNS (JUMP IF NOT SIGNED / JUMP IF POSITIVE)
This instruction will cause a jump to the specified destination address if the
sign flag is 0. Since a 0 in the sign flag indicate a positive signed number, you
can think to this instruction as saying “jump if positive”.
Ex:
DEC AL Decrement AL
JNS NEXT Jump to label NEXT if AL has not decremented to FFH
34. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
JP/JPE (JUMP IF PARITY / JUMP IF PARITY EVEN)
If the number of 1’s left in the lower 8 bits of a data word after an instruction
which affects the parity flag is even, then the parity flag will be set. If the parity
flag is set, the JP / JPE instruction will cause a jump to the specified
destination address.
Ex:
IN AL, 0F8H Read ASCII character from Port F8H
OR AL, AL Set flags
JPE ERROR Odd parity expected, send error message if
parity found even
35. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
JNP / JPO (JUMP IF NO PARITY / JUMP IF PARITY ODD)
If the number of 1’s left in the lower 8 bits of a data word after an instruction
which affects the parity flag is odd, then the parity flag is 0. The JNP / JPO
instruction will cause a jump to the specified destination address, if the parity
flag is 0.
Ex:
IN AL, 0F8H Read ASCII character from Port F8H
OR AL, AL Set flags
JPO ERROR Even parity expected, send error message if
parity found odd
36. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
JO (JUMP IF OVERFLOW)
The overflow flag will be set if the magnitude of the result produced by some signed
arithmetic operation is too large to fit in the destination register or memory location. The JO
instruction will cause a jump to the destination given in the instruction, if the overflow flag is
set.
Ex:
ADD AL, BL Add signed bytes in AL and BL
JO ERROR Jump to label ERROR if overflow from add
JNO (JUMP IF NO OVERFLOW)
The JNO instruction will cause a jump to the destination given in the instruction, if the
overflow flag is not set.
Ex:
ADD AL, BL Add signed byte in AL and BL
JNO DONE Process DONE if no overflow
37. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
JC (Jump if Carry)
If, after a compare or some other instructions which affect flags, the carry flag is a
1, this instruction will cause execution to jump to a label given in the instruction.
Ex:
ADD BX, CX Add two words
JC NEXT Jump to label NEXT if CF = 1
JNC(Jump if Not Carry)
If, after a compare or some other instructions which affect flags, the carry flag is 0,
this instruction will cause execution to jump to a label given in the instruction.
Ex:
ADD AL, BL Add two bytes
JNC NEXT If the result with in acceptable range, continue
39. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
● These Instructions are used to execute the given instructions for number of times.
LOOP:
● Used to loop a group of instructions until the condition satisfies i.e. CX = 0
● The number of times the instruction to be repeated is loaded into CX.
● Each time the loop instruction executes, CX is automatically decremented by 1.
LOOPE/ LOOPZ
Used to loop a group of instructions till it satisfies ZF=1 and CX=0 i.e. exit when CX=0
LOOPNE/ LOOPNZ
Used to loop a group of instructions till it satisfies ZF=0 and CX=0 i.e. exit when CX=0
JCXZ
Used to jump to provided address when CX=0
41. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
● These instructions control the functioning of available hardware inside processor
chip. Also known as Machine Control Instructions.
ESC
● It is an instruction prefix.
● It indicates the current instruction escape to external device like NDP (numeric
data coprocessor) – for 8087
● 8086 treats the instruction as NOP
WAIT
● Holds operation of processor with current status till TEST pin goes low
● It is used to synchronize 8086 with other peripherals.
42. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
NOP
● No operation is performed
● 8086 remains idle for 3 clock cycles
● It is used to insert time delays
HLT
● Cause the processor to stop fetching and executing instructions.
● 8086 comes out of halt state if it finds INTR or NMI=1 or by reset.
LOCK
● This is a bus lock instruction prefix. LOCK=0 activates the signal to ensure
concurrency.
Ex: LOCK IN AL, 08H
This instruction is locked where it prevents any external bus master taking control of the
system bus during execution of this instruction.
44. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
Flag Manipulation Instructions
● The flag manipulation instructions directly modify some of the flags of 8086.
STC [Set Carry Instruction]: Used to set the carry flag
CLC [Clear Carry Instruction]: Used to reset the carry flag i.e. CF=0
CMC [Complement Carry Instruction]: Used to complement the carry flag i.e.
CF=0 1 or CF=1 0
STD [Set Direction Instruction]: Set DF=1 so that SI/DI can be decremented automatically after execution
of string instruction.
CLD [Clear Direction Instruction]: Reset DF=0 so that SI/DI can be incremented automatically after
execution of string instruction.
STI [Set Interrupt flag]: If STI is set the INTR will be enabled. MP receives it when IF=1
CLI [Clear interrupt]: MP will not respond to any interrupt when IF=0 on its INTR input.
46. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
● An interrupt is a condition that temporarily stops the execution of microprocessor to
carry out a specific task.
● When an interrupt occurs the processor completes the execution of current instruction
and calls a special interrupt service.
Interrupt Service Routine(ISR)
It is a special program to instruct the MP on how to handle the interrupt.
Sources of Interrupts:
● External signal – peripheral devices interrupt main program of MP
● Special Instruction – special instruction INT to execute special program
● Condition produced by instruction – interrupted by some condition by
execution of some instruction.
Ex: DIV by 0 instruction
47. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
Types of Interrupts
● Hardware Interrupts
These are caused by any peripheral device by sending a signal through a specified pin to the
microprocessor.
1. NMI (Non-maskable interrupt)
2. INTR (Interrupt request – maskable interrupt)
NMI
● It is a single pin non maskable hardware interrupt which cannot be disabled (always on).
● It is highest priority interrupt and is of type 2.
● Address of NMI processing routine is stored in location 0008h.
INTR
● Provides a single request and is activated by I/O port.
● This can be masked or delayed
● Interrupt flag is used to set this type.
48. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
● Software Interrupts
These interrupts can be generated by inserting the instruction ‘INT’ within the
program.
There are 256 software interrupts available in 8086 microprocessor
These are 2 byte instructions
“INT Type” – type ranges from 00H to FFH
opcode
Immediate value
49. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
● INT
Used to interrupt the program during execution and calling service specified
● IRET
Used to return from interrupt service to the main program (Return from ISR)
● INTO (Interrupt on overflow)
This command is used to interrupt the program during execution if OF=1
● INT N (Interrupt Type N)
This is a software interrupt where 256 interrupts are defined corresponding to the types
of 00H to FF H
When an INT N instruction is executed, the Type byte N is multiplied by 4 and contents
of IP and CS of ISR will be taken from hexadecimal multiplication as offset address and
0000 as segment address.
For the execution of this instruction, IF should be enabled.
50. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
Ex: The instruction INT 20H will find out the address of the interrupt service
routine.
INT 20H
Type * 4 = 20*4 = 80H
Pointer to IP and CS of the ISR is 0000H : 0080H
51. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
Important Software interrupts
● Type 0 Interrupt
It corresponds to divide by 0. When the quotient from division instruction is too
large, 8086 will automatically execute ‘type 0’ interrupt.
● Type 1 Interrupt
Single step execution for debugging the program. In this instruction, the processor
will execute one instruction and wait for further direction.
● Type 2 Interrupt
It represent NMI and is used in power failure conditions.
● Type 3 Interrupt
Called as Break point Interrupt and used for debugging the program
● Type 4 Interrupt
Called as overflow interrupt. It is used to check overflow condition after any signed
arithmetic operation.
52. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
Interrupt priorities
Interrupt Priority
Divide error, INT 0 to INT N Highest
NMI
INTR
Single step Interrupt Lowest
53. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
8086 Interrupt vector table
255
.
.
.
.
32
31
.
.
.
5
Type 4 Interrupt
Type 3 Interrupt
Type 2 Interrupt
Type 1 Interrupt
Type 0 Interrupt
Available for user
Reserved for advanced
MP’s
Overflow interrupt
Break point interrupt
Nonmaskable interrupt
Single step interrupt
Divide Error
54. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
Assembler Directives
● The assembler directives are the special instructions used to indicate the
assembler how a program is to be assembled and executed in a proper way.
● assembler directives are the commands or instructions that control the
operation of the assembler.
● Assembler directives are the instructions provided to the assembler, not the
processor as the processor has nothing to do with these instructions. These
instructions are also known as pseudo-instructions or pseudo-opcode.
55. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
ASSUME
● 8086 has 4 physical segments : DS,CS,SS,ES. 8086 also contains number of
logical segments.
● ASSUME directive assigns a logical segment to a physical segment at any given
time. It provides information to the assembler regarding the name of the program.
Ex: ASSUME DS : DATA It refers logical segment as data
ASSUME CS : CODE It refers logical segment as code
ALIGN
● This directive aligns next variable or instruction
Ex: ALIGN number number can be 2,4,8 or 16
ALIGN 4 used to force the assembler to align the next segment at
an address that is divisible by 4
56. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
EQU
● It is used to redefine a data name or variable with another name (or) value.
● Each time when the assembler finds that name in the program, it replaces that name with
value assigned to that variable.
“[name] EQU initial value”
Ex: FACTORIAL EQU 05H whenever FACTORIAL appears in an instruction the
assembler substitutes the value 5.
● If the value has to be changed, all that has to change the EQU statement and reassemble the
program.
ORG [originate]
● This directive directs the assembler to start memory allotment for a particular segment, block
or code from the declared address.
“ORG expression”
Ex: ORG 1000H Set the location to 1000H
57. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
PAGE
● This directive helps to control the format of a listing of an assembled program
“PAGE [length], [width]”
Ex: PAGE 34, 96
STACK
● Provides the shortcut in stack segment
“STACK [size]”
Ex: STACK 50 This reserves 50 bytes for the stack operation
CODE – shortcut in definition of code segment
DATA – shortcut in definition of data segment
34 lines per page
Characters per line
58. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
DW, DB,DD,DQ and DT
● These directives are used to define the different types of variables (or) data
types
DB [Define Byte] – 8bit
This directive is used for the purpose of allocating and initializing single or
multiple data bytes.
Ex: NUMBER DB 10H, 20H, 30H Declare array of 3bytes named ‘NUMBER’
10H
20H
30H
NUMBER
59. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
DW [Define Word]
● It defines word data type and initializes storage for word size (16bit)
Ex: Exp1 DW 1234H, 3456H, 0145 H
DD [Define Double Word] – 32 bit input (4bytes)
Ex: MEM DD 10D50F7B
DQ [Define Quad Word] – 64 bit input (8bytes)
DT [Define Ten Bytes] – 80 bit input (10 bytes)
7BH
0FH
D5H
10H
00H
00H
MEM
60. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
EXTRN
● This directive indicates externally defined symbols
● Names and Labels are referred to as external in one module must be
declared as public
Ex: EXTRN VAR: FAR type of variable whether it is far or near
PUBLIC
● This directive is used to tell the assembler that a specified name or label will
be accessed from other modules
Ex: PUBLIC XXX It makes XXX available for other modules
END – End of the assembler program
61. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
● The directive EXTERN informs the assembler that the names, procedures
and labels declared after this directive have already been defined in some
other assembly language modules.
● While in other module, where the names, procedures and labels actually
appear, they must be declared public using PUBLIC directive.
Ex: MODULE 1 SEGMENT
PUBLIC FACTORIAL FAR
MODULE 1 ENDS
MODULE 2 SEGMENT
EXTRN FACTORIAL FAR
MODULE 2 ENDS
To call a procedure FACTORIAL appearing in MODULE1 from MODULE 2
62. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
PROC and ENDP
It defines the procedure used in programs
“name PROC type”
Ex: FACT PROC FAR
This directive identifies the start of a procedure named FACT and the procedure is
FAR type
ENDP – Indicates the end of the procedure
Ex: FACT PROC FAR
-------
-------
ENDP
63. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
SEGMENT and ENDS
● SEGMENT directive defines the start of the segment
● ENDS indicates the end of the segment
Ex: CODE SEGMENT
-------------
-------------
CODE ENDS
MACRO and ENDM
● MACRO directive defines the start of the macros in the program . ENDM indicates
end of macro
Ex: INIT MACRO
--------
--------
ENDM
64. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
DUP
This directive is used to initialize several locations and assign the values.
This allows storing of repeated characters or variables in different locations.
“NAME Data-type Num DUP (value)”
Ex: TABLE DB 5 DUP (10H)
Reserves an array of 5bytes of memory location
with the value 0
10H
10H
10H
10H
10H
TABLE
65. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
PTR [point]
To declare a specific type to a variable or label or memory operand. It is used to override the
declared type of variable. Operator PTR is prefixed by BYTE or WORD.
Ex: MOV AL, BYTE PTR [SI] Moves content of memory location addressed by SI
(8 bit ) to AL
EVEN
● It is used to inform the assembler to align the data beginning from an even address.
GROUP [Group related segment]
This directive is used to form logical groups of segments with similar purpose/type.
“PROGRAM GROUP CODE, DATA, STACK”
The above statement directs the loader/linker to prepare an EXE file such that CODE, DATA
and STACK segments must lie within a 64K byte memory segment that is named as
PROGRAM
66. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
Steps Involved in Programming
● Specifying the problem: The first step in the programming is to find out which
task is to be performed. This is called specifying the problem.
● Designing the problem solution: The exact step-by-step process that is to be
followed (program logic)is developed and written down.
● Coding: Once the program is specified and designed it can be implemented. It
tells the processor the exact step by step process in its language.
Programmer has to chose appropriate instructions from the instruction set to
build the program.
● Debugging: Once coding is done next step is to debug the program. It tests
the code to see if the task is done or not. If program is not working properly
debugging process helps to find and correct the errors.
69. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
Assembly Process
Steps involved in developing and executing assembly language programs
Assembler
Linker
Loader
Memory
Assembly language code
Machine code – binary/object code
Executable Machine code
Loads into Memory
Library Files
70. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
Assembler:
An Assembler is a program that translates the source file assembly language into
machine language [Binary or object code].
The Assembler generates two files
Object file
It contains the binary codes for the instruction and data. “.obj file”
Assembler list file
It contains the assembly language statements, the binary code for each instruction and
the offset for each instruction. “.asm file”
Assemblers are:
1) MASM – Microsoft macro assembler
2) TASM – Turbo assembler
The command on cmd performing this operation
C:MASMBIN>MASM test.asm;
71. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
Linker
● Linker is a special program tool used to link all the parts of program i.e., object files
generated by the assembler together for execution.
● Linker searches and appends all relevant library files needed for execution.
● It produces a link file which contains the binary codes for all combined modules.
Types
1) Linkage Editor
2) Dynamic Linker
Linker
Object files
(.obj file)
Executable files
(.Exe files)
Library files
72. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
Loader
A loader is a special program that loads all executable files to main memory.
It loads the executable files into memory and then the program is executed.
Types
1) Relocating loader
2) Absolute loader
3) Bootstrap loader
4) Direct linking loader
Loader
Executable files
from linker
Memory
73. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
Debugger
● It is used to find errors in the program
● If the error is found, then the program can be corrected , reassembled and
relinked to get the error free output.
74. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
Variables, Suffix and Operators
● A variable is an identifier that is associated with first byte of data item.
Ex: COUNT DB 20H COUNT is variable
Array DB 10 20 30 40 Here Array is the variable associated with
first byte of the data item i.e. 10
● In assembly language the base of a number is indicated by suffix as follows
B- Binary O – Octal
H – Hexadecimal D- Decimal
Ex: 1010 B – 10102 1234 D – 123410 1A35 H - 1A3516
● Operators are Arithmetic (+, -, *, /) and Logical Operators (AND, OR, NOT
XOR)
75. Prepared by M.V.Bhuvaneswari, Asst.Prof, CSE, MVGRA
Assembly Language Instruction
Label : Mnemonic Operand 1, Operand 2; comment
Ex: SUM : ADD AX, BX; Add the contents of AX and BX
Editor's Notes
The WAIT instruction causes the CPU to enter the low-power sleep mode until awakened by an interrupt. The WAIT instruction is commonly used in the OS idle loop when there is nothing for the CPU to do.
A clock cycle is a single electronic pulse of a CPU. During each cycle a CPU can perform a basic operation such as fetching an instruction, accessing memory or writing data etc.
External Bus master is a bus design that allows an expansion card(plug-in board) to access the computer’s memory independently of the CPU. This allows data transfer between peripheral and the main system memory while CPU is being used by other devices.
A break point is used to examine the CPU and memory after the execution of a group of instructions.
When you insert a breakpoint the system executes the instructions upto the break point and then goes to the breakpoint procedure.
A Macro is a set of instructions grouped under a single unit. It is another method for implementing modular programming.
Unlike calling and returning the control as in procedures , the processor directly generates the code whenever or where a Macro is called.