This document discusses the role of photonic integrated circuits (PICs) in addressing the growing data center interconnect (DCI) market, emphasizing the need for efficient, high-speed solutions due to forecasted traffic growth. It details different data center architectures, the advantages of silicon photonics, and advancements in optical modules that enhance bandwidth and reduce power consumption. Additionally, it covers the importance of cost-effective packaging processes for mass production of photonic circuits.

1. Annika Dochhan
September, 2019
Photonic integrated circuits
for data center interconnects

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Motivation – data center traffic growth
Forecast 2014:
Within data
center 73.1%
Data center to user 18.2%
Data center to
data center 8.7%
Source: Cisco Global Cloud Index 2014
Forecast 2018:
Within data
center 73.4%
Data center to user 14.3%
Data center to
data center 12.4%
Source: Cisco Global Cloud
Index 2016-2021 (2018)
CAGR: 25%
CAGR: 24.7%

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Motivation – data center traffic growth
Data centers tend to be more distributed
Enabling low-cost high-speed interconnects is still an important topic!
Photonic integrated circuits fulfill these requirements!
Forecast 2018:
Within data
center 71.5%
Data center to user 14.9%
Data center to
data center 13.6%
Source: Cisco Global Cloud
Index 2016-2021 (2018)
CAGR: 24.7%

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Overview
Data center architecture
Photonic integrated circuits
Optical modules
1
2
3

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Data center architecture

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Data center architecture
Tier 0 switches service a rack
Tier 1 switches service a ”row“
(of racks)
Tier 2 switches service a “co-
location“
Tier 3 switches service a data
center
• Interface to long-haul
network
• Also interface to metro
network
Tier 0 Tier 0 Tier 0
…
Tier 1 Tier 1 Tier 1…
Tier 2 Tier 2 Tier 2…
Tier 3
Tier 3
…
Tier 1
Tier 2
Tier 3
Long-haul: 1000s of km
Metro:<80km
Copper cables
Active optical cables
≤2km optics
≤2km optics
Coherent optics
IM/DD optics

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Data center architecture
Tier 0 Tier 0 Tier 0
…
Tier 1 Tier 1 Tier 1…
Tier 2 Tier 2 Tier 2…
Tier 3
Tier 3
…
Tier 1
Tier 2
Tier 3
Long-haul: 1000s of km
Metro:<80km
Copper cables
Active optical cables
≤2km optics
≤2km optics
Coherent optics
Complexity
Volume
Standardization
Cost
IM/DD optics

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Photonic integrated circuits

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Flavors of PICs
Silicon InP SiN SiO Polymer LiNbO3
Waveguides ++ ++ +++ +++ + +
Fiber coupling - + ++ ++ +++ +
Modulators + ++ --- --- +++/--- +++
Pol. converters +++ + - - - -
Light sources --- +++ --- --- --- ---
Photo
detectors
++ +++ - - - -
Footprint +++ ++ - - -- ---
Wafer size +++ -- + + - -
Yield +++ + ++ ++ + -
Hybrid
integration
++ - + + + --
Packaging ++ - + + + -

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Silicon photonics in DCI
Tier 0 Tier 0 Tier 0
…
Tier 1 Tier 1 Tier 1…
Tier 2 Tier 2 Tier 2…
Tier 3
Tier 3
…
Tier 1
Tier 2
Tier 3
Long-haul: 1000s of km
Metro:<80km
Copper cables
Active optical cables
≤2km optics
≤2km optics
Coherent optics
Products appeared here first
Later here
Slowly coming to the market now
IM/DD optics

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Coherent silicon photonic transceiver
Polarization beam splitter
MMI coupler
Edge
coupler
Photo
diodes
Photo
diodes
Modulators Heaters
Waveguide
crossings
10mm x 5mm

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with (Bi)CMOS electronics
EPIC – electronic photonic integrated circuit
Coherent silicon photonic transceiver
Segmented driver
Segmented driver
Segmented driver
Segmented driver
TIAs
TIAs
DACs
Digital
interface (SPI)
Control logic
10mm x 5mm

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Early experiments
Single MZM, direct detect
BER vs OSNR
112 Gbit/s PAM4Bandwidth (MZM + driver)

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Early experiments
Single MZM, coherent
4
6
8
10
12
14
6 10 14 18 22 26 30 34 38 42
Q2-factor(dB)
OSNR in 0.1 nm (dB)
HD-FEC
SD-FEC
64 GBaud
DP-Bi-2ASK 128 Gbit/s
DP-Bi-4ASK 256 Gbit/s
DP-Bi-8ASK 384 Gbit/s
Promising results for use of the modulator in a nested IQ structure for DP-64QAM!
I
Q
Transmission over 120 km shown

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with (Bi)CMOS electronics and active elements
Best of both worlds: integration of III-V on silicon photonics
Coherent silicon photonic transceiver
Segmented Driver
Segmented Driver
Segmented Driver
Segmented Driver
TIAs
TIAs
DACs
Digital
interface (SPI)
Control logic
10mm x 5mm
Laser/LO
SOA
TIAs

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Optical modules

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Higher bandwidth, lower power consumption, lower footprint.
Optical interfaces

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Integrated coherent transmit receive optical sub-assembly
Coherent optical engine that enables small form-factor
pluggables
• QSFP-DD, OSFP, COBO, etc.
Brings down cost through standard assembly processes
• SMT, pick & place, …
• But active optical alignment
High RF performance through
short traces
• BGA mount
Enabling interchangable short reach IM/DD and long reach coherent modules
IC-TROSA

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MASSTART: MASS manufacturing of TrAnsceiveRs for
Terabit/s era
 Glass interface based laser/PIC and fiber/PIC coupling approaches
 Obtain spot size and pitch converters
 Increase optical I/O density, automated assembly processes
 3D packaging enabling backside connection of the high speed PIC to a Si carrier
 New flip chip bonders with enhanced placement
 Improvement in throughput
 Wafer-level evaluation of assembled circuits with novel tools
 Reduce characterization time
Cost-efficient packaging processes are essential for PICs in mass production!
Packaging of SiPh coherent transceiver

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Conclusion
Data centers tend to be more distributed
 DCI is a growing market
PICs are needed for every connection distance
Silicon photonics are a good option
 Monolithically integrated electronics (EPICs)
 Hybrid integration with active materials
Packaging is an important topic

21. Thank you
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