Nvram applications in the architectural revolutions of main memory implementation a memristor walkthrough

1. Proceedings of the International Conference on Emerging Trends in Engineering and Management (ICETEM14)
30 – 31, December 2014, Ernakulam, India
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NVRAM APPLICATIONS IN THE ARCHITECTURAL
REVOLUTIONS OF MAIN MEMORY IMPLEMENTATION
– A MEMRISTOR WALKTHROUGH
Hitha Paulson1
, Dr. Rajesh R2
1
Research Scholar, Bharathiar University, Coimbatore
1
Assistant Professor, Dept of Computer Science, Little Flower College, Guruvayoor, Kerala
2
Professor, Dept. of Computer Applications ,Sree Narayana Gurukulam College of Engineering, Kadayiruppu P.O,
Kolenchery, Ernakulam dist., Kerala
ABSTRACT
A machine of storage, a machine to compute, a machine to envisage, a magical machine of job parallelization
all these describing expressions are not enough to picturise the inevitability of a valuable machine – The Computer. The
feature of save and retrieve contributed much to the expert working of the system. The volatile and non-volatile levels of
storage have been years long-standing foundation of most computer systems and have influenced the design of system
concepts. The volatility and the random accessibility feature of the main memory have many pros and corns. The
complex concepts of booting, demand paging and virtual memory happened due to the above features. The discovery of
Memristor components contributed to the capability of maintaining non volatility in random accesses mode. This paper
inspects the issues why RAM is volatile?, possibilities of persistent main memory, software enhancements, Memristor
applications and alternatives in the area of memory architecture.
Keywords: DRAM, Memristor, Non-Volatile Memory, Persistent Main Memory, PRAM.
1. INTRODUCTION
It is a decades long belief that the fast memory is volatile and persistent storage is slow. The boom to remember
and retrieve, initiated research in the computer field to contribute various storage systems. The earlier forms of memory,
magnetic tape and disk laid the basic foundation of storage.
The limitation of the Microprocessor and Operating System in the wide range of memory accessibility aroused a
need of small primary memory and large secondary memory. Since the primary memory demanded with a fast access it
was implemented with RAM modal. This Random Access Memory stores the information about programs which are
currently running. RAM is a solid state memory unit. It is faster than writing and reading information from the hard drive
because it has no physical components that need to move, just electrical signals. In secondary storage we have to wait for
the platters to rotate and the header to move. Only sequential bits can be read without additional operations in between.
The volatility and the random accessibility feature of the main memory have many pros and corns. The complex
concepts of booting, demand paging and virtual memory happened due to the above features. Today we watch the
appearance of many new memory technologies that pledge a noteworthy change in the long way existence of present
memory systems. Memristors (Memory Resistors) offers a capable alternative to conventional volatile memory systems.
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According to the International Technology Road-Map for Semiconductors (ITRS), current memory technologies (DRAM,
SRAM and NAND Flash) will soon be facing design challenges related to their continued scaling down [1]
The following sections discuses the concepts and the pros and corns of volatile and nonvolatile memory
implementations, the classical role of Memristor technology and the proposed architectural alterations.
2. HOW AND WHY OF RAM VOLATILITY
The need of Random Accessibility suggested a technique of having a temporary storage with the size permitted
by the supporting system elements and has a simple architecture where the data needs constant refreshment for storage.
The access time in RAM is independent of the storage location ie the access is independent of the address of the word.
The symmetry in the speed of read and write cycles is the major advantage noticed. Because of the volatility data stored
in a RAM is lost when the power is switched off. Hence a backup (UPS) is often used with computers.
2.1 Static Random Accesses Memory
Here the contents are retained as long as the power remains, how ever the contents are lost when power gets
down. It makes use of transistor matrixes (around 4 to 6 for each memory cell) for the storage of data and not to be
refreshed on a regular basis. Because of the inner architecture it has long data life time, is faster, less chance of
information loss but, expensive, less dense and has high power consumption.
2.2 Dynamic Random Accesses Memory
Unlike SRAM, this is made up of memory cells composed of one capacitor and one transistor which must be
continually refreshed (with in 15 nano seconds) in order for it to maintain the data. The architecture contributes to less
power consumption, less expensive, highly dense but, short data life time and slower than SRAM.
Because of the features listed above DRAMs stands as the implementing units of system RAM and SRAM is
used to implement cache memories.
2.3 Advantages of Volatility
Because of the inner architecture volatile cells doesn’t wearout, ie.. the cells support unlimited read write cycles.
Volatility can protect sensitive information, which becomes unavailable on power-down. Volatile RAMs are vulnerable
to malicious access only while powered.
3. LIMITATIONS OF EXISTING MEMORY TECHNOLOGY
Being a most influential factor in system performance, memory system becomes a major designing issue in
computer system development. The major level of classiness gained by the modern memory technology is mainly
attained from the process predicted by Gordon Moore in 1965.The Moore’s Law states that the number of devices that
can be integrated on a chip of fixed area would double every 12 months (later amended to doubling every 18 – 24
months). This made the prediction of near future dependable. But as the number of components increased the heat energy
dissipation increased at a higher rate and become a major hindrance to memory technology design.
A major issue of the coming future is the DRAM approaches physical limits that might restrict its growth in the
coming decades [2].DRAMS are not only placing charge in a storage capacitor, but also alleviate sub-threshold charge
leakage through the access device[2].Thus capacitors and transistors must be large enough to cope with the situation. In
this context predictions state that DRAM will face scaling limitations as the attribute size continuous decreasing [3].
DRAMS are also responsible for the major energy consumption in a computer system.
Because of these limitations, a major research is going on in the area of memory alternatives and has suggested
some successful alternatives even though some of them are not commercially available.
4. PROMISING NON VOLATILE MEMORY TECHNOLOGIES
There are many challenging non volatile memories reported, which aims at fulfilling the dream of a non-volatile,
byte addressable memory , which will almost as fast to access as a DRAM. Here we would like to mention the admirable
role of three of them – Phase Change Memory, Memristor and Spin Torque Transfer RAM.
Phase Change RAM also known as PRAM or PCM is based on some materials called Phase Change Materials
that exist in two different phases with distinct properties: an amorphous state, characterized by high electrical sensitivity
and a crystalline phase, characterized by low electrical sensitivity. The phases can be repeatedly and rapidly cycled by
applying heat (by injecting current) to the material [4].PRAM reported almost the same read latency as that of a DRAM,
but the write latency is around 3 times as that of a DRAM, it consumes an average of 45.5 % less energy than DRAM

3. Proceedings of the International Conference on Emerging Trends in Engineering and Management (ICETEM14)
30 – 31, December 2014, Ernakulam, India
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[2].The current write endurance varies around 108
and is a reasonable limit when compared to the features reported.
PCMs storage density is better than that of DRAM.
The Memristor, which was described by Chua in 1971, is generally thought of as the fourth of the two terminal
basic passive elements, along with resistor, capacitor and inductor [1]. The first reported passive implementation of the
Memristor was the TiO2 based devised introduced by HP in 2008 [1]. Compared with PRAM, Memristors reported better
performance. The fabrication and features will be discussed in detail in the coming sections.
Spin Torque Transfer RAM use magnetic properties of certain materials and electric charges to enable states of
different states in memory cells [5]. Based on the Giant Magneto Resistance (GMR) phenomenon STTRAM stands out
as one among the right candidate to computer memory. Magnetization orientations manipulated through an external
magnetic field determines spin polarized electron transport, leading to low and high resistance states in GMR devices. It
is the spin-based explanation for GMR that has led to a practical structure “spin valve” used in various GMR devices [6].
The spin-transfer effect of the GMR occurs for electron current flowing through two ferromagnetic layers separated by a
thin nonmagnetic spacer layer. This lowers the current needed to write the cell.
The main advantage of this is the potential for unlimited write cycles. But they lack, a reliable shrinked cell size.
These competing technologies promise a major revolution in the memory design. PCM has been experimentally
used in many applications but the other two are farther from production.
5. PROS AND CORNS OF NONVOLATALITY
The accessibility without reloading in main memory level is something that has never been possible before.
Certain dedicated systems can make use of this feature very effectively. The recurrently accessed executables can avoid
the load time which proportionally affects the execution time.
The main advantage of NVRAMS is its nonvolatality itself. It avoids the complex refreshing circuits and the
refreshing time. Certain Non volatile architectures can even contribute to avoidance of complex concepts like booting,
paging and swapping. Another advantage is the latency for reading/writing NVM cells which tends to be much higher
than DRAM [2]. Normally Non volatile memories have higher dynamic power consumption than DRAM , but
insignificant static power consumption. Some studies estimated that they can increase overall memory energy efficiency
even up to 65% [7]. Since energy and heat are interrelated Thermal competence can also be achieved. Certain NVRAMs
even reported to be denser than DRAMs.
Even though the new memory suggestions are revolutionary there are certain features need to be addressed
seriously. The limitations for read/write cycles because of the wear out nature of NVRAMs are an issue to be addressed.
Since certain architectures keep only one copy of the data under execution erroneous writes can cause permanent data
loss. Issues related with security are also to be considered. Nonvolatility can’t protect sensitive information, which
becomes available on power-down. NonVolatile RAMs are vulnerable to malicious access even while unpowered.
Another major issue is regarding the portability. Now a days drives can be physically removed and mounted to another
computer, since the file system formats are independent of the computer configuration. NVRAM based systems may
loose this property because they may contain non portable architecture related with memory [10].
6. ROLE OF MEMRISTORS
As mentioned earlier, Memristors are generally consists of a thin film of oxide sandwiched between two metal
contacts. Recent works demonstrated the ability for titanium dioxide based memristors to be deposited from solution at
room temperature by using a sol gel technique on a flexible polymer substrate [8].
The integration of memristors with traditional flexible devices(such as thin film organic, zinc oxide or
amorphous-Si transistors) may enable the realization of a new paradigm in computing technology through light weight ,
inexpensive , flexible electronics[8].
Memristors are fabricated as a high density cross bar architecture. Memristor devices are located at each
intersection between two bars. In this two terminal device the resistance depends on the magnitude and polarity of the
voltage applied to it and the length of time that voltage has been applied. When the voltage is turned off, the memristor
remembers its most recent resistance until the next time it is turned on[9]. The Memristor memory is 4x as dense as the
harddisk drive and 23x as dense as DRAM [1]. The current reading and writing speeds are slower than DRAM and
SRAM, but are very fast compared to flash memories. HP Labs offer a major research in this area.
The main advantage reported by Memristor is its symmetry in read write latency time, which makes it a right
candidate than PCRAM for the replacement of current memory techniques. PCRAM reported much variation in read
write latency which is intolerable.
As per the news paper reports , at its HP Discover conference in Las Vegas , during June 2014, HP announced
an ambitious plan to use memristors to build a system, called simply "The Machine," shipping as soon as the end of the
decade. By 2016, the company plans to have memristor-based DIMMs, which will combine the high storage densities of

4. Proceedings of the International Conference on Emerging Trends in Engineering and Management (ICETEM14)
30 – 31, December 2014, Ernakulam, India
132
hard disks with the high performance of traditional DRAM. Bloomberg Business week reports that work on The Machine
started two years ago and they were in need of about 75 percent of HP Labs' staff to be working on the project.
7. ARCHITECTURE ALTERATIONS
We will now look into some possible architectural alternations that can be made by NVRAM technology.
A simple alternative is illustrated in figure 1. The model proposes a method where the volatile memory is
replaced by any of the non volatile memory suggestions. Certain dedicated systems will get more advantage from the
model. Programs which are used very frequently will always be there when the system is up. Time of booting and
loading can be avoided. Virtual memory, demand paging and relocation remains the same.
Figure 1: Replacing DRAM
Another simple alternative is to replace the disk with any of the non volatile memory alterations, by keeping the
volatile RAM as it is. The model is illustrated in figure 2. In this model the advantages of the new nonvolatile techniques
helps in system improvement. The external memory works with the same speed as that of the volatile RAM, which adds
much to the system performance. The presence of DRAM helps in supporting the system from errorous writes and
security attacks.
Figure 2: Replacing Disk
Systems are unlikely to abandon DRAM.: Because of the wear out and slow –write limitations of NVRAM we
assume that at least for write intensive workloads, systems will instead use a combination of DRAM and NVRAM,
implementing the best properties of each [5]. In the third model, illustrated in figure 3, the NVRAM is moved to the
same address space as that of a DRAM. So the CPU can address a volatile and a non volatile memory at the same time.
Figure 3: Shared Memory
An implementation of a system with no volatile memory, but will work with the speed of a DRAM is a dream to
come true. Even though more research is needed in this area, the present realizations imply a fast implementation of this.
Figure 4 shows the single memory implementation. This also points to a possibility of implementing a higher addressable
RAM, than that is supported by the underlying technologies. Rather than keeping a constant area as main memory, a
dynamic implementation of main memory is anticipated.
Figure 4: Single Memory Implementation
8. SOFTWARE SUPPORT
Since software being an unavoidable part of hardware implementation, much care is needed in the design of
operating systems for non volatile memory implementations. Research is going on in this area with the support of Linux
open source code. Certain points have to be remembered while designing such a supporting software layer.

5. Proceedings of the International Conference on Emerging Trends in Engineering and Management (ICETEM14)
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• In certain architectures discussed earlier the OS should take care of paging used to map both volatile and non
volatile memory.
• Even though the memory is designed as nonvolatile, many supporting volatile structures are still there: the cache,
TLBs, Registers, Page tables etc..they need to be addressed seriously by an OS.
• To restore persistent application state, a process must be able to map the same non-volatile memory pages
across machine reboots. Therefore, operating systems must provide a way to identify groups of pages under a
persistent namespace [5].
• Since the nonvolatile memories have the nature of wearing out, OS should take nececcery actions to avoid
unnecessary memory writes.
• System architecture which uses both volatile and nonvolatile implementations in a RAM should take care of
which pages should migrate to NVRAM and which to DRAM.
• There should be proper synchronization mechanisms to cope up with the speed of these varying technologies in
a same RAM environment.
• In single memory implementation model, much care is needed in designing OS, since Rather than keeping a
constant area as main memory, a dynamic implementation of main memory is anticipated.
• Special security modules are needed to be implemented in OS design since the data is vulnerable to attacks
even when the power is off.
• File systems for non volatile memory architecture is a recent topic of research. BPFS: Basic Parallel File System
file system designed for byte-addressable, persistent memory technologies is still predicted on a computer with
two levels of physical storage: it does not consider how storage should be organized on a system with only
nonvolatile memory [10]. This area needs more attention.
9. CONCLUSION
This paper discussed the advantages and the disadvantages of the present system memory implementations and
reviewed the possibilities of non volatile RAMs. Even though the possibilities in NVRAM technologies are revolutionary
many serious issues are there to be addressed. The paper discussed the role of the major upcoming NVRAM technology,
Memristor. The architectural alterations possible, points to a ground-breaking era in system implementation.
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